+++ /dev/null
-diff --git a/console.h b/console.h
-index 8c9b09b..def586a 100644
---- a/console.h
-+++ b/console.h
-@@ -295,7 +295,6 @@ void vga_hw_screen_dump(const char *filename);
- void unset_vga_acc(void);
- void set_vga_acc(void);
- extern uint32_t guest_framebuffer;
--extern int intel_output;
-
- int is_graphic_console(void);
- int is_fixedsize_console(void);
-diff --git a/hw/vga.c b/hw/vga.c
-index a2b8744..e4e27a9 100644
---- a/hw/vga.c
-+++ b/hw/vga.c
-@@ -34,6 +34,8 @@
-
- #include "qemu-timer.h"
-
-+#include "intel.h"
-+
- //#define DEBUG_VGA
- //#define DEBUG_VGA_MEM
- //#define DEBUG_VGA_REG
-@@ -631,7 +633,8 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
- !(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) {
- int h, shift_control;
-
-- if (s->vram_gmfn != s->lfb_addr && intel_output != 1) {
-+ /* If the real frambuffer isn't mapped in, check that the qemu allocd one is*/
-+ if (s->vram_gmfn != s->lfb_addr && intel_output != INTEL_OUTPUT_MAPPED) {
- set_vram_mapping(s, s->lfb_addr, s->lfb_end);
- }
-
-@@ -1686,7 +1689,8 @@ static void vga_draw_graphic(VGAState *s, int full_update)
- }
- }
-
-- if (intel_output == 1 && is_buffer_shared(s->ds->surface))
-+ /* If it's a real frame buffer don't bother with the update tracking nonsense */
-+ if (intel_output == INTEL_OUTPUT_MAPPED && is_buffer_shared(s->ds->surface))
- return;
-
- vga_draw_line = vga_draw_line_table[v * NB_DEPTHS + get_depth_index(s->ds)];
-diff --git a/intel.c b/intel.c
-index dbf08d2..46949f6 100644
---- a/intel.c
-+++ b/intel.c
-@@ -14,31 +14,15 @@
- #include "console.h"
- #include "sysemu.h"
-
-+#include "intel_reg.h"
-+#include "intel.h"
-+
- #define INTEL_DEBUG(format, args...) \
- fprintf (stderr, "intel.c:%d:%s " format , __LINE__, __func__, ## args);
-
--#define TileW 128
--#define TileH 8
--
--#define REG_DR_DSPASURF 0x7019C
--#define REG_DR_DSPACNTR 0x70180
--#define REG_DR_DSPASTRIDE 0x70188
--#define REG_DR_PIPEACONF 0x70008
--
--#define REG_DR_DSPBSURF 0x7119C
--#define REG_DR_DSPBCNTR 0x71180
--#define REG_DR_DSPBSTRIDE 0x71188
--#define REG_DR_PIPEBCONF 0x71008
--
--#define REG_DE_PIPEASRC 0x6001c
--#define REG_DE_PIPEBSRC 0x6101c
--
--#define REG_FBC_CONTROL 0x03208
--#define REG_FBC_STATUS 0x03210
--
- extern int vga_passthrough;
- uint32_t guest_framebuffer;
--int intel_output = 2;
-+int intel_output = INTEL_OUTPUT_BLITTED;
- static int display = 0;
-
- static int mmio_fd = -1;
-@@ -187,6 +171,8 @@ static void set_fb_mapping(void)
- int rc;
- unsigned long nr_pfn;
-
-+ intel_output = INTEL_OUTPUT_MAPPED;
-+
- unset_vga_acc();
- INTEL_DEBUG("set_fb_mapping: %x %x\n", (intel_fb_base + intel_get_surface()), guest_framebuffer);
- nr_pfn = (ds_get_linesize(lds) * ds_get_height(lds)) >> TARGET_PAGE_BITS;
-@@ -226,6 +212,7 @@ static void unset_fb_mapping(void)
- }
-
- set_vga_acc();
-+ intel_output = INTEL_OUTPUT_BLITTED;
- memcpy(ds_get_data(lds),
- (uint8_t *) (intel_mem + intel_get_surface()),
- ds_get_linesize(lds) * ds_get_height(lds));
-@@ -277,14 +264,13 @@ static void intel_resize(DisplayState *ds)
- if (intel_have_focus)
- {
- if (ds_get_width(ds) == IntelX && ds_get_height(ds) == IntelY &&
-- is_buffer_shared(ds->surface) && lds->surface)
-+ is_buffer_shared(ds->surface))
- {
- if (!map_size)
- {
- intel_force_linear(ds_get_linesize(ds));
- set_fb_mapping();
- }
-- intel_output = 1;
- }
- else
- {
-@@ -292,12 +278,10 @@ static void intel_resize(DisplayState *ds)
- unset_fb_mapping();
- else
- intel_force_linear(0);
-- intel_output = 2;
- }
- } else {
- if (map_size)
- unset_fb_mapping();
-- intel_output = 2;
- }
- }
-
-@@ -413,15 +397,12 @@ static void intel_focus(int focus)
- memset((uint8_t *)(intel_mem + intel_get_surface()), 0,
- IntelX * IntelY * 4);
- }
-+ vga_hw_invalidate();
- vga_hw_update();
- intel_check_linear();
-- vga_hw_invalidate();
-
-- if (focus == 0)
-- intel_output = 2;
--
-- INTEL_DEBUG("intel_focus %d, x=%d, y=%d, stride=%d, intel_output=%d\n",
-- focus, IntelX, IntelY, IntelPitch, intel_output);
-+ INTEL_DEBUG("intel_focus %d, x=%d, y=%d, stride=%d\n",
-+ focus, IntelX, IntelY, IntelPitch);
- }
-
- int intel_enter(void)
-@@ -514,5 +495,6 @@ void intel_display_init(DisplayState *ds)
- ds->surface = surf;
- dpy_resize(ds);
- }
-+
- lds = ds;
- }
-diff --git a/intel.h b/intel.h
-new file mode 100644
-index 0000000..25086be
---- /dev/null
-+++ b/intel.h
-@@ -0,0 +1,5 @@
-+extern int intel_output;
-+#define INTEL_OUTPUT_UNDEF 0
-+#define INTEL_OUTPUT_MAPPED 1
-+#define INTEL_OUTPUT_BLITTED 2
-+
-diff --git a/intel_reg.h b/intel_reg.h
-new file mode 100644
-index 0000000..cd7855e
---- /dev/null
-+++ b/intel_reg.h
-@@ -0,0 +1,22 @@
-+
-+#define TileW 128
-+#define TileH 8
-+
-+#define REG_DR_DSPASURF 0x7019C
-+#define REG_DR_DSPACNTR 0x70180
-+#define REG_DR_DSPASTRIDE 0x70188
-+#define REG_DR_PIPEACONF 0x70008
-+
-+#define REG_DR_DSPBSURF 0x7119C
-+#define REG_DR_DSPBCNTR 0x71180
-+#define REG_DR_DSPBSTRIDE 0x71188
-+#define REG_DR_PIPEBCONF 0x71008
-+
-+#define REG_DE_PIPEASRC 0x6001c
-+#define REG_DE_PIPEBSRC 0x6101c
-+
-+#define REG_FBC_CONTROL 0x03208
-+#define REG_FBC_STATUS 0x03210
-+
-+
-+
diff --git a/console.h b/console.h
-index 97214c0..8c9b09b 100644
+index 97214c0..def586a 100644
--- a/console.h
+++ b/console.h
@@ -70,6 +70,8 @@ void kbd_put_keysym(int keysym);
struct PixelFormat {
uint8_t bits_per_pixel;
uint8_t bytes_per_pixel;
-@@ -290,6 +292,11 @@ void vga_hw_update(void);
+@@ -290,6 +292,10 @@ void vga_hw_update(void);
void vga_hw_invalidate(void);
void vga_hw_screen_dump(const char *filename);
+void unset_vga_acc(void);
+void set_vga_acc(void);
+extern uint32_t guest_framebuffer;
-+extern int intel_output;
+
int is_graphic_console(void);
int is_fixedsize_console(void);
CharDriverState *text_console_init(const char *p);
-@@ -356,4 +363,8 @@ void hid_linux_add_binding(const int *, void (*)(void*), void *);
+@@ -356,4 +362,8 @@ void hid_linux_add_binding(const int *, void (*)(void*), void *);
void hid_linux_reset_keyboard(void);
void hid_linux_probe(int grab);
{
driver.enter = dom0_driver_dummy_enter_leave;
diff --git a/hw/vga.c b/hw/vga.c
-index 90bd544..a2b8744 100644
+index 90bd544..e4e27a9 100644
--- a/hw/vga.c
+++ b/hw/vga.c
-@@ -161,6 +161,18 @@ static uint8_t expand4to8[16];
+@@ -34,6 +34,8 @@
+
+ #include "qemu-timer.h"
+
++#include "intel.h"
++
+ //#define DEBUG_VGA
+ //#define DEBUG_VGA_MEM
+ //#define DEBUG_VGA_REG
+@@ -161,6 +163,18 @@ static uint8_t expand4to8[16];
static void vga_bios_init(VGAState *s);
static void vga_screen_dump(void *opaque, const char *filename);
static void vga_dumb_update_retrace_info(VGAState *s)
{
(void) s;
-@@ -618,8 +630,8 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
+@@ -618,8 +632,9 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
if ((val & VBE_DISPI_ENABLED) &&
!(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) {
int h, shift_control;
-
- if (s->vram_gmfn != s->lfb_addr) {
+
-+ if (s->vram_gmfn != s->lfb_addr && intel_output != 1) {
++ /* If the real frambuffer isn't mapped in, check that the qemu allocd one is*/
++ if (s->vram_gmfn != s->lfb_addr && intel_output != INTEL_OUTPUT_MAPPED) {
set_vram_mapping(s, s->lfb_addr, s->lfb_end);
}
-@@ -637,12 +649,6 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
+@@ -637,12 +652,6 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
((s->vbe_regs[VBE_DISPI_INDEX_BPP] + 7) >> 3);
s->vbe_start_addr = 0;
/* we initialize the VGA graphic mode (should be done
in BIOS) */
s->gr[0x06] = (s->gr[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
-@@ -1313,12 +1319,12 @@ static void vga_draw_text(VGAState *s, int full_update)
+@@ -1313,12 +1322,12 @@ static void vga_draw_text(VGAState *s, int full_update)
full_update = 1;
}
cursor_offset = ((s->cr[0x0e] << 8) | s->cr[0x0f]) - s->start_addr;
if (cursor_offset != s->cursor_offset ||
s->cr[0xa] != s->cursor_start ||
-@@ -1596,15 +1602,12 @@ static void vga_draw_graphic(VGAState *s, int full_update)
+@@ -1596,15 +1605,12 @@ static void vga_draw_graphic(VGAState *s, int full_update)
}
depth = s->get_bpp(s);
if (is_graphic_console()) {
qemu_free_displaysurface(s->ds);
s->ds->surface = qemu_create_displaysurface_from(disp_width, height, depth,
-@@ -1633,9 +1636,8 @@ static void vga_draw_graphic(VGAState *s, int full_update)
+@@ -1633,9 +1639,8 @@ static void vga_draw_graphic(VGAState *s, int full_update)
dpy_setdata(s->ds);
}
if (shift_control == 0) {
full_update |= update_palette16(s);
if (s->sr[0x01] & 8) {
-@@ -1684,6 +1686,9 @@ static void vga_draw_graphic(VGAState *s, int full_update)
+@@ -1684,6 +1689,10 @@ static void vga_draw_graphic(VGAState *s, int full_update)
}
}
-+ if (intel_output == 1 && is_buffer_shared(s->ds->surface))
++ /* If it's a real frame buffer don't bother with the update tracking nonsense */
++ if (intel_output == INTEL_OUTPUT_MAPPED && is_buffer_shared(s->ds->surface))
+ return;
+
vga_draw_line = vga_draw_line_table[v * NB_DEPTHS + get_depth_index(s->ds)];
if (!is_buffer_shared(s->ds->surface) && s->cursor_invalidate)
s->cursor_invalidate(s);
-@@ -2008,8 +2013,8 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
+@@ -2008,8 +2017,8 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
/* ugly hack for CGA 160x100x16 - explain me the logic */
height = 100;
} else {
((s->cr[0x07] & 0x40) << 3);
height = (height + 1) / cheight;
}
-@@ -2304,7 +2309,7 @@ static int vga_load(QEMUFile *f, void *opaque, int version_id)
+@@ -2304,7 +2313,7 @@ static int vga_load(QEMUFile *f, void *opaque, int version_id)
if (!s->vram_gmfn) {
xen_vga_populate_vram(VRAM_RESERVED_ADDRESS, s->vram_size);
s->vram_gmfn = VRAM_RESERVED_ADDRESS;
}
}
-@@ -2334,7 +2339,7 @@ static void vga_map(PCIDevice *pci_dev, int region_num,
+@@ -2334,7 +2343,7 @@ static void vga_map(PCIDevice *pci_dev, int region_num,
s->vbe_regs[VBE_DISPI_INDEX_LFB_ADDRESS_L] = s->lfb_addr & 0xFFFF;
s->vbe_regs[VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = s->vram_size >> 16;
#endif
fprintf(stderr, "vga s->lfb_addr = %lx s->lfb_end = %lx \n", (unsigned long) s->lfb_addr,(unsigned long) s->lfb_end);
if (size != s->vram_size)
-@@ -2473,8 +2478,6 @@ static void vga_bios_init(VGAState *s)
+@@ -2473,8 +2482,6 @@ static void vga_bios_init(VGAState *s)
}
/* Allocate video memory in the GPFN space */
void xen_vga_populate_vram(uint64_t vram_addr, uint32_t vga_ram_size)
{
-@@ -2660,7 +2663,7 @@ int isa_vga_init(uint8_t *vga_ram_base,
+@@ -2660,7 +2667,7 @@ int isa_vga_init(uint8_t *vga_ram_base,
s = qemu_mallocz(sizeof(VGAState));
if (!s)
return -1;
if (vga_ram_size > 16*1024*1024) {
fprintf (stderr, "The stdvga/VBE device model has no use for more than 16 Megs of vram. Video ram set to 16M. \n");
vga_ram_size = 16*1024*1024;
-@@ -2820,7 +2823,7 @@ static void vga_screen_dump(void *opaque, const char *filename)
+@@ -2820,7 +2827,7 @@ static void vga_screen_dump(void *opaque, const char *filename)
register_displaychangelistener(ds, &dcl);
ds->allocator = &default_allocator;
ds->surface = qemu_create_displaysurface(ds, w, h);
vga_update_display(s);
diff --git a/intel.c b/intel.c
new file mode 100644
-index 0000000..dbf08d2
+index 0000000..46949f6
--- /dev/null
+++ b/intel.c
-@@ -0,0 +1,518 @@
+@@ -0,0 +1,500 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include "console.h"
+#include "sysemu.h"
+
++#include "intel_reg.h"
++#include "intel.h"
++
+#define INTEL_DEBUG(format, args...) \
+ fprintf (stderr, "intel.c:%d:%s " format , __LINE__, __func__, ## args);
+
-+#define TileW 128
-+#define TileH 8
-+
-+#define REG_DR_DSPASURF 0x7019C
-+#define REG_DR_DSPACNTR 0x70180
-+#define REG_DR_DSPASTRIDE 0x70188
-+#define REG_DR_PIPEACONF 0x70008
-+
-+#define REG_DR_DSPBSURF 0x7119C
-+#define REG_DR_DSPBCNTR 0x71180
-+#define REG_DR_DSPBSTRIDE 0x71188
-+#define REG_DR_PIPEBCONF 0x71008
-+
-+#define REG_DE_PIPEASRC 0x6001c
-+#define REG_DE_PIPEBSRC 0x6101c
-+
-+#define REG_FBC_CONTROL 0x03208
-+#define REG_FBC_STATUS 0x03210
-+
+extern int vga_passthrough;
+uint32_t guest_framebuffer;
-+int intel_output = 2;
++int intel_output = INTEL_OUTPUT_BLITTED;
+static int display = 0;
+
+static int mmio_fd = -1;
+ int rc;
+ unsigned long nr_pfn;
+
++ intel_output = INTEL_OUTPUT_MAPPED;
++
+ unset_vga_acc();
+ INTEL_DEBUG("set_fb_mapping: %x %x\n", (intel_fb_base + intel_get_surface()), guest_framebuffer);
+ nr_pfn = (ds_get_linesize(lds) * ds_get_height(lds)) >> TARGET_PAGE_BITS;
+ }
+
+ set_vga_acc();
++ intel_output = INTEL_OUTPUT_BLITTED;
+ memcpy(ds_get_data(lds),
+ (uint8_t *) (intel_mem + intel_get_surface()),
+ ds_get_linesize(lds) * ds_get_height(lds));
+ if (intel_have_focus)
+ {
+ if (ds_get_width(ds) == IntelX && ds_get_height(ds) == IntelY &&
-+ is_buffer_shared(ds->surface) && lds->surface)
++ is_buffer_shared(ds->surface))
+ {
+ if (!map_size)
+ {
+ intel_force_linear(ds_get_linesize(ds));
+ set_fb_mapping();
+ }
-+ intel_output = 1;
+ }
+ else
+ {
+ unset_fb_mapping();
+ else
+ intel_force_linear(0);
-+ intel_output = 2;
+ }
+ } else {
+ if (map_size)
+ unset_fb_mapping();
-+ intel_output = 2;
+ }
+}
+
+ memset((uint8_t *)(intel_mem + intel_get_surface()), 0,
+ IntelX * IntelY * 4);
+ }
++ vga_hw_invalidate();
+ vga_hw_update();
+ intel_check_linear();
-+ vga_hw_invalidate();
-+
-+ if (focus == 0)
-+ intel_output = 2;
+
-+ INTEL_DEBUG("intel_focus %d, x=%d, y=%d, stride=%d, intel_output=%d\n",
-+ focus, IntelX, IntelY, IntelPitch, intel_output);
++ INTEL_DEBUG("intel_focus %d, x=%d, y=%d, stride=%d\n",
++ focus, IntelX, IntelY, IntelPitch);
+}
+
+int intel_enter(void)
+ ds->surface = surf;
+ dpy_resize(ds);
+ }
++
+ lds = ds;
+}
+diff --git a/intel.h b/intel.h
+new file mode 100644
+index 0000000..25086be
+--- /dev/null
++++ b/intel.h
+@@ -0,0 +1,5 @@
++extern int intel_output;
++#define INTEL_OUTPUT_UNDEF 0
++#define INTEL_OUTPUT_MAPPED 1
++#define INTEL_OUTPUT_BLITTED 2
++
+diff --git a/intel_reg.h b/intel_reg.h
+new file mode 100644
+index 0000000..cd7855e
+--- /dev/null
++++ b/intel_reg.h
+@@ -0,0 +1,22 @@
++
++#define TileW 128
++#define TileH 8
++
++#define REG_DR_DSPASURF 0x7019C
++#define REG_DR_DSPACNTR 0x70180
++#define REG_DR_DSPASTRIDE 0x70188
++#define REG_DR_PIPEACONF 0x70008
++
++#define REG_DR_DSPBSURF 0x7119C
++#define REG_DR_DSPBCNTR 0x71180
++#define REG_DR_DSPBSTRIDE 0x71188
++#define REG_DR_PIPEBCONF 0x71008
++
++#define REG_DE_PIPEASRC 0x6001c
++#define REG_DE_PIPEBSRC 0x6101c
++
++#define REG_FBC_CONTROL 0x03208
++#define REG_FBC_STATUS 0x03210
++
++
++
diff --git a/vl.c b/vl.c
index adfa4f6..a040403 100644
--- a/vl.c