Disable framebuffer compression when we switch to a svm.

diff --git a/master/intel b/master/intel
index 3d944da3923045d66a981818045f52723e62db4a..b7d469fd5446171164e882a264085dce120c8c75 100644 (file)
--- a/master/intel
+++ b/master/intel
@@ -215,10 +215,10 @@ index 90bd544..a2b8744 100644
      vga_update_display(s);
 diff --git a/intel.c b/intel.c
 new file mode 100644
-index 0000000..85968cb
+index 0000000..df9ebf7
 --- /dev/null
 +++ b/intel.c
-@@ -0,0 +1,508 @@
+@@ -0,0 +1,517 @@
 +#include <stdio.h>
 +#include <stdlib.h>
 +#include <stdint.h>
@@ -254,6 +254,9 @@ index 0000000..85968cb
 +#define REG_DE_PIPEASRC               0x6001c
 +#define REG_DE_PIPEBSRC               0x6101c
 +
++#define REG_FBC_CONTROL         0x03208
++#define REG_FBC_STATUS          0x03210
++
 +extern int                      vga_passthrough;
 +uint32_t                        guest_framebuffer;
 +int                             intel_output;
@@ -328,12 +331,12 @@ index 0000000..85968cb
 +    unsigned int *pipebconf = (unsigned int *)(intel_mmio + REG_DR_PIPEBCONF);
 +    unsigned int *dspbsurf = (unsigned int *)(intel_mmio + REG_DR_DSPBSURF);
 +    unsigned int *dspbstride = (unsigned int *)(intel_mmio + REG_DR_DSPBSTRIDE);
++    volatile unsigned int *fbc_ctl = (unsigned int *)(intel_mmio + REG_FBC_CONTROL);
 +
 +    unsigned int surfa = 0, surfb = 0, pipea = 0, pipeb = 0;
 +    char pipeaenabled = !!(*pipeaconf & (1 << 30));
 +    char pipebenabled = !!(*pipebconf & (1 << 30));
 +
-+
 +    INTEL_DEBUG("DSPASURF CTRL: 0x%x\n", intel_get_reg(REG_DR_DSPACNTR));
 +
 +    if (pipeaenabled)
@@ -390,7 +393,13 @@ index 0000000..85968cb
 +    }
 +    if (linesize) IntelPitch = linesize;
 +
-+    usleep(50 * 1000); /* 500 ms */
++    usleep(50 * 1000); /* 50 ms */
++
++    /* Clear the compression bit */
++    *fbc_ctl &= ~(1 << 31);
++    /* Wait for the status register */
++    while (intel_get_reg(REG_FBC_STATUS) & (1 << 31))
++        ;
 +}
 +
 +static void set_fb_mapping(void)