}
/* Being called each time a mmio region has been updated */
-void pt_iomem_map(PCIDevice *d, int i, uint32_t e_phys, uint32_t e_size,
- int type)
+static void pt_iomem_map(PCIDevice *d, int i, uint32_t e_phys, uint32_t e_size,
+ int type)
{
struct pt_dev *assigned_device = (struct pt_dev *)d;
uint32_t old_ebase = assigned_device->bases[i].e_physbase;
}
/* Being called each time a pio region has been updated */
-void pt_ioport_map(PCIDevice *d, int i,
- uint32_t e_phys, uint32_t e_size, int type)
+static void pt_ioport_map(PCIDevice *d, int i,
+ uint32_t e_phys, uint32_t e_size, int type)
{
struct pt_dev *assigned_device = (struct pt_dev *)d;
uint32_t old_ebase = assigned_device->bases[i].e_physbase;
}
/* find emulate register group entry */
-struct pt_reg_grp_tbl* pt_find_reg_grp(
- struct pt_dev *ptdev, uint32_t address)
+static struct pt_reg_grp_tbl* pt_find_reg_grp(struct pt_dev *ptdev,
+ uint32_t address)
{
struct pt_reg_grp_tbl* reg_grp_entry = NULL;
}
/* find emulate register entry */
-struct pt_reg_tbl* pt_find_reg(
- struct pt_reg_grp_tbl* reg_grp, uint32_t address)
+static struct pt_reg_tbl* pt_find_reg(struct pt_reg_grp_tbl* reg_grp,
+ uint32_t address)
{
struct pt_reg_tbl* reg_entry = NULL;
struct pt_reg_info_tbl* reg = NULL;
}
-uint8_t find_cap_offset(struct pci_dev *pci_dev, uint8_t cap)
+static uint8_t find_cap_offset(struct pci_dev *pci_dev, uint8_t cap)
{
int id;
int max_cap = 48;
return 0;
}
-uint32_t find_ext_cap_offset(struct pci_dev *pci_dev, uint32_t cap)
+static uint32_t find_ext_cap_offset(struct pci_dev *pci_dev, uint32_t cap)
{
uint32_t header = 0;
int max_cap = 480;
}
/* check power state transition */
-int check_power_state(struct pt_dev *ptdev)
+static int check_power_state(struct pt_dev *ptdev)
{
struct pt_pm_info *pm_state = ptdev->pm_state;
PCIDevice *d = &ptdev->dev;
}
/* reset Interrupt and I/O resource */
-void pt_reset_interrupt_and_io_mapping(struct pt_dev *ptdev)
+static void pt_reset_interrupt_and_io_mapping(struct pt_dev *ptdev)
{
PCIDevice *d = &ptdev->dev;
PCIIORegion *r;
pm_state->pm_timer = NULL;
}
-void pt_default_power_transition(void *opaque)
+static void pt_default_power_transition(void *opaque)
{
struct pt_dev *ptdev = opaque;
struct pt_pm_info *pm_state = ptdev->pm_state;
return 0;
}
-struct pt_dev * register_real_device(PCIBus *e_bus,
+static struct pt_dev * register_real_device(PCIBus *e_bus,
const char *e_dev_name, int e_devfn, uint8_t r_bus, uint8_t r_dev,
uint8_t r_func, uint32_t machine_irq, struct pci_access *pci_access,
char *opt)
return assigned_device;
}
-int unregister_real_device(int slot)
+static int unregister_real_device(int slot)
{
struct php_dev *php_dev;
struct pci_dev *pci_dev;