regs[0] &= 0x0000ffffu;
regs[1] = regs[2] = regs[3] = 0;
break;
- case 0x00000002:
- case 0x00000004:
- case 0x80000002:
- case 0x80000003:
- case 0x80000004:
- case 0x80000006:
+ case 0x00000002: /* Intel cache info (dumped by AMD policy) */
+ case 0x00000004: /* Intel cache info (dumped by AMD policy) */
+ case 0x80000002: /* Processor name string */
+ case 0x80000003: /* ... continued */
+ case 0x80000004: /* ... continued */
+ case 0x80000005: /* AMD L1 cache/TLB info (dumped by Intel policy) */
+ case 0x80000006: /* AMD L2/3 cache/TLB info ; Intel L2 cache features */
break;
default:
regs[0] = regs[1] = regs[2] = regs[3] = 0;
(is_64bit ? bitmaskof(X86_FEATURE_SYSCALL) : 0));
break;
}
+ case 0x80000005:
+ {
+ regs[0] = regs[1] = regs[2] = 0;
+ break;
+ }
}
}
}