Fix confusion over patches

diff --git a/master/fix-video b/master/fix-video
index 9593981d2bc2c9c8deceb570e40d2714aa35cef1..6fa1a1d4892f815249ef2d03aa36b485ea6e2505 100644 (file)
--- a/master/fix-video
+++ b/master/fix-video
@@ -11,7 +11,7 @@ index 8c9b09b..def586a 100644
  int is_graphic_console(void);
  int is_fixedsize_console(void);
 diff --git a/hw/vga.c b/hw/vga.c
-index a2b8744..a6b768c 100644
+index a2b8744..91a08f4 100644
 --- a/hw/vga.c
 +++ b/hw/vga.c
 @@ -34,6 +34,8 @@
@@ -23,14 +23,6 @@ index a2b8744..a6b768c 100644
  //#define DEBUG_VGA
  //#define DEBUG_VGA_MEM
  //#define DEBUG_VGA_REG
-@@ -572,6 +574,7 @@ static uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr)
- #ifdef DEBUG_BOCHS_VBE
-     printf("VBE: read index=0x%x val=0x%x\n", s->vbe_index, val);
- #endif
-+    fprintf(stderr,"VBE: getcaps=%x read index=0x%x val=0x%x\n", s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_GETCAPS, s->vbe_index, val);
-     return val;
- }
- 
 @@ -631,7 +634,8 @@ static void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val)
                  !(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) {
                  int h, shift_control;
@@ -52,7 +44,7 @@ index a2b8744..a6b768c 100644
  
      vga_draw_line = vga_draw_line_table[v * NB_DEPTHS + get_depth_index(s->ds)];
 diff --git a/intel.c b/intel.c
-index df9ebf7..46949f6 100644
+index dbf08d2..46949f6 100644
 --- a/intel.c
 +++ b/intel.c
 @@ -14,31 +14,15 @@
@@ -86,7 +78,7 @@ index df9ebf7..46949f6 100644
 -
  extern int                      vga_passthrough;
  uint32_t                        guest_framebuffer;
--int                             intel_output;
+-int                             intel_output = 2;
 +int                             intel_output = INTEL_OUTPUT_BLITTED;
  static int                      display = 0;
  
@@ -108,7 +100,15 @@ index df9ebf7..46949f6 100644
      memcpy(ds_get_data(lds),
              (uint8_t *) (intel_mem + intel_get_surface()),
              ds_get_linesize(lds) * ds_get_height(lds));
-@@ -284,7 +271,6 @@ static void intel_resize(DisplayState *ds)
+@@ -277,14 +264,13 @@ static void intel_resize(DisplayState *ds)
+     if (intel_have_focus)
+     {
+         if (ds_get_width(ds) == IntelX && ds_get_height(ds) == IntelY &&
+-                is_buffer_shared(ds->surface) && lds->surface)
++                is_buffer_shared(ds->surface))
+         {
+             if (!map_size)
+             {
                  intel_force_linear(ds_get_linesize(ds));
                  set_fb_mapping();
              }
@@ -125,53 +125,26 @@ index df9ebf7..46949f6 100644
      } else {
          if (map_size)
              unset_fb_mapping();
--        intel_output = 1;
+-        intel_output = 2;
      }
  }
  
-@@ -512,6 +496,5 @@ void intel_display_init(DisplayState *ds)
-         dpy_resize(ds);
+@@ -413,15 +397,12 @@ static void intel_focus(int focus)
+         memset((uint8_t *)(intel_mem + intel_get_surface()), 0,
+                 IntelX * IntelY * 4);
      }
++    vga_hw_invalidate();
+     vga_hw_update();
+     intel_check_linear();
+-    vga_hw_invalidate();
  
--    intel_output = 1;
-     lds = ds;
+-    if (focus == 0)
+-        intel_output = 2;
+-
+-    INTEL_DEBUG("intel_focus %d, x=%d, y=%d, stride=%d, intel_output=%d\n",
+-            focus, IntelX, IntelY, IntelPitch, intel_output);
++    INTEL_DEBUG("intel_focus %d, x=%d, y=%d, stride=%d\n",
++            focus, IntelX, IntelY, IntelPitch);
  }
-diff --git a/intel.h b/intel.h
-new file mode 100644
-index 0000000..25086be
---- /dev/null
-+++ b/intel.h
-@@ -0,0 +1,5 @@
-+extern int intel_output;
-+#define INTEL_OUTPUT_UNDEF    0
-+#define INTEL_OUTPUT_MAPPED   1
-+#define INTEL_OUTPUT_BLITTED  2
-+
-diff --git a/intel_reg.h b/intel_reg.h
-new file mode 100644
-index 0000000..cd7855e
---- /dev/null
-+++ b/intel_reg.h
-@@ -0,0 +1,22 @@
-+
-+#define TileW           128
-+#define TileH           8
-+
-+#define REG_DR_DSPASURF         0x7019C
-+#define REG_DR_DSPACNTR         0x70180
-+#define REG_DR_DSPASTRIDE       0x70188
-+#define REG_DR_PIPEACONF        0x70008
-+
-+#define REG_DR_DSPBSURF         0x7119C
-+#define REG_DR_DSPBCNTR         0x71180
-+#define REG_DR_DSPBSTRIDE       0x71188
-+#define REG_DR_PIPEBCONF      0x71008
-+
-+#define REG_DE_PIPEASRC               0x6001c
-+#define REG_DE_PIPEBSRC               0x6101c
-+
-+#define REG_FBC_CONTROL         0x03208
-+#define REG_FBC_STATUS          0x03210
-+
-+
-+
+ 
+ int intel_enter(void)