From 2395df0ddb60e592d1a188a94ae4de044dc40b3f Mon Sep 17 00:00:00 2001 From: James Mckenzie Date: Wed, 25 Nov 2009 22:56:31 +0000 Subject: [PATCH] Quick and dirty (and by god it is) superblanker part #1. Fix this patch to be a one liner once the build system is able to compile Mesa for staging. --- ...-intel-2.6.3-ungodly-dom0-nodri-noagp-hack | 614 ++++++++++++++++++ 1 file changed, 614 insertions(+) create mode 100644 package/x11r7/xdriver_xf86-video-intel/xdriver_xf86-video-intel-2.6.3-ungodly-dom0-nodri-noagp-hack diff --git a/package/x11r7/xdriver_xf86-video-intel/xdriver_xf86-video-intel-2.6.3-ungodly-dom0-nodri-noagp-hack b/package/x11r7/xdriver_xf86-video-intel/xdriver_xf86-video-intel-2.6.3-ungodly-dom0-nodri-noagp-hack new file mode 100644 index 0000000..577ceef --- /dev/null +++ b/package/x11r7/xdriver_xf86-video-intel/xdriver_xf86-video-intel-2.6.3-ungodly-dom0-nodri-noagp-hack @@ -0,0 +1,614 @@ +diff -uNr xf86-video-intel-2.6.3/src/fish.h xf86-video-intel-2.6.3/src/fish.h +--- xf86-video-intel-2.6.3/src/fish.h 1970-01-01 01:00:00.000000000 +0100 ++++ xf86-video-intel-2.6.3/src/fish.h 2009-11-25 22:25:36.000000000 +0000 +@@ -0,0 +1,27 @@ ++#ifndef __FISH_H__ ++#define __FISH_H__ ++ ++#define FISH ++ ++#include ++#include "intel_bufmgr.h" ++#include ++#include ++#include ++#include ++#include ++ ++#ifndef I915_TILING_Y ++#define I915_TILING_NONE 0 ++#define I915_TILING_X 1 ++#define I915_TILING_Y 2 ++#endif ++ ++typedef unsigned int GLuint; ++ ++ ++extern char *DRICreatePCIBusID(void *fish); ++ ++#define FOO do { xf86DrvMsg(pScrn->scrnIndex, X_INFO,"%s:%d\n",__FILE__,__LINE__); } while (1==0) ++ ++#endif +diff -uNr xf86-video-intel-2.6.3/src/i830_driver.c xf86-video-intel-2.6.3/src/i830_driver.c +--- xf86-video-intel-2.6.3/src/i830_driver.c 2009-11-25 22:41:14.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i830_driver.c 2009-11-25 22:29:50.000000000 +0000 +@@ -1740,6 +1740,9 @@ + static Bool + I830DrmModeInit(ScrnInfoPtr pScrn) + { ++#ifdef FISH ++return FALSE; ++#else + #ifdef XF86DRM_MODE + I830Ptr pI830 = I830PTR(pScrn); + char *bus_id; +@@ -1795,6 +1798,7 @@ + #endif + + return TRUE; ++#endif + } + + static void +@@ -1886,6 +1890,12 @@ + return FALSE; + + pI830 = I830PTR(pScrn); ++#ifdef FISH ++ pI830->can_resize=1; ++ pI830->memory_manager=NULL; ++ pI830->drmSubFD=0; ++ pI830->drmMinor=0; ++#endif + pI830->SaveGeneration = -1; + pI830->pEnt = pEnt; + pI830->use_drm_mode = drm_mode_setting; +@@ -2845,32 +2855,60 @@ + #endif + } + ++ + static Bool + i830_try_memory_allocation(ScrnInfoPtr pScrn) + { + I830Ptr pI830 = I830PTR(pScrn); + Bool tiled = pI830->tiling; + Bool xf86dri = pI830->directRenderingType == DRI_XF86DRI; ++ char extra_magic[1024]; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Attempting memory allocation with %stiled buffers.\n", + tiled ? "" : "un"); + ++ + if (!i830_allocate_2d_memory(pScrn)) + goto failed; + ++ FOO; ++#if 0 /*Super Magic workaround linker not likeing us - AWFUL HACK*/ + if (IS_I965GM(pI830) || IS_GM45(pI830)) + if (!i830_allocate_pwrctx(pScrn)) + goto failed; ++#else ++ if (IS_I965GM(pI830) || IS_GM45(pI830)) { ++#define HWSTATUS_PAGE_SIZE GTT_PAGE_SIZE ++#define PWRCTX_SIZE GTT_PAGE_SIZE ++ ++ pI830->power_context = i830_allocate_memory(pScrn, "power context", ++ PWRCTX_SIZE, PITCH_NONE, ++ GTT_PAGE_SIZE, ++ NEED_LIFETIME_FIXED, ++ TILE_NONE); ++ FOO; ++ if (!pI830->power_context) { ++ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ++ "Failed to allocate power context.\n"); ++ goto failed; ++ } ++ } ++#endif ++ ++ FOO; + + if (xf86dri && !i830_allocate_3d_memory(pScrn)) + goto failed; ++ FOO; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation successful.\n", + tiled ? "T" : "Unt"); + return TRUE; ++ FOO; + + failed: ++ FOO; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation failed.\n", + tiled ? "T" : "Unt"); + return FALSE; +@@ -3547,6 +3585,8 @@ + pI830->closing = FALSE; + pI830->suspended = FALSE; + ++ exit(0); ++ + return TRUE; + } + +diff -uNr xf86-video-intel-2.6.3/src/i830_exa.c xf86-video-intel-2.6.3/src/i830_exa.c +--- xf86-video-intel-2.6.3/src/i830_exa.c 2009-03-02 19:21:02.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i830_exa.c 2009-11-25 21:34:03.000000000 +0000 +@@ -215,6 +215,7 @@ + static void + I830EXASolid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2) + { ++#if 0 + ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + unsigned long pitch; +@@ -245,6 +246,7 @@ + OUT_BATCH(pI830->BR[16]); + ADVANCE_BATCH(); + } ++#endif + } + + static void +@@ -303,6 +305,7 @@ + I830EXACopy(PixmapPtr pDstPixmap, int src_x1, int src_y1, int dst_x1, + int dst_y1, int w, int h) + { ++#if 0 + ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + uint32_t cmd; +@@ -349,6 +352,7 @@ + + ADVANCE_BATCH(); + } ++#endif + } + + static void +diff -uNr xf86-video-intel-2.6.3/src/i830.h xf86-video-intel-2.6.3/src/i830.h +--- xf86-video-intel-2.6.3/src/i830.h 2009-03-02 19:21:02.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i830.h 2009-11-25 21:25:33.000000000 +0000 +@@ -65,6 +65,8 @@ + #include + #endif + ++#include "fish.h" ++ + #ifdef XF86DRI + #include "xf86drm.h" + #include "sarea.h" +@@ -460,6 +462,15 @@ + CreateScreenResourcesProcPtr CreateScreenResources; + + i830_memory *power_context; ++#ifdef FISH ++ struct fishs { ++ long unsigned int offset; ++ long unsigned int end; ++ } *memory_manager; ++ Bool can_resize; ++ int drmSubFD; ++ int drmMinor; ++#endif + + #ifdef XF86DRI + i830_memory *back_buffer; +diff -uNr xf86-video-intel-2.6.3/src/i830_memory.c xf86-video-intel-2.6.3/src/i830_memory.c +--- xf86-video-intel-2.6.3/src/i830_memory.c 2009-11-25 22:41:14.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i830_memory.c 2009-11-25 22:25:13.000000000 +0000 +@@ -925,9 +925,7 @@ + enum tile_format tile_format) + { + i830_memory *mem; +-#ifdef XF86DRI + I830Ptr pI830 = I830PTR(pScrn); +-#endif + + /* Manage tile alignment and size constraints */ + if (tile_format != TILE_NONE) { +@@ -1032,6 +1030,7 @@ + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity, + "%s0x%08lx: start of memory manager\n", + prefix, pI830->memory_manager->offset); ++ + for (mem = pI830->bo_list; mem != NULL; mem = mem->next) { + char *tile_suffix = ""; + +@@ -1749,21 +1748,28 @@ + return TRUE; + } + ++ + Bool + i830_allocate_pwrctx(ScrnInfoPtr pScrn) + { ++#if 0 + I830Ptr pI830 = I830PTR(pScrn); ++ FOO; + + pI830->power_context = i830_allocate_memory(pScrn, "power context", + PWRCTX_SIZE, PITCH_NONE, + GTT_PAGE_SIZE, + NEED_LIFETIME_FIXED, + TILE_NONE); ++ FOO; + if (!pI830->power_context) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Failed to allocate power context.\n"); + return FALSE; + } ++ FOO; ++ ++#endif + return TRUE; + } + +diff -uNr xf86-video-intel-2.6.3/src/i830_render.c xf86-video-intel-2.6.3/src/i830_render.c +--- xf86-video-intel-2.6.3/src/i830_render.c 2009-01-21 22:02:00.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i830_render.c 2009-11-25 21:35:03.000000000 +0000 +@@ -258,7 +258,9 @@ + static Bool + i830_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit) + { +- ++#ifdef FISH ++ return FALSE; ++#else + ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + uint32_t format, pitch, filter; +@@ -351,6 +353,7 @@ + #endif + + return TRUE; ++#endif + } + + Bool +@@ -392,6 +395,7 @@ + PicturePtr pMaskPicture, PicturePtr pDstPicture, + PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst) + { ++#ifndef FISH + ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + uint32_t dst_format, dst_pitch; +@@ -575,6 +579,9 @@ + #endif + + return TRUE; ++#else ++ return FALSE; ++#endif + } + + /** +diff -uNr xf86-video-intel-2.6.3/src/i915_render.c xf86-video-intel-2.6.3/src/i915_render.c +--- xf86-video-intel-2.6.3/src/i915_render.c 2009-01-21 22:02:00.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i915_render.c 2009-11-25 21:35:28.000000000 +0000 +@@ -356,6 +356,7 @@ + static void + i915_emit_composite_setup(ScrnInfoPtr pScrn) + { ++#if 0 + I830Ptr pI830 = I830PTR(pScrn); + int op = pI830->i915_render_state.op; + PicturePtr pSrcPicture = pI830->i915_render_state.pSrcPicture; +@@ -533,6 +534,7 @@ + i915_fs_mov(FS_OC, i915_fs_operand(out_reg, W, W, W, W)); + + FS_END(); ++#endif + } + + void +diff -uNr xf86-video-intel-2.6.3/src/i915_video.c xf86-video-intel-2.6.3/src/i915_video.c +--- xf86-video-intel-2.6.3/src/i915_video.c 2009-02-28 20:28:53.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i915_video.c 2009-11-25 21:27:07.000000000 +0000 +@@ -47,6 +47,7 @@ + short src_w, short src_h, short drw_w, short drw_h, + PixmapPtr pPixmap) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(pScrn); + uint32_t format, ms3, s5; + BoxPtr pbox = REGION_RECTS(dstRegion); +@@ -417,5 +418,6 @@ + intel_batch_end_atomic(pScrn); + + i830MarkSync(pScrn); ++#endif + } + +diff -uNr xf86-video-intel-2.6.3/src/i965_render.c xf86-video-intel-2.6.3/src/i965_render.c +--- xf86-video-intel-2.6.3/src/i965_render.c 2009-02-28 20:28:53.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i965_render.c 2009-11-25 21:38:35.000000000 +0000 +@@ -524,6 +524,7 @@ + static drm_intel_bo * + gen4_create_sf_state(ScrnInfoPtr scrn, drm_intel_bo *kernel_bo) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + struct brw_sf_unit_state *sf_state; + drm_intel_bo *sf_state_bo; +@@ -570,6 +571,9 @@ + drm_intel_bo_unmap(sf_state_bo); + + return sf_state_bo; ++#else ++ return NULL; ++#endif + } + + static drm_intel_bo * +@@ -597,6 +601,7 @@ + sampler_state_extend_t extend, + drm_intel_bo *border_color_bo) + { ++#ifndef FISH + uint32_t sampler_state_offset; + + sampler_state_offset = (char *)sampler_state - +@@ -654,6 +659,7 @@ + I915_GEM_DOMAIN_SAMPLER, 0) >> 5; + + sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */ ++#endif + } + + static drm_intel_bo * +@@ -695,6 +701,7 @@ + int dst_blend, + drm_intel_bo *cc_vp_bo) + { ++#ifndef FISH + struct brw_cc_unit_state *cc_state; + + cc_state = (struct brw_cc_unit_state *)((char *)cc_state_bo->virtual + +@@ -730,6 +737,7 @@ + + cc_state->cc6.src_blend_factor = src_blend; + cc_state->cc6.dest_blend_factor = dst_blend; ++#endif + } + + static drm_intel_bo * +@@ -737,6 +745,7 @@ + Bool has_mask, drm_intel_bo *kernel_bo, + drm_intel_bo *sampler_bo) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + struct brw_wm_unit_state *wm_state; + drm_intel_bo *wm_state_bo; +@@ -797,6 +806,9 @@ + drm_intel_bo_unmap(wm_state_bo); + + return wm_state_bo; ++#else ++ return NULL; ++#endif + } + + static drm_intel_bo * +@@ -920,6 +932,7 @@ + PicturePtr pPicture, PixmapPtr pPixmap, + Bool is_dst) + { ++#ifndef FISH + struct brw_surface_state_padded *ss; + struct brw_surface_state local_ss; + dri_bo *pixmap_bo = i830_get_pixmap_bo(pPixmap); +@@ -983,11 +996,13 @@ + offsetof(struct brw_surface_state, ss1), + pixmap_bo); + } ++#endif + } + + static void + i965_emit_composite_state(ScrnInfoPtr pScrn) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(pScrn); + struct gen4_render_state *render_state= pI830->gen4_render_state; + gen4_composite_op *composite_op = &render_state->composite_op; +@@ -1221,6 +1236,7 @@ + ErrorF("try to sync to show any errors...\n"); + I830Sync(pScrn); + #endif ++#endif + } + + /** +@@ -1258,6 +1274,7 @@ + PicturePtr pMaskPicture, PicturePtr pDstPicture, + PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst) + { ++#ifndef FISH + ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + struct gen4_render_state *render_state= pI830->gen4_render_state; +@@ -1409,11 +1426,15 @@ + render_state->needs_state_emit = TRUE; + + return TRUE; ++#else ++ return FALSE; ++#endif + } + + static drm_intel_bo * + i965_get_vb_space(ScrnInfoPtr pScrn) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(pScrn); + struct gen4_render_state *render_state = pI830->gen4_render_state; + +@@ -1436,12 +1457,16 @@ + + drm_intel_bo_reference(render_state->vertex_buffer_bo); + return render_state->vertex_buffer_bo; ++#else ++return NULL; ++#endif + } + + void + i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY, + int dstX, int dstY, int w, int h) + { ++#ifndef FISH + ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum]; + I830Ptr pI830 = I830PTR(pScrn); + struct gen4_render_state *render_state = pI830->gen4_render_state; +@@ -1609,6 +1634,7 @@ + ErrorF("sync after 3dprimitive\n"); + I830Sync(pScrn); + #endif ++#endif + } + + void +diff -uNr xf86-video-intel-2.6.3/src/i965_video.c xf86-video-intel-2.6.3/src/i965_video.c +--- xf86-video-intel-2.6.3/src/i965_video.c 2009-02-28 20:28:53.000000000 +0000 ++++ xf86-video-intel-2.6.3/src/i965_video.c 2009-11-25 21:30:33.000000000 +0000 +@@ -349,6 +349,7 @@ + i965_create_dst_surface_state(ScrnInfoPtr scrn, + PixmapPtr pixmap) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + struct brw_surface_state *dest_surf_state; + drm_intel_bo *pixmap_bo = i830_get_pixmap_bo(pixmap); +@@ -393,6 +394,9 @@ + + drm_intel_bo_unmap(surf_bo); + return surf_bo; ++#else ++ return NULL; ++#endif + } + + static drm_intel_bo * +@@ -404,6 +408,7 @@ + int src_pitch, + uint32_t src_surf_format) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + drm_intel_bo *surface_bo; + struct brw_surface_state *src_surf_state; +@@ -439,11 +444,16 @@ + + drm_intel_bo_unmap(surface_bo); + return surface_bo; ++#else ++return NULL; ++#endif ++ + } + + static drm_intel_bo * + i965_create_binding_table(ScrnInfoPtr scrn, drm_intel_bo **surf_bos, int n_surf) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + drm_intel_bo *bind_bo; + uint32_t *binding_table; +@@ -462,6 +472,10 @@ + + drm_intel_bo_unmap(bind_bo); + return bind_bo; ++#else ++ ++ return NULL; ++#endif + } + + static drm_intel_bo * +@@ -526,6 +540,7 @@ + static drm_intel_bo * + i965_create_sf_state(ScrnInfoPtr scrn) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + drm_intel_bo *sf_bo, *kernel_bo; + struct brw_sf_unit_state *sf_state; +@@ -580,11 +595,15 @@ + + drm_intel_bo_unmap(sf_bo); + return sf_bo; ++#else ++ return NULL; ++#endif + } + + static drm_intel_bo * + i965_create_wm_state(ScrnInfoPtr scrn, drm_intel_bo *sampler_bo, Bool is_packed) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(scrn); + drm_intel_bo *wm_bo, *kernel_bo; + struct brw_wm_unit_state *wm_state; +@@ -641,6 +660,9 @@ + + drm_intel_bo_unmap(wm_bo); + return wm_bo; ++#else ++ return NULL; ++#endif + } + + static drm_intel_bo * +@@ -664,6 +686,7 @@ + static drm_intel_bo * + i965_create_cc_state(ScrnInfoPtr scrn) + { ++#if 0 + I830Ptr pI830 = I830PTR(scrn); + drm_intel_bo *cc_bo, *cc_vp_bo; + struct brw_cc_unit_state *cc_state; +@@ -701,11 +724,15 @@ + + drm_intel_bo_unreference(cc_vp_bo); + return cc_bo; ++#else ++return NULL; ++#endif + } + + static void + i965_emit_video_setup(ScrnInfoPtr pScrn, drm_intel_bo *bind_bo, int n_src_surf) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(pScrn); + int urb_vs_start, urb_vs_size; + int urb_gs_start, urb_gs_size; +@@ -874,6 +901,7 @@ + + OUT_BATCH(MI_NOOP); /* pad to quadword */ + ADVANCE_BATCH(); ++#endif + } + + void +@@ -885,6 +913,7 @@ + short drw_w, short drw_h, + PixmapPtr pPixmap) + { ++#ifndef FISH + I830Ptr pI830 = I830PTR(pScrn); + BoxPtr pbox; + int nbox, dxo, dyo, pix_xoff, pix_yoff; +@@ -1160,6 +1189,7 @@ + #if WATCH_STATS + i830_dump_error_state(pScrn); + #endif ++#endif + } + + void -- 2.39.5