/root/src/xen/xen/arch/x86/cpu/mcheck/barrier.c
Line | Count | Source (jump to first uncovered line) |
1 | | #include "barrier.h" |
2 | | #include "util.h" |
3 | | #include "mce.h" |
4 | | |
5 | | void mce_barrier_init(struct mce_softirq_barrier *bar) |
6 | 0 | { |
7 | 0 | atomic_set(&bar->val, 0); |
8 | 0 | atomic_set(&bar->ingen, 0); |
9 | 0 | atomic_set(&bar->outgen, 0); |
10 | 0 | } |
11 | | |
12 | | void mce_barrier_dec(struct mce_softirq_barrier *bar) |
13 | 0 | { |
14 | 0 | atomic_inc(&bar->outgen); |
15 | 0 | wmb(); |
16 | 0 | atomic_dec(&bar->val); |
17 | 0 | } |
18 | | |
19 | | void mce_barrier_enter(struct mce_softirq_barrier *bar, bool wait) |
20 | 0 | { |
21 | 0 | int gen; |
22 | 0 |
|
23 | 0 | if ( !wait ) |
24 | 0 | return; |
25 | 0 | atomic_inc(&bar->ingen); |
26 | 0 | gen = atomic_read(&bar->outgen); |
27 | 0 | mb(); |
28 | 0 | atomic_inc(&bar->val); |
29 | 0 | while ( atomic_read(&bar->val) != num_online_cpus() && |
30 | 0 | atomic_read(&bar->outgen) == gen ) |
31 | 0 | { |
32 | 0 | mb(); |
33 | 0 | mce_panic_check(); |
34 | 0 | } |
35 | 0 | } |
36 | | |
37 | | void mce_barrier_exit(struct mce_softirq_barrier *bar, bool wait) |
38 | 0 | { |
39 | 0 | int gen; |
40 | 0 |
|
41 | 0 | if ( !wait ) |
42 | 0 | return; |
43 | 0 | atomic_inc(&bar->outgen); |
44 | 0 | gen = atomic_read(&bar->ingen); |
45 | 0 | mb(); |
46 | 0 | atomic_dec(&bar->val); |
47 | 0 | while ( atomic_read(&bar->val) != 0 && |
48 | 0 | atomic_read(&bar->ingen) == gen ) |
49 | 0 | { |
50 | 0 | mb(); |
51 | 0 | mce_panic_check(); |
52 | 0 | } |
53 | 0 | } |
54 | | |
55 | | void mce_barrier(struct mce_softirq_barrier *bar) |
56 | 0 | { |
57 | 0 | mce_barrier_enter(bar, mce_broadcast); |
58 | 0 | mce_barrier_exit(bar, mce_broadcast); |
59 | 0 | } |