Coverage Report

Created: 2017-10-25 09:10

/root/src/xen/xen/arch/x86/mpparse.c
Line
Count
Source (jump to first uncovered line)
1
/*
2
 *  Intel Multiprocessor Specification 1.1 and 1.4
3
 *  compliant MP-table parsing routines.
4
 *
5
 *  (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6
 *  (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7
 *
8
 *  Fixes
9
 *    Erich Boleyn  : MP v1.4 and additional changes.
10
 *    Alan Cox  : Added EBDA scanning
11
 *    Ingo Molnar : various cleanups and rewrites
12
 *    Maciej W. Rozycki:  Bits for default MP configurations
13
 *    Paul Diefenbaugh: Added full ACPI support
14
 */
15
16
#include <xen/types.h>
17
#include <xen/irq.h>
18
#include <xen/init.h>
19
#include <xen/acpi.h>
20
#include <xen/delay.h>
21
#include <xen/efi.h>
22
#include <xen/sched.h>
23
24
#include <xen/bitops.h>
25
#include <asm/smp.h>
26
#include <asm/acpi.h>
27
#include <asm/mtrr.h>
28
#include <asm/mpspec.h>
29
#include <asm/io_apic.h>
30
#include <asm/setup.h>
31
32
#include <mach_apic.h>
33
#include <mach_mpparse.h>
34
#include <bios_ebda.h>
35
36
/* Have we found an MP table */
37
bool __initdata smp_found_config;
38
39
/*
40
 * Various Linux-internal data structures created from the
41
 * MP-table.
42
 */
43
unsigned char __read_mostly apic_version[MAX_APICS];
44
unsigned char __read_mostly mp_bus_id_to_type[MAX_MP_BUSSES];
45
46
/* I/O APIC entries */
47
struct mpc_config_ioapic __read_mostly mp_ioapics[MAX_IO_APICS];
48
49
/* # of MP IRQ source entries */
50
struct mpc_config_intsrc __read_mostly mp_irqs[MAX_IRQ_SOURCES];
51
52
/* MP IRQ source entries */
53
int __read_mostly mp_irq_entries;
54
55
bool __read_mostly pic_mode;
56
bool __read_mostly def_to_bigsmp;
57
unsigned long __read_mostly mp_lapic_addr;
58
59
/* Processor that is doing the boot up */
60
unsigned int __read_mostly boot_cpu_physical_apicid = BAD_APICID;
61
62
/* Internal processor count */
63
static unsigned int num_processors;
64
static unsigned int __initdata disabled_cpus;
65
66
/* Bitmask of physically existing CPUs */
67
physid_mask_t phys_cpu_present_map;
68
69
void __init set_nr_cpu_ids(unsigned int max_cpus)
70
1
{
71
1
  if (!max_cpus)
72
1
    max_cpus = num_processors + disabled_cpus;
73
1
  if (max_cpus > NR_CPUS)
74
0
    max_cpus = NR_CPUS;
75
1
  else if (!max_cpus)
76
0
    max_cpus = 1;
77
1
  printk(XENLOG_INFO "SMP: Allowing %u CPUs (%d hotplug CPUs)\n",
78
1
         max_cpus, max_t(int, max_cpus - num_processors, 0));
79
1
  nr_cpu_ids = max_cpus;
80
1
81
1
#ifndef nr_cpumask_bits
82
  nr_cpumask_bits = (max_cpus + (BITS_PER_LONG - 1)) &
83
        ~(BITS_PER_LONG - 1);
84
  printk(XENLOG_DEBUG "NR_CPUS:%u nr_cpumask_bits:%u\n",
85
         NR_CPUS, nr_cpumask_bits);
86
#endif
87
1
}
88
89
void __init set_nr_sockets(void)
90
1
{
91
1
  nr_sockets = last_physid(phys_cpu_present_map)
92
1
         / boot_cpu_data.x86_max_cores
93
1
         / boot_cpu_data.x86_num_siblings + 1;
94
1
  if (disabled_cpus)
95
0
    nr_sockets += (disabled_cpus - 1)
96
0
            / boot_cpu_data.x86_max_cores
97
0
            / boot_cpu_data.x86_num_siblings + 1;
98
1
  printk(XENLOG_DEBUG "nr_sockets: %u\n", nr_sockets);
99
1
}
100
101
/*
102
 * Intel MP BIOS table parsing routines:
103
 */
104
105
106
/*
107
 * Checksum an MP configuration block.
108
 */
109
110
static int __init mpf_checksum(unsigned char *mp, int len)
111
1
{
112
1
  int sum = 0;
113
1
114
17
  while (len--)
115
16
    sum += *mp++;
116
1
117
1
  return sum & 0xFF;
118
1
}
119
120
/* Return xen's logical cpu_id of the new added cpu or <0 if error */
121
static int MP_processor_info_x(struct mpc_config_processor *m,
122
             u32 apicid, bool hotplug)
123
12
{
124
12
  int ver, cpu = 0;
125
12
  
126
12
  if (!(m->mpc_cpuflag & CPU_ENABLED)) {
127
0
    if (!hotplug)
128
0
      ++disabled_cpus;
129
0
    return -EINVAL;
130
0
  }
131
12
132
12
  if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
133
1
    Dprintk("    Bootup CPU\n");
134
1
    boot_cpu_physical_apicid = apicid;
135
1
  }
136
12
137
12
  ver = m->mpc_apicver;
138
12
139
12
  /*
140
12
   * Validate version
141
12
   */
142
12
  if (ver == 0x0) {
143
0
    printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! "
144
0
        "fixing up to 0x10. (tell your hw vendor)\n",
145
0
        apicid);
146
0
    ver = 0x10;
147
0
  }
148
12
  apic_version[apicid] = ver;
149
12
150
12
  set_apicid(apicid, &phys_cpu_present_map);
151
12
152
12
  if (num_processors >= nr_cpu_ids) {
153
0
    printk(KERN_WARNING "WARNING: NR_CPUS limit of %u reached."
154
0
      "  Processor ignored.\n", nr_cpu_ids);
155
0
    return -ENOSPC;
156
0
  }
157
12
158
12
  if (num_processors >= 8 && hotplug && genapic == &apic_default) {
159
0
    printk(KERN_WARNING "WARNING: CPUs limit of 8 reached."
160
0
      " Processor ignored.\n");
161
0
    return -ENOSPC;
162
0
  }
163
12
164
12
  /* Boot cpu has been marked present in smp_prepare_boot_cpu */
165
12
  if (!(m->mpc_cpuflag & CPU_BOOTPROCESSOR)) {
166
11
    cpu = alloc_cpu_id();
167
11
    if (cpu < 0) {
168
0
      printk(KERN_WARNING "WARNING: Can't alloc cpu_id."
169
0
             " Processor with apicid %i ignored\n", apicid);
170
0
      return cpu;
171
0
    }
172
11
    x86_cpu_to_apicid[cpu] = apicid;
173
11
    cpumask_set_cpu(cpu, &cpu_present_map);
174
11
  }
175
12
176
12
  if (++num_processors > 8) {
177
4
    /*
178
4
     * No need for processor or APIC checks: physical delivery
179
4
     * (bigsmp) mode should always work.
180
4
     */
181
4
    def_to_bigsmp = true;
182
4
  }
183
12
184
12
  return cpu;
185
12
}
186
187
static int MP_processor_info(struct mpc_config_processor *m)
188
0
{
189
0
  return MP_processor_info_x(m, m->mpc_apicid, 0);
190
0
}
191
192
static void __init MP_bus_info (struct mpc_config_bus *m)
193
0
{
194
0
  char str[7];
195
0
196
0
  memcpy(str, m->mpc_bustype, 6);
197
0
  str[6] = 0;
198
0
199
0
#if 0 /* size of mpc_busid (8 bits) makes this check unnecessary */
200
  if (m->mpc_busid >= MAX_MP_BUSSES) {
201
    printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
202
      " is too large, max. supported is %d\n",
203
      m->mpc_busid, str, MAX_MP_BUSSES - 1);
204
    return;
205
  }
206
#endif
207
0
208
0
  if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA)-1) == 0) {
209
0
    mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
210
0
  } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA)-1) == 0) {
211
0
    mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
212
0
  } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI)-1) == 0) {
213
0
    mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
214
0
  } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA)-1) == 0) {
215
0
    mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
216
0
  } else if (strncmp(str, BUSTYPE_NEC98, sizeof(BUSTYPE_NEC98)-1) == 0) {
217
0
    mp_bus_id_to_type[m->mpc_busid] = MP_BUS_NEC98;
218
0
  } else {
219
0
    printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
220
0
  }
221
0
}
222
223
static void __init MP_ioapic_info (struct mpc_config_ioapic *m)
224
0
{
225
0
  if (!(m->mpc_flags & MPC_APIC_USABLE))
226
0
    return;
227
0
228
0
  printk(KERN_INFO "I/O APIC #%d Version %d at %#x.\n",
229
0
    m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
230
0
  if (nr_ioapics >= MAX_IO_APICS) {
231
0
    printk(KERN_CRIT "Max # of I/O APICs (%d) exceeded (found %d).\n",
232
0
      MAX_IO_APICS, nr_ioapics);
233
0
    panic("Recompile kernel with bigger MAX_IO_APICS");
234
0
  }
235
0
  if (!m->mpc_apicaddr) {
236
0
    printk(KERN_ERR "WARNING: bogus zero I/O APIC address"
237
0
      " found in MP table, skipping!\n");
238
0
    return;
239
0
  }
240
0
  mp_ioapics[nr_ioapics] = *m;
241
0
  nr_ioapics++;
242
0
}
243
244
static void __init MP_intsrc_info (struct mpc_config_intsrc *m)
245
0
{
246
0
  mp_irqs [mp_irq_entries] = *m;
247
0
  Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
248
0
    " IRQ %02x, APIC ID %x, APIC INT %02x\n",
249
0
      m->mpc_irqtype, m->mpc_irqflag & 3,
250
0
      (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
251
0
      m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
252
0
  if (++mp_irq_entries == MAX_IRQ_SOURCES)
253
0
    panic("Max # of irq sources exceeded");
254
0
}
255
256
static void __init MP_lintsrc_info (struct mpc_config_lintsrc *m)
257
0
{
258
0
  Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
259
0
    " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
260
0
      m->mpc_irqtype, m->mpc_irqflag & 3,
261
0
      (m->mpc_irqflag >> 2) &3, m->mpc_srcbusid,
262
0
      m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
263
0
  /*
264
0
   * Well it seems all SMP boards in existence
265
0
   * use ExtINT/LVT1 == LINT0 and
266
0
   * NMI/LVT2 == LINT1 - the following check
267
0
   * will show us if this assumptions is false.
268
0
   * Until then we do not have to add baggage.
269
0
   */
270
0
  if ((m->mpc_irqtype == mp_ExtINT) &&
271
0
    (m->mpc_destapiclint != 0))
272
0
      BUG();
273
0
  if ((m->mpc_irqtype == mp_NMI) &&
274
0
    (m->mpc_destapiclint != 1))
275
0
      BUG();
276
0
}
277
278
/*
279
 * Read/parse the MPC
280
 */
281
282
static int __init smp_read_mpc(struct mp_config_table *mpc)
283
0
{
284
0
  char str[16];
285
0
  char oem[10];
286
0
  int count=sizeof(*mpc);
287
0
  unsigned char *mpt=((unsigned char *)mpc)+count;
288
0
289
0
  if (memcmp(mpc->mpc_signature,MPC_SIGNATURE,4)) {
290
0
    printk(KERN_ERR "SMP mptable: bad signature [%#x]!\n",
291
0
      *(u32 *)mpc->mpc_signature);
292
0
    return 0;
293
0
  }
294
0
  if (mpf_checksum((unsigned char *)mpc,mpc->mpc_length)) {
295
0
    printk(KERN_ERR "SMP mptable: checksum error!\n");
296
0
    return 0;
297
0
  }
298
0
  if (mpc->mpc_spec!=0x01 && mpc->mpc_spec!=0x04) {
299
0
    printk(KERN_ERR "SMP mptable: bad table version (%d)!!\n",
300
0
      mpc->mpc_spec);
301
0
    return 0;
302
0
  }
303
0
  if (!mpc->mpc_lapic) {
304
0
    printk(KERN_ERR "SMP mptable: null local APIC address!\n");
305
0
    return 0;
306
0
  }
307
0
  memcpy(oem,mpc->mpc_oem,8);
308
0
  oem[8]=0;
309
0
  printk(KERN_INFO "OEM ID: %s ",oem);
310
0
311
0
  memcpy(str,mpc->mpc_productid,12);
312
0
  str[12]=0;
313
0
  printk("Product ID: %s ",str);
314
0
315
0
  mps_oem_check(mpc, oem, str);
316
0
317
0
  printk("APIC at: %#x\n", mpc->mpc_lapic);
318
0
319
0
  /* 
320
0
   * Save the local APIC address (it might be non-default) -- but only
321
0
   * if we're not using ACPI.
322
0
   */
323
0
  if (!acpi_lapic)
324
0
    mp_lapic_addr = mpc->mpc_lapic;
325
0
326
0
  /*
327
0
   *  Now process the configuration blocks.
328
0
   */
329
0
  while (count < mpc->mpc_length) {
330
0
    switch(*mpt) {
331
0
      case MP_PROCESSOR:
332
0
      {
333
0
        struct mpc_config_processor *m=
334
0
          (struct mpc_config_processor *)mpt;
335
0
336
0
        mpt += sizeof(*m);
337
0
        count += sizeof(*m);
338
0
339
0
        /* ACPI may have already provided this data. */
340
0
        if (acpi_lapic)
341
0
          break;
342
0
343
0
        printk("Processor #%02x %u:%u APIC version %u%s\n",
344
0
               m->mpc_apicid,
345
0
               MASK_EXTR(m->mpc_cpufeature,
346
0
             CPU_FAMILY_MASK),
347
0
               MASK_EXTR(m->mpc_cpufeature,
348
0
             CPU_MODEL_MASK),
349
0
               m->mpc_apicver,
350
0
               m->mpc_cpuflag & CPU_ENABLED
351
0
               ? "" : " [disabled]");
352
0
        MP_processor_info(m);
353
0
        break;
354
0
      }
355
0
      case MP_BUS:
356
0
      {
357
0
        struct mpc_config_bus *m=
358
0
          (struct mpc_config_bus *)mpt;
359
0
        MP_bus_info(m);
360
0
        mpt += sizeof(*m);
361
0
        count += sizeof(*m);
362
0
        break;
363
0
      }
364
0
      case MP_IOAPIC:
365
0
      {
366
0
        struct mpc_config_ioapic *m=
367
0
          (struct mpc_config_ioapic *)mpt;
368
0
        MP_ioapic_info(m);
369
0
        mpt+=sizeof(*m);
370
0
        count+=sizeof(*m);
371
0
        break;
372
0
      }
373
0
      case MP_INTSRC:
374
0
      {
375
0
        struct mpc_config_intsrc *m=
376
0
          (struct mpc_config_intsrc *)mpt;
377
0
378
0
        MP_intsrc_info(m);
379
0
        mpt+=sizeof(*m);
380
0
        count+=sizeof(*m);
381
0
        break;
382
0
      }
383
0
      case MP_LINTSRC:
384
0
      {
385
0
        struct mpc_config_lintsrc *m=
386
0
          (struct mpc_config_lintsrc *)mpt;
387
0
        MP_lintsrc_info(m);
388
0
        mpt+=sizeof(*m);
389
0
        count+=sizeof(*m);
390
0
        break;
391
0
      }
392
0
      default:
393
0
      {
394
0
        count = mpc->mpc_length;
395
0
        break;
396
0
      }
397
0
    }
398
0
  }
399
0
  clustered_apic_check();
400
0
  if (!num_processors)
401
0
    printk(KERN_ERR "SMP mptable: no processors registered!\n");
402
0
  return num_processors;
403
0
}
404
405
static int __init ELCR_trigger(unsigned int irq)
406
0
{
407
0
  unsigned int port;
408
0
409
0
  port = 0x4d0 + (irq >> 3);
410
0
  return (inb(port) >> (irq & 7)) & 1;
411
0
}
412
413
static void __init construct_default_ioirq_mptable(int mpc_default_type)
414
0
{
415
0
  struct mpc_config_intsrc intsrc;
416
0
  int i;
417
0
  int ELCR_fallback = 0;
418
0
419
0
  intsrc.mpc_type = MP_INTSRC;
420
0
  intsrc.mpc_irqflag = 0;     /* conforming */
421
0
  intsrc.mpc_srcbus = 0;
422
0
  intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
423
0
424
0
  intsrc.mpc_irqtype = mp_INT;
425
0
426
0
  /*
427
0
   *  If true, we have an ISA/PCI system with no IRQ entries
428
0
   *  in the MP table. To prevent the PCI interrupts from being set up
429
0
   *  incorrectly, we try to use the ELCR. The sanity check to see if
430
0
   *  there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
431
0
   *  never be level sensitive, so we simply see if the ELCR agrees.
432
0
   *  If it does, we assume it's valid.
433
0
   */
434
0
  if (mpc_default_type == 5) {
435
0
    printk(KERN_INFO "ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
436
0
437
0
    if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || ELCR_trigger(13))
438
0
      printk(KERN_WARNING "ELCR contains invalid data... not using ELCR\n");
439
0
    else {
440
0
      printk(KERN_INFO "Using ELCR to identify PCI interrupts\n");
441
0
      ELCR_fallback = 1;
442
0
    }
443
0
  }
444
0
445
0
  for (i = 0; platform_legacy_irq(i); i++) {
446
0
    switch (mpc_default_type) {
447
0
    case 2:
448
0
      if (i == 0 || i == 13)
449
0
        continue; /* IRQ0 & IRQ13 not connected */
450
0
      /* fall through */
451
0
    default:
452
0
      if (i == 2)
453
0
        continue; /* IRQ2 is never connected */
454
0
    }
455
0
456
0
    if (ELCR_fallback) {
457
0
      /*
458
0
       *  If the ELCR indicates a level-sensitive interrupt, we
459
0
       *  copy that information over to the MP table in the
460
0
       *  irqflag field (level sensitive, active high polarity).
461
0
       */
462
0
      if (ELCR_trigger(i))
463
0
        intsrc.mpc_irqflag = 13;
464
0
      else
465
0
        intsrc.mpc_irqflag = 0;
466
0
    }
467
0
468
0
    intsrc.mpc_srcbusirq = i;
469
0
    intsrc.mpc_dstirq = i ? i : 2;   /* IRQ0 to INTIN2 */
470
0
    MP_intsrc_info(&intsrc);
471
0
  }
472
0
473
0
  intsrc.mpc_irqtype = mp_ExtINT;
474
0
  intsrc.mpc_srcbusirq = 0;
475
0
  intsrc.mpc_dstirq = 0;        /* 8259A to INTIN0 */
476
0
  MP_intsrc_info(&intsrc);
477
0
}
478
479
static inline void __init construct_default_ISA_mptable(int mpc_default_type)
480
0
{
481
0
  struct mpc_config_processor processor;
482
0
  struct mpc_config_bus bus;
483
0
  struct mpc_config_ioapic ioapic;
484
0
  struct mpc_config_lintsrc lintsrc;
485
0
  int linttypes[2] = { mp_ExtINT, mp_NMI };
486
0
  int i;
487
0
488
0
  /*
489
0
   * local APIC has default address
490
0
   */
491
0
  mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
492
0
493
0
  /*
494
0
   * 2 CPUs, numbered 0 & 1.
495
0
   */
496
0
  processor.mpc_type = MP_PROCESSOR;
497
0
  /* Either an integrated APIC or a discrete 82489DX. */
498
0
  processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
499
0
  processor.mpc_cpuflag = CPU_ENABLED;
500
0
  processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
501
0
           (boot_cpu_data.x86_model << 4) |
502
0
           boot_cpu_data.x86_mask;
503
0
  processor.mpc_featureflag =
504
0
            boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_FPU)];
505
0
  processor.mpc_reserved[0] = 0;
506
0
  processor.mpc_reserved[1] = 0;
507
0
  for (i = 0; i < 2; i++) {
508
0
    processor.mpc_apicid = i;
509
0
    MP_processor_info(&processor);
510
0
  }
511
0
512
0
  bus.mpc_type = MP_BUS;
513
0
  bus.mpc_busid = 0;
514
0
  switch (mpc_default_type) {
515
0
    default:
516
0
      printk("???\n");
517
0
      printk(KERN_ERR "Unknown standard configuration %d\n",
518
0
        mpc_default_type);
519
0
      /* fall through */
520
0
    case 1:
521
0
    case 5:
522
0
      memcpy(bus.mpc_bustype, "ISA   ", 6);
523
0
      break;
524
0
    case 2:
525
0
    case 6:
526
0
    case 3:
527
0
      memcpy(bus.mpc_bustype, "EISA  ", 6);
528
0
      break;
529
0
    case 4:
530
0
    case 7:
531
0
      memcpy(bus.mpc_bustype, "MCA   ", 6);
532
0
  }
533
0
  MP_bus_info(&bus);
534
0
  if (mpc_default_type > 4) {
535
0
    bus.mpc_busid = 1;
536
0
    memcpy(bus.mpc_bustype, "PCI   ", 6);
537
0
    MP_bus_info(&bus);
538
0
  }
539
0
540
0
  ioapic.mpc_type = MP_IOAPIC;
541
0
  ioapic.mpc_apicid = 2;
542
0
  ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
543
0
  ioapic.mpc_flags = MPC_APIC_USABLE;
544
0
  ioapic.mpc_apicaddr = 0xFEC00000;
545
0
  MP_ioapic_info(&ioapic);
546
0
547
0
  /*
548
0
   * We set up most of the low 16 IO-APIC pins according to MPS rules.
549
0
   */
550
0
  construct_default_ioirq_mptable(mpc_default_type);
551
0
552
0
  lintsrc.mpc_type = MP_LINTSRC;
553
0
  lintsrc.mpc_irqflag = 0;    /* conforming */
554
0
  lintsrc.mpc_srcbusid = 0;
555
0
  lintsrc.mpc_srcbusirq = 0;
556
0
  lintsrc.mpc_destapic = MP_APIC_ALL;
557
0
  for (i = 0; i < 2; i++) {
558
0
    lintsrc.mpc_irqtype = linttypes[i];
559
0
    lintsrc.mpc_destapiclint = i;
560
0
    MP_lintsrc_info(&lintsrc);
561
0
  }
562
0
}
563
564
static __init void efi_unmap_mpf(void)
565
1
{
566
1
  if (efi_enabled(EFI_BOOT))
567
0
    clear_fixmap(FIX_EFI_MPF);
568
1
}
569
570
static struct intel_mp_floating *__initdata mpf_found;
571
572
/*
573
 * Scan the memory blocks for an SMP configuration block.
574
 */
575
void __init get_smp_config (void)
576
1
{
577
1
  struct intel_mp_floating *mpf = mpf_found;
578
1
579
1
  /*
580
1
   * ACPI supports both logical (e.g. Hyper-Threading) and physical 
581
1
   * processors, where MPS only supports physical.
582
1
   */
583
1
  if (acpi_lapic && acpi_ioapic) {
584
1
    efi_unmap_mpf();
585
1
    printk(KERN_INFO "Using ACPI (MADT) for SMP configuration information\n");
586
1
    return;
587
1
  }
588
0
  else if (acpi_lapic)
589
0
    printk(KERN_INFO "Using ACPI for processor (LAPIC) configuration information\n");
590
1
591
0
  printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", mpf->mpf_specification);
592
0
  if (mpf->mpf_feature2 & (1<<7)) {
593
0
    printk(KERN_INFO "    IMCR and PIC compatibility mode.\n");
594
0
    pic_mode = true;
595
0
  } else {
596
0
    printk(KERN_INFO "    Virtual Wire compatibility mode.\n");
597
0
    pic_mode = false;
598
0
  }
599
0
600
0
  /*
601
0
   * Now see if we need to read further.
602
0
   */
603
0
  if (mpf->mpf_feature1 != 0) {
604
0
605
0
    printk(KERN_INFO "Default MP configuration #%d\n", mpf->mpf_feature1);
606
0
    construct_default_ISA_mptable(mpf->mpf_feature1);
607
0
608
0
  } else if (mpf->mpf_physptr) {
609
0
610
0
    /*
611
0
     * Read the physical hardware table.  Anything here will
612
0
     * override the defaults.
613
0
     */
614
0
    if (!smp_read_mpc((void *)(unsigned long)mpf->mpf_physptr)) {
615
0
      efi_unmap_mpf();
616
0
      smp_found_config = false;
617
0
      printk(KERN_ERR "BIOS bug, MP table errors detected!...\n");
618
0
      printk(KERN_ERR "... disabling SMP support. (tell your hw vendor)\n");
619
0
      return;
620
0
    }
621
0
    /*
622
0
     * If there are no explicit MP IRQ entries, then we are
623
0
     * broken.  We set up most of the low 16 IO-APIC pins to
624
0
     * ISA defaults and hope it will work.
625
0
     */
626
0
    if (!mp_irq_entries) {
627
0
      struct mpc_config_bus bus;
628
0
629
0
      printk(KERN_ERR "BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
630
0
631
0
      bus.mpc_type = MP_BUS;
632
0
      bus.mpc_busid = 0;
633
0
      memcpy(bus.mpc_bustype, "ISA   ", 6);
634
0
      MP_bus_info(&bus);
635
0
636
0
      construct_default_ioirq_mptable(0);
637
0
    }
638
0
639
0
  } else
640
0
    BUG();
641
0
642
0
  efi_unmap_mpf();
643
0
644
0
  printk(KERN_INFO "Processors: %d\n", num_processors);
645
0
  /*
646
0
   * Only use the first configuration found.
647
0
   */
648
0
}
649
650
static int __init smp_scan_config (unsigned long base, unsigned long length)
651
3
{
652
3
  unsigned int *bp = maddr_to_virt(base);
653
3
  struct intel_mp_floating *mpf;
654
3
655
3
  Dprintk("Scan SMP from %p for %ld bytes.\n", bp,length);
656
3
  if (sizeof(*mpf) != 16)
657
0
    printk("Error: MPF size\n");
658
3
659
3.62k
  while (length > 0) {
660
3.62k
    mpf = (struct intel_mp_floating *)bp;
661
3.62k
    if ((*bp == SMP_MAGIC_IDENT) &&
662
1
      (mpf->mpf_length == 1) &&
663
1
      !mpf_checksum((unsigned char *)bp, 16) &&
664
1
      ((mpf->mpf_specification == 1)
665
1
        || (mpf->mpf_specification == 4)) ) {
666
1
667
1
      smp_found_config = true;
668
1
      printk(KERN_INFO "found SMP MP-table at %08lx\n",
669
1
            virt_to_maddr(mpf));
670
1
#if 0
671
      reserve_bootmem(virt_to_maddr(mpf), PAGE_SIZE);
672
      if (mpf->mpf_physptr) {
673
        /*
674
         * We cannot access to MPC table to compute
675
         * table size yet, as only few megabytes from
676
         * the bottom is mapped now.
677
         * PC-9800's MPC table places on the very last
678
         * of physical memory; so that simply reserving
679
         * PAGE_SIZE from mpg->mpf_physptr yields BUG()
680
         * in reserve_bootmem.
681
         */
682
        unsigned long size = PAGE_SIZE;
683
        unsigned long end = max_low_pfn * PAGE_SIZE;
684
        if (mpf->mpf_physptr + size > end)
685
          size = end - mpf->mpf_physptr;
686
        reserve_bootmem(mpf->mpf_physptr, size);
687
      }
688
#endif
689
1
      mpf_found = mpf;
690
1
      return 1;
691
1
    }
692
3.62k
    bp += 4;
693
3.62k
    length -= 16;
694
3.62k
  }
695
2
  return 0;
696
3
}
697
698
static void __init efi_check_config(void)
699
0
{
700
0
  struct intel_mp_floating *mpf;
701
0
702
0
  if (efi.mps == EFI_INVALID_TABLE_ADDR)
703
0
    return;
704
0
705
0
  __set_fixmap(FIX_EFI_MPF, PFN_DOWN(efi.mps), __PAGE_HYPERVISOR);
706
0
  mpf = (void *)fix_to_virt(FIX_EFI_MPF) + ((long)efi.mps & (PAGE_SIZE-1));
707
0
708
0
  if (memcmp(mpf->mpf_signature, "_MP_", 4) == 0 &&
709
0
      mpf->mpf_length == 1 &&
710
0
      mpf_checksum((void *)mpf, 16) &&
711
0
      (mpf->mpf_specification == 1 || mpf->mpf_specification == 4)) {
712
0
    smp_found_config = true;
713
0
    printk(KERN_INFO "SMP MP-table at %08lx\n", efi.mps);
714
0
    mpf_found = mpf;
715
0
  }
716
0
  else
717
0
    efi_unmap_mpf();
718
0
}
719
720
void __init find_smp_config (void)
721
1
{
722
1
  unsigned int address;
723
1
724
1
  if (efi_enabled(EFI_BOOT)) {
725
0
    efi_check_config();
726
0
    return;
727
0
  }
728
1
729
1
  /*
730
1
   * FIXME: Linux assumes you have 640K of base ram..
731
1
   * this continues the error...
732
1
   *
733
1
   * 1) Scan the bottom 1K for a signature
734
1
   * 2) Scan the top 1K of base RAM
735
1
   * 3) Scan the 64K of bios
736
1
   */
737
1
  if (smp_scan_config(0x0,0x400) ||
738
1
    smp_scan_config(639*0x400,0x400) ||
739
1
      smp_scan_config(0xF0000,0x10000))
740
1
    return;
741
1
  /*
742
1
   * If it is an SMP machine we should know now, unless the
743
1
   * configuration is in an EISA/MCA bus machine with an
744
1
   * extended bios data area.
745
1
   *
746
1
   * there is a real-mode segmented pointer pointing to the
747
1
   * 4K EBDA area at 0x40E, calculate and scan it here.
748
1
   *
749
1
   * NOTE! There are Linux loaders that will corrupt the EBDA
750
1
   * area, and as such this kind of SMP config may be less
751
1
   * trustworthy, simply because the SMP table may have been
752
1
   * stomped on during early boot. These loaders are buggy and
753
1
   * should be fixed.
754
1
   *
755
1
   * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
756
1
   */
757
1
758
0
  address = get_bios_ebda();
759
0
  if (address)
760
0
    smp_scan_config(address, 0x400);
761
0
}
762
763
/* --------------------------------------------------------------------------
764
                            ACPI-based MP Configuration
765
   -------------------------------------------------------------------------- */
766
767
#ifdef CONFIG_ACPI
768
769
void __init mp_register_lapic_address (
770
  u64     address)
771
1
{
772
1
  if (!x2apic_enabled) {
773
1
    mp_lapic_addr = (unsigned long) address;
774
1
    set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
775
1
  }
776
1
777
1
  if (boot_cpu_physical_apicid == -1U)
778
1
    boot_cpu_physical_apicid = get_apic_id();
779
1
780
1
  Dprintk("Boot CPU = %d\n", boot_cpu_physical_apicid);
781
1
}
782
783
784
int mp_register_lapic(u32 id, bool enabled, bool hotplug)
785
12
{
786
12
  struct mpc_config_processor processor = {
787
12
    .mpc_type = MP_PROCESSOR,
788
12
    /* Note: We don't fill in fields not consumed anywhere. */
789
12
    .mpc_apicid = id,
790
12
    .mpc_apicver = GET_APIC_VERSION(apic_read(APIC_LVR)),
791
12
    .mpc_cpuflag = (enabled ? CPU_ENABLED : 0) |
792
12
             (id == boot_cpu_physical_apicid ?
793
11
        CPU_BOOTPROCESSOR : 0),
794
12
  };
795
12
  
796
12
  if (MAX_APICS <= id) {
797
0
    printk(KERN_WARNING "Processor #%d invalid (max %d)\n",
798
0
      id, MAX_APICS);
799
0
    return -EINVAL;
800
0
  }
801
12
802
12
  return MP_processor_info_x(&processor, id, hotplug);
803
12
}
804
805
void mp_unregister_lapic(uint32_t apic_id, uint32_t cpu)
806
0
{
807
0
  if (!cpu || (apic_id == boot_cpu_physical_apicid))
808
0
    return;
809
0
810
0
  if (x86_cpu_to_apicid[cpu] != apic_id)
811
0
    return;
812
0
813
0
  physid_clear(apic_id, phys_cpu_present_map);
814
0
815
0
  x86_cpu_to_apicid[cpu] = BAD_APICID;
816
0
  cpumask_clear_cpu(cpu, &cpu_present_map);
817
0
}
818
819
112
#define MP_ISA_BUS    0
820
6
#define MP_MAX_IOAPIC_PIN 127
821
822
static struct mp_ioapic_routing {
823
  int   gsi_base;
824
  int   gsi_end;
825
  unsigned long pin_programmed[BITS_TO_LONGS(MP_MAX_IOAPIC_PIN + 1)];
826
} mp_ioapic_routing[MAX_IO_APICS];
827
828
829
static int mp_find_ioapic (
830
  int     gsi)
831
304
{
832
304
  unsigned int    i;
833
304
834
304
  /* Find the IOAPIC that manages this GSI. */
835
304
  for (i = 0; i < nr_ioapics; i++) {
836
304
    if ((gsi >= mp_ioapic_routing[i].gsi_base)
837
304
      && (gsi <= mp_ioapic_routing[i].gsi_end))
838
304
      return i;
839
304
  }
840
304
841
0
  printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
842
0
843
0
  return -1;
844
304
}
845
  
846
847
void __init mp_register_ioapic (
848
  u8      id, 
849
  u32     address,
850
  u32     gsi_base)
851
2
{
852
2
  int     idx = 0;
853
2
  int     tmpid;
854
2
855
2
  if (nr_ioapics >= MAX_IO_APICS) {
856
0
    printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
857
0
      "(found %d)\n", MAX_IO_APICS, nr_ioapics);
858
0
    panic("Recompile kernel with bigger MAX_IO_APICS");
859
0
  }
860
2
  if (!address) {
861
0
    printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
862
0
      " found in MADT table, skipping!\n");
863
0
    return;
864
0
  }
865
2
866
2
  idx = nr_ioapics++;
867
2
868
2
  mp_ioapics[idx].mpc_type = MP_IOAPIC;
869
2
  mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
870
2
  mp_ioapics[idx].mpc_apicaddr = address;
871
2
872
2
  set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
873
2
  if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
874
2
    && !APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
875
0
    tmpid = io_apic_get_unique_id(idx, id);
876
2
  else
877
2
    tmpid = id;
878
2
  if (tmpid == -1) {
879
0
    nr_ioapics--;
880
0
    return;
881
0
  }
882
2
  mp_ioapics[idx].mpc_apicid = tmpid;
883
2
  mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
884
2
  
885
2
  /* 
886
2
   * Build basic GSI lookup table to facilitate gsi->io_apic lookups
887
2
   * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
888
2
   */
889
2
  mp_ioapic_routing[idx].gsi_base = gsi_base;
890
2
  mp_ioapic_routing[idx].gsi_end = gsi_base + 
891
2
    io_apic_get_redir_entries(idx);
892
2
893
2
  printk("IOAPIC[%d]: apic_id %d, version %d, address %#x, "
894
2
    "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid, 
895
2
    mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr,
896
2
    mp_ioapic_routing[idx].gsi_base,
897
2
    mp_ioapic_routing[idx].gsi_end);
898
2
899
2
  return;
900
2
}
901
902
unsigned __init highest_gsi(void)
903
1
{
904
1
  unsigned x, res = 0;
905
3
  for (x = 0; x < nr_ioapics; x++)
906
2
    if (res < mp_ioapic_routing[x].gsi_end)
907
2
      res = mp_ioapic_routing[x].gsi_end;
908
1
  return res;
909
1
}
910
911
unsigned int io_apic_gsi_base(unsigned int apic)
912
2
{
913
2
  return mp_ioapic_routing[apic].gsi_base;
914
2
}
915
916
void __init mp_override_legacy_irq (
917
  u8      bus_irq,
918
  u8      polarity, 
919
  u8      trigger, 
920
  u32     gsi)
921
2
{
922
2
  struct mpc_config_intsrc intsrc;
923
2
  int     ioapic = -1;
924
2
  int     pin = -1;
925
2
926
2
  /* 
927
2
   * Convert 'gsi' to 'ioapic.pin'.
928
2
   */
929
2
  ioapic = mp_find_ioapic(gsi);
930
2
  if (ioapic < 0)
931
0
    return;
932
2
  pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
933
2
934
2
  /*
935
2
   * TBD: This check is for faulty timer entries, where the override
936
2
   *      erroneously sets the trigger to level, resulting in a HUGE 
937
2
   *      increase of timer interrupts!
938
2
   */
939
2
  if ((bus_irq == 0) && (trigger == 3))
940
0
    trigger = 1;
941
2
942
2
  intsrc.mpc_type = MP_INTSRC;
943
2
  intsrc.mpc_irqtype = mp_INT;
944
2
  intsrc.mpc_irqflag = (trigger << 2) | polarity;
945
2
  intsrc.mpc_srcbus = MP_ISA_BUS;
946
2
  intsrc.mpc_srcbusirq = bus_irq;              /* IRQ */
947
2
  intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;    /* APIC ID */
948
2
  intsrc.mpc_dstirq = pin;            /* INTIN# */
949
2
950
2
  Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
951
2
    intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3, 
952
2
    (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus, 
953
2
    intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
954
2
955
2
  mp_irqs[mp_irq_entries] = intsrc;
956
2
  if (++mp_irq_entries == MAX_IRQ_SOURCES)
957
0
    panic("Max # of irq sources exceeded");
958
2
959
2
  return;
960
2
}
961
962
void __init mp_config_acpi_legacy_irqs (void)
963
1
{
964
1
  struct mpc_config_intsrc intsrc;
965
1
  int     i = 0;
966
1
  int     ioapic = -1;
967
1
968
1
  /* 
969
1
   * Fabricate the legacy ISA bus (bus #31).
970
1
   */
971
1
  mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
972
1
  Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
973
1
974
1
  /* 
975
1
   * Locate the IOAPIC that manages the ISA IRQs (0-15). 
976
1
   */
977
1
  ioapic = mp_find_ioapic(0);
978
1
  if (ioapic < 0)
979
0
    return;
980
1
981
1
  intsrc.mpc_type = MP_INTSRC;
982
1
  intsrc.mpc_irqflag = 0;         /* Conforming */
983
1
  intsrc.mpc_srcbus = MP_ISA_BUS;
984
1
  intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
985
1
986
1
  /* 
987
1
   * Use the default configuration for the IRQs 0-15.  Unless
988
1
   * overriden by (MADT) interrupt source override entries.
989
1
   */
990
17
  for (i = 0; platform_legacy_irq(i); i++) {
991
16
    int idx;
992
16
993
121
    for (idx = 0; idx < mp_irq_entries; idx++) {
994
108
      struct mpc_config_intsrc *irq = mp_irqs + idx;
995
108
996
108
      /* Do we already have a mapping for this ISA IRQ? */
997
108
      if (irq->mpc_srcbus == MP_ISA_BUS && irq->mpc_srcbusirq == i)
998
2
        break;
999
108
1000
108
      /* Do we already have a mapping for this IOAPIC pin */
1001
106
      if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
1002
106
        (irq->mpc_dstirq == i))
1003
1
        break;
1004
106
    }
1005
16
1006
16
    if (idx != mp_irq_entries) {
1007
3
      printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
1008
3
      continue;     /* IRQ already used */
1009
3
    }
1010
16
1011
13
    intsrc.mpc_irqtype = mp_INT;
1012
13
    intsrc.mpc_srcbusirq = i;      /* Identity mapped */
1013
13
    intsrc.mpc_dstirq = i;
1014
13
1015
13
    Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
1016
13
      "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3, 
1017
13
      (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus, 
1018
13
      intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, 
1019
13
      intsrc.mpc_dstirq);
1020
13
1021
13
    mp_irqs[mp_irq_entries] = intsrc;
1022
13
    if (++mp_irq_entries == MAX_IRQ_SOURCES)
1023
0
      panic("Max # of irq sources exceeded");
1024
13
  }
1025
1
}
1026
1027
int mp_register_gsi (u32 gsi, int triggering, int polarity)
1028
301
{
1029
301
  int     ioapic;
1030
301
  int     ioapic_pin;
1031
301
  struct irq_desc * desc;
1032
301
  unsigned long   flags;
1033
301
1034
301
  /*
1035
301
   * Mapping between Global System Interrups, which
1036
301
   * represent all possible interrupts, and IRQs
1037
301
   * assigned to actual devices.
1038
301
   */
1039
301
1040
301
#ifdef CONFIG_ACPI_BUS
1041
  /* Don't set up the ACPI SCI because it's already set up */
1042
  if (acpi_fadt.sci_int == gsi)
1043
    return gsi;
1044
#endif
1045
301
1046
301
  if (!nr_ioapics) {
1047
0
    unsigned int port = 0x4d0 + (gsi >> 3);
1048
0
    u8 val;
1049
0
1050
0
    if (!platform_legacy_irq(gsi))
1051
0
      return -EINVAL;
1052
0
    val = inb(port);
1053
0
    if (triggering)
1054
0
      val |= 1 << (gsi & 7);
1055
0
    else
1056
0
      val &= ~(1 << (gsi & 7));
1057
0
    outb(val, port);
1058
0
    return 0;
1059
0
  }
1060
301
1061
301
  ioapic = mp_find_ioapic(gsi);
1062
301
  if (ioapic < 0) {
1063
0
    printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
1064
0
    return -EINVAL;
1065
0
  }
1066
301
1067
301
  ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
1068
301
1069
301
  desc = irq_to_desc(gsi);
1070
301
  spin_lock_irqsave(&desc->lock, flags);
1071
301
  if (!(desc->status & IRQ_DISABLED) && desc->handler != &no_irq_type) {
1072
295
    spin_unlock_irqrestore(&desc->lock, flags);
1073
295
    return -EEXIST;
1074
295
  }
1075
6
  spin_unlock_irqrestore(&desc->lock, flags);
1076
6
1077
6
  /* 
1078
6
   * Avoid pin reprogramming.  PRTs typically include entries  
1079
6
   * with redundant pin->gsi mappings (but unique PCI devices);
1080
6
   * we only program the IOAPIC on the first.
1081
6
   */
1082
6
  if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
1083
0
    printk(KERN_ERR "Invalid reference to IOAPIC pin "
1084
0
      "%d-%d\n", mp_ioapics[ioapic].mpc_apicid,
1085
0
      ioapic_pin);
1086
0
    return -EINVAL;
1087
0
  }
1088
6
  if (test_and_set_bit(ioapic_pin,
1089
0
           mp_ioapic_routing[ioapic].pin_programmed)) {
1090
0
    Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
1091
0
      mp_ioapics[ioapic].mpc_apicid, ioapic_pin);
1092
0
    return -EEXIST;
1093
0
  }
1094
6
1095
6
  return io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
1096
6
               triggering, polarity);
1097
6
}
1098
1099
#endif /* CONFIG_ACPI */