/root/src/xen/xen/include/xen/vpci.h

Source
#ifndef _XEN_VPCI_H_
#define _XEN_VPCI_H_

#ifdef CONFIG_HAS_PCI

#include <xen/pci.h>
#include <xen/types.h>
#include <xen/list.h>

typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg,
                             void *data);

typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg,
                          uint32_t val, void *data);

typedef int vpci_register_init_t(struct pci_dev *dev);

#define VPCI_PRIORITY_HIGH      "1"
#define VPCI_PRIORITY_MIDDLE    "5"
#define VPCI_PRIORITY_LOW       "9"

#define REGISTER_VPCI_INIT(x, p)                \
  static vpci_register_init_t *const x##_entry  \
               __used_section(".data.vpci." p) = x

/* Add vPCI handlers to device. */
int __must_check vpci_add_handlers(struct pci_dev *dev);

/* Add/remove a register handler. */
int __must_check vpci_add_register(struct vpci *vpci,
                                   vpci_read_t *read_handler,
                                   vpci_write_t *write_handler,
                                   unsigned int offset, unsigned int size,
                                   void *data);
int __must_check vpci_remove_register(struct vpci *vpci, unsigned int offset,
                                      unsigned int size);

/* Generic read/write handlers for the PCI config space. */
uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size);
void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
                uint32_t data);

/* Passthrough handlers. */
uint32_t vpci_hw_read16(const struct pci_dev *pdev, unsigned int reg,
                        void *data);
uint32_t vpci_hw_read32(const struct pci_dev *pdev, unsigned int reg,
                        void *data);

/*
 * Check for pending vPCI operations on this vcpu. Returns true if the vcpu
 * should not run.
 */
bool __must_check vpci_process_pending(struct vcpu *v);

struct vpci {
    /* List of vPCI handlers for a device. */
    struct list_head handlers;
    spinlock_t lock;

#ifdef __XEN__
    /* Hide the rest of the vpci struct from the user-space test harness. */
    struct vpci_header {
        /* Information about the PCI BARs of this device. */
        struct vpci_bar {
            uint64_t addr;
            uint64_t size;
            enum {
                VPCI_BAR_EMPTY,
                VPCI_BAR_IO,
                VPCI_BAR_MEM32,
                VPCI_BAR_MEM64_LO,
                VPCI_BAR_MEM64_HI,
                VPCI_BAR_ROM,
            } type;
            bool prefetchable : 1;
            /* Store whether the BAR is mapped into guest p2m. */
            bool enabled      : 1;
            /*
             * Store whether the ROM enable bit is set (doesn't imply ROM BAR
             * is mapped into guest p2m). Only used for type VPCI_BAR_ROM.
             */
            bool rom_enabled  : 1;
        } bars[7]; /* At most 6 BARS + 1 expansion ROM BAR. */
        /* FIXME: currently there's no support for SR-IOV. */
    } header;

    /* MSI data. */
    struct vpci_msi {
        /* Address. */
        uint64_t address;
        /* Mask bitfield. */
        uint32_t mask;
        /* Data. */
        uint16_t data;
        /* Maximum number of vectors supported by the device. */
        uint8_t max_vectors : 5;
        /* Number of vectors configured. */
        uint8_t vectors     : 5;
        /* Enabled? */
        bool enabled        : 1;
        /* Supports per-vector masking? */
        bool masking        : 1;
        /* 64-bit address capable? */
        bool address64      : 1;
        /* Arch-specific data. */
        struct vpci_arch_msi arch;
    } *msi;

    /* MSI-X data. */
    struct vpci_msix {
        struct pci_dev *pdev;
        /* List link. */
        struct list_head next;
        /* Table information. */
#define VPCI_MSIX_TABLE     0
#define VPCI_MSIX_PBA       1
#define VPCI_MSIX_MEM_NUM   2
        uint32_t tables[VPCI_MSIX_MEM_NUM];
        /* Maximum number of vectors supported by the device. */
        uint16_t max_entries : 11;
        /* MSI-X enabled? */
        bool enabled         : 1;
        /* Masked? */
        bool masked          : 1;
        /* Entries. */
        struct vpci_msix_entry {
            uint64_t addr;
            uint32_t data;
            bool masked  : 1;
            bool updated : 1;
            struct vpci_arch_msix_entry arch;
        } entries[];
    } *msix;
#endif
};

#ifdef __XEN__
struct vpci_vcpu {
    struct rangeset *mem;
    const struct pci_dev *pdev;
    bool map : 1;
    bool rom : 1;
};

void vpci_dump_msi(void);

/* Arch-specific vPCI MSI helpers. */
void vpci_msi_arch_mask(struct vpci_msi *msi, const struct pci_dev *pdev,
                        unsigned int entry, bool mask);
int __must_check vpci_msi_arch_enable(struct vpci_msi *msi,
                                      const struct pci_dev *pdev,
                                      unsigned int vectors);
void vpci_msi_arch_disable(struct vpci_msi *msi, const struct pci_dev *pdev);
void vpci_msi_arch_init(struct vpci_msi *msi);
void vpci_msi_arch_print(const struct vpci_msi *msi);

/* Arch-specific vPCI MSI-X helpers. */
void vpci_msix_arch_mask_entry(struct vpci_msix_entry *entry,
                               const struct pci_dev *pdev, bool mask);
int __must_check vpci_msix_arch_enable_entry(struct vpci_msix_entry *entry,
                                             const struct pci_dev *pdev,
                                             paddr_t table_base);
int __must_check vpci_msix_arch_disable_entry(struct vpci_msix_entry *entry,
                                              const struct pci_dev *pdev);
void vpci_msix_arch_init_entry(struct vpci_msix_entry *entry);
void vpci_msix_arch_print_entry(const struct vpci_msix_entry *entry);

/*
 * Helper functions to fetch MSIX related data. They are used by both the
 * emulated MSIX code and the BAR handlers.
 */
#define VMSIX_TABLE_BASE(vpci, nr)                                        \
    ((vpci)->header.bars[(vpci)->msix->tables[nr] & PCI_MSIX_BIRMASK].addr)
#define VMSIX_TABLE_ADDR(vpci, nr)                                        \
    (VMSIX_TABLE_BASE(vpci, nr) +                                         \
     ((vpci)->msix->tables[nr] & ~PCI_MSIX_BIRMASK))

/*
 * Note regarding the size calculation of the PBA: the spec mentions "The last
 * QWORD will not necessarily be fully populated", so it implies that the PBA
 * size is 64-bit aligned.
 */
#define VMSIX_TABLE_SIZE(vpci, nr)                                             \
    ((nr == VPCI_MSIX_TABLE) ? (vpci)->msix->max_entries * PCI_MSIX_ENTRY_SIZE \
                             : ROUNDUP(DIV_ROUND_UP((vpci)->msix->max_entries, \
                                                    8), 8))

#define VMSIX_ENTRY_NR(msix, entry)                                       \
    (unsigned int)((entry) - (msix)->entries)

#endif

#else /* !CONFIG_HAS_PCI */
struct vpci_vpcu {
};
#endif

#endif

/*
 * Local variables:
 * mode: C
 * c-file-style: "BSD"
 * c-basic-offset: 4
 * tab-width: 4
 * indent-tabs-mode: nil
 * End:
 */

Coverage Report

Created: 2017-10-25 09:10

Line	Count	Source
1		#ifndef _XEN_VPCI_H_
2		#define _XEN_VPCI_H_
3
4		#ifdef CONFIG_HAS_PCI
5
6		#include <xen/pci.h>
7		#include <xen/types.h>
8		#include <xen/list.h>
9
10		typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg,
11		void *data);
12
13		typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg,
14		uint32_t val, void *data);
15
16		typedef int vpci_register_init_t(struct pci_dev *dev);
17
18		#define VPCI_PRIORITY_HIGH "1"
19		#define VPCI_PRIORITY_MIDDLE "5"
20		#define VPCI_PRIORITY_LOW "9"
21
22		#define REGISTER_VPCI_INIT(x, p) \
23		static vpci_register_init_t *const x##_entry \
24		__used_section(".data.vpci." p) = x
25
26		/* Add vPCI handlers to device. */
27		int __must_check vpci_add_handlers(struct pci_dev *dev);
28
29		/* Add/remove a register handler. */
30		int __must_check vpci_add_register(struct vpci *vpci,
31		vpci_read_t *read_handler,
32		vpci_write_t *write_handler,
33		unsigned int offset, unsigned int size,
34		void *data);
35		int __must_check vpci_remove_register(struct vpci *vpci, unsigned int offset,
36		unsigned int size);
37
38		/* Generic read/write handlers for the PCI config space. */
39		uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size);
40		void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
41		uint32_t data);
42
43		/* Passthrough handlers. */
44		uint32_t vpci_hw_read16(const struct pci_dev *pdev, unsigned int reg,
45		void *data);
46		uint32_t vpci_hw_read32(const struct pci_dev *pdev, unsigned int reg,
47		void *data);
48
49		/*
50		* Check for pending vPCI operations on this vcpu. Returns true if the vcpu
51		* should not run.
52		*/
53		bool __must_check vpci_process_pending(struct vcpu *v);
54
55		struct vpci {
56		/* List of vPCI handlers for a device. */
57		struct list_head handlers;
58		spinlock_t lock;
59
60		#ifdef __XEN__
61		/* Hide the rest of the vpci struct from the user-space test harness. */
62		struct vpci_header {
63		/* Information about the PCI BARs of this device. */
64		struct vpci_bar {
65		uint64_t addr;
66		uint64_t size;
67		enum {
68		VPCI_BAR_EMPTY,
69		VPCI_BAR_IO,
70		VPCI_BAR_MEM32,
71		VPCI_BAR_MEM64_LO,
72		VPCI_BAR_MEM64_HI,
73		VPCI_BAR_ROM,
74		} type;
75		bool prefetchable : 1;
76		/* Store whether the BAR is mapped into guest p2m. */
77		bool enabled : 1;
78		/*
79		* Store whether the ROM enable bit is set (doesn't imply ROM BAR
80		* is mapped into guest p2m). Only used for type VPCI_BAR_ROM.
81		*/
82		bool rom_enabled : 1;
83		} bars[7]; /* At most 6 BARS + 1 expansion ROM BAR. */
84		/* FIXME: currently there's no support for SR-IOV. */
85		} header;
86
87		/* MSI data. */
88		struct vpci_msi {
89		/* Address. */
90		uint64_t address;
91		/* Mask bitfield. */
92		uint32_t mask;
93		/* Data. */
94		uint16_t data;
95		/* Maximum number of vectors supported by the device. */
96		uint8_t max_vectors : 5;
97		/* Number of vectors configured. */
98		uint8_t vectors : 5;
99		/* Enabled? */
100		bool enabled : 1;
101		/* Supports per-vector masking? */
102		bool masking : 1;
103		/* 64-bit address capable? */
104		bool address64 : 1;
105		/* Arch-specific data. */
106		struct vpci_arch_msi arch;
107		} *msi;
108
109		/* MSI-X data. */
110		struct vpci_msix {
111		struct pci_dev *pdev;
112		/* List link. */
113		struct list_head next;
114		/* Table information. */
115	101k	#define VPCI_MSIX_TABLE 0
116	5	#define VPCI_MSIX_PBA 1
117		#define VPCI_MSIX_MEM_NUM 2
118		uint32_t tables[VPCI_MSIX_MEM_NUM];
119		/* Maximum number of vectors supported by the device. */
120		uint16_t max_entries : 11;
121		/* MSI-X enabled? */
122		bool enabled : 1;
123		/* Masked? */
124		bool masked : 1;
125		/* Entries. */
126		struct vpci_msix_entry {
127		uint64_t addr;
128		uint32_t data;
129		bool masked : 1;
130		bool updated : 1;
131		struct vpci_arch_msix_entry arch;
132		} entries[];
133		} *msix;
134		#endif
135		};
136
137		#ifdef __XEN__
138		struct vpci_vcpu {
139		struct rangeset *mem;
140		const struct pci_dev *pdev;
141		bool map : 1;
142		bool rom : 1;
143		};
144
145		void vpci_dump_msi(void);
146
147		/* Arch-specific vPCI MSI helpers. */
148		void vpci_msi_arch_mask(struct vpci_msi msi, const struct pci_dev pdev,
149		unsigned int entry, bool mask);
150		int __must_check vpci_msi_arch_enable(struct vpci_msi *msi,
151		const struct pci_dev *pdev,
152		unsigned int vectors);
153		void vpci_msi_arch_disable(struct vpci_msi msi, const struct pci_dev pdev);
154		void vpci_msi_arch_init(struct vpci_msi *msi);
155		void vpci_msi_arch_print(const struct vpci_msi *msi);
156
157		/* Arch-specific vPCI MSI-X helpers. */
158		void vpci_msix_arch_mask_entry(struct vpci_msix_entry *entry,
159		const struct pci_dev *pdev, bool mask);
160		int __must_check vpci_msix_arch_enable_entry(struct vpci_msix_entry *entry,
161		const struct pci_dev *pdev,
162		paddr_t table_base);
163		int __must_check vpci_msix_arch_disable_entry(struct vpci_msix_entry *entry,
164		const struct pci_dev *pdev);
165		void vpci_msix_arch_init_entry(struct vpci_msix_entry *entry);
166		void vpci_msix_arch_print_entry(const struct vpci_msix_entry *entry);
167
168		/*
169		* Helper functions to fetch MSIX related data. They are used by both the
170		* emulated MSIX code and the BAR handlers.
171		*/
172		#define VMSIX_TABLE_BASE(vpci, nr) \
173	4.92M	((vpci)->header.bars[(vpci)->msix->tables[nr] & PCI_MSIX_BIRMASK].addr)
174		#define VMSIX_TABLE_ADDR(vpci, nr) \
175	4.92M	(VMSIX_TABLE_BASE(vpci, nr) + \
176	4.92M	((vpci)->msix->tables[nr] & ~PCI_MSIX_BIRMASK))
177
178		/*
179		* Note regarding the size calculation of the PBA: the spec mentions "The last
180		* QWORD will not necessarily be fully populated", so it implies that the PBA
181		* size is 64-bit aligned.
182		*/
183		#define VMSIX_TABLE_SIZE(vpci, nr) \
184	101k	((nr == VPCI_MSIX_TABLE) ? (vpci)->msix->max_entries * PCI_MSIX_ENTRY_SIZE \
185	50.0k	: ROUNDUP(DIV_ROUND_UP((vpci)->msix->max_entries, \
186	101k	8), 8))
187
188		#define VMSIX_ENTRY_NR(msix, entry) \
189	36	(unsigned int)((entry) - (msix)->entries)
190
191		#endif
192
193		#else /* !CONFIG_HAS_PCI */
194		struct vpci_vpcu {
195		};
196		#endif
197
198		#endif
199
200		/*
201		* Local variables:
202		* mode: C
203		* c-file-style: "BSD"
204		* c-basic-offset: 4
205		* tab-width: 4
206		* indent-tabs-mode: nil
207		* End:
208		*/