Xen Test Framework
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Various control register settings have a uniform effect on whether FPU instructions raise an exception or execute normally.
Each of the following cr0 bits are tested:
against instructions from the following sets:
wait
checking that appropriate exceptions are raised (#NM or #UD), or that no exception is raised.
Each test is run against real hardware, and forced through the x86 instruction emulator (if FEP is available).
This test covers XSA-190, where #NM was not being raised appropriately, therefore interfering with lazy FPU task switching in the guest.