debuggers.hg

view xen/include/asm-x86/domain.h @ 16371:00db9ec39831

x86: Fix PV guest CR4 handling. We should not leak hidden CR4 bits
into guest CR4 value.
Signed-off-by: Keir Fraser <keir@xensource.com>
author Keir Fraser <keir@xensource.com>
date Wed Nov 07 14:15:44 2007 +0000 (2007-11-07)
parents 4034317507de
children 68c911f7733a
line source
1 #ifndef __ASM_DOMAIN_H__
2 #define __ASM_DOMAIN_H__
4 #include <xen/config.h>
5 #include <xen/mm.h>
6 #include <asm/hvm/vcpu.h>
7 #include <asm/hvm/domain.h>
8 #include <asm/e820.h>
10 #define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo)
11 #define is_pv_32bit_domain(d) ((d)->arch.is_32bit_pv)
12 #define is_pv_32bit_vcpu(v) (is_pv_32bit_domain((v)->domain))
13 #ifdef __x86_64__
14 #define is_pv_32on64_domain(d) (is_pv_32bit_domain(d))
15 #else
16 #define is_pv_32on64_domain(d) (0)
17 #endif
18 #define is_pv_32on64_vcpu(v) (is_pv_32on64_domain((v)->domain))
19 #define IS_COMPAT(d) (is_pv_32on64_domain(d))
21 struct trap_bounce {
22 uint32_t error_code;
23 uint8_t flags; /* TBF_ */
24 uint16_t cs;
25 unsigned long eip;
26 };
28 #define MAPHASH_ENTRIES 8
29 #define MAPHASH_HASHFN(pfn) ((pfn) & (MAPHASH_ENTRIES-1))
30 #define MAPHASHENT_NOTINUSE ((u16)~0U)
31 struct mapcache_vcpu {
32 /* Shadow of mapcache_domain.epoch. */
33 unsigned int shadow_epoch;
35 /* Lock-free per-VCPU hash of recently-used mappings. */
36 struct vcpu_maphash_entry {
37 unsigned long mfn;
38 uint16_t idx;
39 uint16_t refcnt;
40 } hash[MAPHASH_ENTRIES];
41 };
43 #define MAPCACHE_ORDER 10
44 #define MAPCACHE_ENTRIES (1 << MAPCACHE_ORDER)
45 struct mapcache_domain {
46 /* The PTEs that provide the mappings, and a cursor into the array. */
47 l1_pgentry_t *l1tab;
48 unsigned int cursor;
50 /* Protects map_domain_page(). */
51 spinlock_t lock;
53 /* Garbage mappings are flushed from TLBs in batches called 'epochs'. */
54 unsigned int epoch;
55 u32 tlbflush_timestamp;
57 /* Which mappings are in use, and which are garbage to reap next epoch? */
58 unsigned long inuse[BITS_TO_LONGS(MAPCACHE_ENTRIES)];
59 unsigned long garbage[BITS_TO_LONGS(MAPCACHE_ENTRIES)];
60 };
62 void mapcache_domain_init(struct domain *);
63 void mapcache_vcpu_init(struct vcpu *);
65 /* x86/64: toggle guest between kernel and user modes. */
66 void toggle_guest_mode(struct vcpu *);
68 /*
69 * Initialise a hypercall-transfer page. The given pointer must be mapped
70 * in Xen virtual address space (accesses are not validated or checked).
71 */
72 void hypercall_page_initialise(struct domain *d, void *);
74 /************************************************/
75 /* shadow paging extension */
76 /************************************************/
77 struct shadow_domain {
78 spinlock_t lock; /* shadow domain lock */
79 int locker; /* processor which holds the lock */
80 const char *locker_function; /* Func that took it */
81 unsigned int opt_flags; /* runtime tunable optimizations on/off */
82 struct list_head pinned_shadows;
84 /* Memory allocation */
85 struct list_head freelists[SHADOW_MAX_ORDER + 1];
86 struct list_head p2m_freelist;
87 unsigned int total_pages; /* number of pages allocated */
88 unsigned int free_pages; /* number of pages on freelists */
89 unsigned int p2m_pages; /* number of pages allocates to p2m */
91 /* 1-to-1 map for use when HVM vcpus have paging disabled */
92 pagetable_t unpaged_pagetable;
94 /* Shadow hashtable */
95 struct shadow_page_info **hash_table;
96 int hash_walking; /* Some function is walking the hash table */
98 /* Fast MMIO path heuristic */
99 int has_fast_mmio_entries;
100 };
102 struct shadow_vcpu {
103 #if CONFIG_PAGING_LEVELS >= 3
104 /* PAE guests: per-vcpu shadow top-level table */
105 l3_pgentry_t l3table[4] __attribute__((__aligned__(32)));
106 /* PAE guests: per-vcpu cache of the top-level *guest* entries */
107 l3_pgentry_t gl3e[4] __attribute__((__aligned__(32)));
108 #endif
109 /* Non-PAE guests: pointer to guest top-level pagetable */
110 void *guest_vtable;
111 /* Last MFN that we emulated a write to. */
112 unsigned long last_emulated_mfn;
113 /* MFN of the last shadow that we shot a writeable mapping in */
114 unsigned long last_writeable_pte_smfn;
115 };
117 /************************************************/
118 /* hardware assisted paging */
119 /************************************************/
120 struct hap_domain {
121 spinlock_t lock;
122 int locker;
123 const char *locker_function;
125 struct list_head freelist;
126 unsigned int total_pages; /* number of pages allocated */
127 unsigned int free_pages; /* number of pages on freelists */
128 unsigned int p2m_pages; /* number of pages allocates to p2m */
129 };
131 /************************************************/
132 /* p2m handling */
133 /************************************************/
134 struct p2m_domain {
135 /* Lock that protects updates to the p2m */
136 spinlock_t lock;
137 int locker; /* processor which holds the lock */
138 const char *locker_function; /* Func that took it */
140 /* Pages used to construct the p2m */
141 struct list_head pages;
143 /* Functions to call to get or free pages for the p2m */
144 struct page_info * (*alloc_page )(struct domain *d);
145 void (*free_page )(struct domain *d,
146 struct page_info *pg);
148 /* Highest guest frame that's ever been mapped in the p2m */
149 unsigned long max_mapped_pfn;
150 };
152 /************************************************/
153 /* common paging data structure */
154 /************************************************/
155 struct log_dirty_domain {
156 /* log-dirty lock */
157 spinlock_t lock;
158 int locker; /* processor that holds the lock */
159 const char *locker_function; /* func that took it */
161 /* log-dirty bitmap to record dirty pages */
162 unsigned long *bitmap;
163 unsigned int bitmap_size; /* in pages, bit per page */
165 /* log-dirty mode stats */
166 unsigned int fault_count;
167 unsigned int dirty_count;
169 /* functions which are paging mode specific */
170 int (*enable_log_dirty )(struct domain *d);
171 int (*disable_log_dirty )(struct domain *d);
172 void (*clean_dirty_bitmap )(struct domain *d);
173 };
175 struct paging_domain {
176 /* flags to control paging operation */
177 u32 mode;
178 /* extension for shadow paging support */
179 struct shadow_domain shadow;
180 /* extension for hardware-assited paging */
181 struct hap_domain hap;
182 /* log dirty support */
183 struct log_dirty_domain log_dirty;
184 };
186 struct paging_vcpu {
187 /* Pointers to mode-specific entry points. */
188 struct paging_mode *mode;
189 /* HVM guest: last emulate was to a pagetable */
190 unsigned int last_write_was_pt:1;
191 /* Translated guest: virtual TLB */
192 struct shadow_vtlb *vtlb;
193 spinlock_t vtlb_lock;
195 /* paging support extension */
196 struct shadow_vcpu shadow;
197 };
199 struct arch_domain
200 {
201 l1_pgentry_t *mm_perdomain_pt;
202 #ifdef CONFIG_X86_64
203 l2_pgentry_t *mm_perdomain_l2;
204 l3_pgentry_t *mm_perdomain_l3;
205 #endif
207 #ifdef CONFIG_X86_32
208 /* map_domain_page() mapping cache. */
209 struct mapcache_domain mapcache;
210 #endif
212 #ifdef CONFIG_COMPAT
213 unsigned int hv_compat_vstart;
214 l3_pgentry_t *mm_arg_xlat_l3;
215 #endif
217 /* I/O-port admin-specified access capabilities. */
218 struct rangeset *ioport_caps;
220 struct hvm_domain hvm_domain;
222 struct paging_domain paging;
223 struct p2m_domain p2m ;
225 /* Shadow translated domain: P2M mapping */
226 pagetable_t phys_table;
228 /* Pseudophysical e820 map (XENMEM_memory_map). */
229 struct e820entry e820[3];
230 unsigned int nr_e820;
232 /* Maximum physical-address bitwidth supported by this guest. */
233 unsigned int physaddr_bitsize;
235 /* Is a 32-bit PV (non-HVM) guest? */
236 bool_t is_32bit_pv;
237 /* Is shared-info page in 32-bit format? */
238 bool_t has_32bit_shinfo;
240 /* Continuable domain_relinquish_resources(). */
241 enum {
242 RELMEM_not_started,
243 RELMEM_xen_l4,
244 RELMEM_dom_l4,
245 RELMEM_xen_l3,
246 RELMEM_dom_l3,
247 RELMEM_xen_l2,
248 RELMEM_dom_l2,
249 RELMEM_done,
250 } relmem;
251 struct list_head relmem_list;
252 } __cacheline_aligned;
254 #ifdef CONFIG_X86_PAE
255 struct pae_l3_cache {
256 /*
257 * Two low-memory (<4GB) PAE L3 tables, used as fallback when the guest
258 * supplies a >=4GB PAE L3 table. We need two because we cannot set up
259 * an L3 table while we are currently running on it (without using
260 * expensive atomic 64-bit operations).
261 */
262 l3_pgentry_t table[2][4] __attribute__((__aligned__(32)));
263 unsigned long high_mfn; /* The >=4GB MFN being shadowed. */
264 unsigned int inuse_idx; /* Which of the two cache slots is in use? */
265 spinlock_t lock;
266 };
267 #define pae_l3_cache_init(c) spin_lock_init(&(c)->lock)
268 #else /* !CONFIG_X86_PAE */
269 struct pae_l3_cache { };
270 #define pae_l3_cache_init(c) ((void)0)
271 #endif
273 struct arch_vcpu
274 {
275 /* Needs 16-byte aligment for FXSAVE/FXRSTOR. */
276 struct vcpu_guest_context guest_context
277 __attribute__((__aligned__(16)));
279 struct pae_l3_cache pae_l3_cache;
281 unsigned long flags; /* TF_ */
283 void (*schedule_tail) (struct vcpu *);
285 void (*ctxt_switch_from) (struct vcpu *);
286 void (*ctxt_switch_to) (struct vcpu *);
288 /* Record information required to continue execution after migration */
289 void *continue_info;
291 /* Bounce information for propagating an exception to guest OS. */
292 struct trap_bounce trap_bounce;
294 /* I/O-port access bitmap. */
295 XEN_GUEST_HANDLE(uint8_t) iobmp; /* Guest kernel vaddr of the bitmap. */
296 int iobmp_limit; /* Number of ports represented in the bitmap. */
297 int iopl; /* Current IOPL for this VCPU. */
299 #ifdef CONFIG_X86_32
300 struct desc_struct int80_desc;
301 #endif
302 #ifdef CONFIG_X86_64
303 struct trap_bounce int80_bounce;
304 unsigned long syscall32_callback_eip;
305 unsigned long sysenter_callback_eip;
306 unsigned short syscall32_callback_cs;
307 unsigned short sysenter_callback_cs;
308 bool_t syscall32_disables_events;
309 bool_t sysenter_disables_events;
310 #endif
312 /* Virtual Machine Extensions */
313 struct hvm_vcpu hvm_vcpu;
315 /*
316 * Every domain has a L1 pagetable of its own. Per-domain mappings
317 * are put in this table (eg. the current GDT is mapped here).
318 */
319 l1_pgentry_t *perdomain_ptes;
321 #ifdef CONFIG_X86_64
322 pagetable_t guest_table_user; /* (MFN) x86/64 user-space pagetable */
323 #endif
324 pagetable_t guest_table; /* (MFN) guest notion of cr3 */
325 /* guest_table holds a ref to the page, and also a type-count unless
326 * shadow refcounts are in use */
327 pagetable_t shadow_table[4]; /* (MFN) shadow(s) of guest */
328 pagetable_t monitor_table; /* (MFN) hypervisor PT (for HVM) */
329 unsigned long cr3; /* (MA) value to install in HW CR3 */
331 /* Current LDT details. */
332 unsigned long shadow_ldt_mapcnt;
334 struct paging_vcpu paging;
336 /* Guest-specified relocation of vcpu_info. */
337 unsigned long vcpu_info_mfn;
339 #ifdef CONFIG_X86_32
340 /* map_domain_page() mapping cache. */
341 struct mapcache_vcpu mapcache;
342 #endif
344 } __cacheline_aligned;
346 /* Shorthands to improve code legibility. */
347 #define hvm_vmx hvm_vcpu.u.vmx
348 #define hvm_svm hvm_vcpu.u.svm
350 /* Continue the current hypercall via func(data) on specified cpu. */
351 int continue_hypercall_on_cpu(int cpu, long (*func)(void *data), void *data);
353 /* Clean up CR4 bits that are not under guest control. */
354 unsigned long pv_guest_cr4_fixup(unsigned long guest_cr4);
356 /* Convert between guest-visible and real CR4 values. */
357 #define pv_guest_cr4_to_real_cr4(c) \
358 ((c) | (mmu_cr4_features & (X86_CR4_PGE | X86_CR4_PSE)))
359 #define real_cr4_to_pv_guest_cr4(c) \
360 ((c) & ~(X86_CR4_PGE | X86_CR4_PSE))
362 #endif /* __ASM_DOMAIN_H__ */
364 /*
365 * Local variables:
366 * mode: C
367 * c-set-style: "BSD"
368 * c-basic-offset: 4
369 * tab-width: 4
370 * indent-tabs-mode: nil
371 * End:
372 */