debuggers.hg

view xen/include/asm-x86/hvm/io.h @ 16604:01c9b2b3118a

hvm stdvga: Do not emulate PIO reads inside Xen. They should be rare
(PIO write emulation is really for book-keeping to detect when we
enter/leave stdvga mode, and to work out what to do with mmio
accesses), and we may do the wrong thing depending on emulated SVGA
hardware and current mode.

This simplifies the code and means that 'stdvga=1' once again works
properly and causes the stdvga bios to be loaded by hvmloader.

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Sat Dec 08 16:57:13 2007 +0000 (2007-12-08)
parents bb961bda7eff
children 3f0f0bd3f1c1
line source
1 /*
2 * io.h: HVM IO support
3 *
4 * Copyright (c) 2004, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
17 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 */
20 #ifndef __ASM_X86_HVM_IO_H__
21 #define __ASM_X86_HVM_IO_H__
23 #include <asm/hvm/vpic.h>
24 #include <asm/hvm/vioapic.h>
25 #include <public/hvm/ioreq.h>
26 #include <public/event_channel.h>
28 #define operand_size(operand) \
29 ((operand >> 24) & 0xFF)
31 #define operand_index(operand) \
32 ((operand >> 16) & 0xFF)
34 /* for instruction.operand[].size */
35 #define BYTE 1
36 #define WORD 2
37 #define LONG 4
38 #define QUAD 8
39 #define BYTE_64 16
41 /* for instruction.operand[].flag */
42 #define REGISTER 0x1
43 #define MEMORY 0x2
44 #define IMMEDIATE 0x4
46 /* for instruction.flags */
47 #define REPZ 0x1
48 #define REPNZ 0x2
49 #define OVERLAP 0x4
51 /* instruction type */
52 #define INSTR_PIO 1
53 #define INSTR_OR 2
54 #define INSTR_AND 3
55 #define INSTR_XOR 4
56 #define INSTR_CMP 5
57 #define INSTR_MOV 6
58 #define INSTR_MOVS 7
59 #define INSTR_MOVZX 8
60 #define INSTR_MOVSX 9
61 #define INSTR_STOS 10
62 #define INSTR_LODS 11
63 #define INSTR_TEST 12
64 #define INSTR_BT 13
65 #define INSTR_XCHG 14
66 #define INSTR_SUB 15
67 #define INSTR_ADD 16
68 #define INSTR_PUSH 17
70 #define MAX_INST_LEN 15 /* Maximum instruction length = 15 bytes */
72 struct hvm_io_op {
73 unsigned int instr; /* instruction */
74 unsigned int flags;
75 unsigned long addr; /* virt addr for overlap PIO/MMIO */
76 struct {
77 unsigned int operand[2]; /* operands */
78 unsigned long immediate; /* immediate portion */
79 };
80 struct cpu_user_regs io_context; /* current context */
81 };
83 #define MAX_IO_HANDLER 12
85 #define HVM_PORTIO 0
86 #define HVM_MMIO 1
87 #define HVM_BUFFERED_IO 2
89 typedef int (*intercept_action_t)(ioreq_t *);
90 typedef unsigned long (*hvm_mmio_read_t)(struct vcpu *v,
91 unsigned long addr,
92 unsigned long length);
94 typedef void (*hvm_mmio_write_t)(struct vcpu *v,
95 unsigned long addr,
96 unsigned long length,
97 unsigned long val);
99 typedef int (*hvm_mmio_check_t)(struct vcpu *v, unsigned long addr);
101 struct io_handler {
102 int type;
103 unsigned long addr;
104 unsigned long size;
105 intercept_action_t action;
106 };
108 struct hvm_io_handler {
109 int num_slot;
110 struct io_handler hdl_list[MAX_IO_HANDLER];
111 };
113 struct hvm_mmio_handler {
114 hvm_mmio_check_t check_handler;
115 hvm_mmio_read_t read_handler;
116 hvm_mmio_write_t write_handler;
117 };
119 /* global io interception point in HV */
120 extern int hvm_io_intercept(ioreq_t *p, int type);
121 extern int register_io_handler(
122 struct domain *d, unsigned long addr, unsigned long size,
123 intercept_action_t action, int type);
125 static inline int hvm_portio_intercept(ioreq_t *p)
126 {
127 return hvm_io_intercept(p, HVM_PORTIO);
128 }
130 static inline int hvm_buffered_io_intercept(ioreq_t *p)
131 {
132 return hvm_io_intercept(p, HVM_BUFFERED_IO);
133 }
135 extern int hvm_mmio_intercept(ioreq_t *p);
136 extern int hvm_buffered_io_send(ioreq_t *p);
138 static inline int register_portio_handler(
139 struct domain *d, unsigned long addr,
140 unsigned long size, intercept_action_t action)
141 {
142 return register_io_handler(d, addr, size, action, HVM_PORTIO);
143 }
145 static inline int register_buffered_io_handler(
146 struct domain *d, unsigned long addr,
147 unsigned long size, intercept_action_t action)
148 {
149 return register_io_handler(d, addr, size, action, HVM_BUFFERED_IO);
150 }
152 void send_mmio_req(unsigned char type, unsigned long gpa,
153 unsigned long count, int size, paddr_t value,
154 int dir, int df, int value_is_ptr);
155 void send_pio_req(unsigned long port, unsigned long count, int size,
156 paddr_t value, int dir, int df, int value_is_ptr);
157 void send_timeoffset_req(unsigned long timeoff);
158 void send_invalidate_req(void);
159 extern void handle_mmio(unsigned long gpa);
160 extern void hvm_interrupt_post(struct vcpu *v, int vector, int type);
161 extern void hvm_io_assist(void);
162 extern void hvm_dpci_eoi(struct domain *d, unsigned int guest_irq,
163 union vioapic_redir_entry *ent);
165 struct hvm_hw_stdvga {
166 uint8_t sr_index;
167 uint8_t sr[8];
168 uint8_t gr_index;
169 uint8_t gr[9];
170 bool_t stdvga;
171 bool_t cache;
172 uint32_t latch;
173 struct page_info *vram_page[64]; /* shadow of 0xa0000-0xaffff */
174 spinlock_t lock;
175 };
177 void stdvga_init(struct domain *d);
178 void stdvga_deinit(struct domain *d);
180 #endif /* __ASM_X86_HVM_IO_H__ */