debuggers.hg

view xen/include/asm-x86/hvm/vpt.h @ 16583:0f9b5ab59579

hvm: Split no_missed_tick_accounting into two modes:
* no_missed_ticks_pending ('SYNC')
* one_missed_tick_pending ('MIXED')

This is based on a patch by Dave Winchell <dwinchell@virtualiron.com>

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Dec 06 11:56:51 2007 +0000 (2007-12-06)
parents b5a2cbca3930
children f2f7c92bf1c1
line source
1 /*
2 * vpt.h: Virtual Platform Timer definitions
3 *
4 * Copyright (c) 2004, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
17 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 */
20 #ifndef __ASM_X86_HVM_VPT_H__
21 #define __ASM_X86_HVM_VPT_H__
23 #include <xen/config.h>
24 #include <xen/init.h>
25 #include <xen/lib.h>
26 #include <xen/time.h>
27 #include <xen/errno.h>
28 #include <xen/time.h>
29 #include <xen/timer.h>
30 #include <xen/list.h>
31 #include <asm/hvm/vpic.h>
32 #include <asm/hvm/irq.h>
33 #include <public/hvm/save.h>
35 struct HPETState;
36 struct HPET_timer_fn_info {
37 struct HPETState *hs;
38 unsigned int tn;
39 };
41 struct hpet_registers {
42 /* Memory-mapped, software visible registers */
43 uint64_t capability; /* capabilities */
44 uint64_t config; /* configuration */
45 uint64_t isr; /* interrupt status reg */
46 uint64_t mc64; /* main counter */
47 struct { /* timers */
48 uint64_t config; /* configuration/cap */
49 uint64_t cmp; /* comparator */
50 uint64_t fsb; /* FSB route, not supported now */
51 } timers[HPET_TIMER_NUM];
53 /* Hidden register state */
54 uint64_t period[HPET_TIMER_NUM]; /* Last value written to comparator */
55 };
57 typedef struct HPETState {
58 struct hpet_registers hpet;
59 struct vcpu *vcpu;
60 uint64_t tsc_freq;
61 uint64_t mc_offset;
62 struct timer timers[HPET_TIMER_NUM];
63 struct HPET_timer_fn_info timer_fn_info[HPET_TIMER_NUM];
64 spinlock_t lock;
65 } HPETState;
68 /*
69 * Abstract layer of periodic time, one short time.
70 */
71 typedef void time_cb(struct vcpu *v, void *opaque);
73 struct periodic_time {
74 struct list_head list;
75 char enabled;
76 char one_shot; /* one shot time */
77 char do_not_freeze;
78 u8 irq;
79 struct vcpu *vcpu; /* vcpu timer interrupt delivers to */
80 u32 pending_intr_nr; /* the couner for pending timer interrupts */
81 u64 period; /* frequency in ns */
82 u64 period_cycles; /* frequency in cpu cycles */
83 s_time_t scheduled; /* scheduled timer interrupt */
84 u64 last_plt_gtime; /* platform time when last IRQ is injected */
85 struct timer timer; /* ac_timer */
86 time_cb *cb;
87 void *priv; /* point back to platform time source */
88 };
91 #define PIT_FREQ 1193181
92 #define PIT_BASE 0x40
94 typedef struct PITState {
95 /* Hardware state */
96 struct hvm_hw_pit hw;
97 /* Last time the counters read zero, for calcuating counter reads */
98 int64_t count_load_time[3];
99 /* Channel 0 IRQ handling. */
100 struct periodic_time pt0;
101 spinlock_t lock;
102 } PITState;
104 typedef struct RTCState {
105 /* Hardware state */
106 struct hvm_hw_rtc hw;
107 /* RTC's idea of the current time */
108 struct tm current_tm;
109 /* second update */
110 int64_t next_second_time;
111 struct timer second_timer;
112 struct timer second_timer2;
113 struct periodic_time pt;
114 int32_t time_offset_seconds;
115 spinlock_t lock;
116 } RTCState;
118 #define FREQUENCE_PMTIMER 3579545 /* Timer should run at 3.579545 MHz */
119 typedef struct PMTState {
120 struct hvm_hw_pmtimer pm; /* 32bit timer value */
121 struct vcpu *vcpu; /* Keeps sync with this vcpu's guest-time */
122 uint64_t last_gtime; /* Last (guest) time we updated the timer */
123 uint64_t scale; /* Multiplier to get from tsc to timer ticks */
124 struct timer timer; /* To make sure we send SCIs */
125 spinlock_t lock;
126 } PMTState;
128 struct pl_time { /* platform time */
129 struct PITState vpit;
130 struct RTCState vrtc;
131 struct HPETState vhpet;
132 struct PMTState vpmt;
133 };
135 #define ticks_per_sec(v) (v->domain->arch.hvm_domain.tsc_frequency)
137 void pt_save_timer(struct vcpu *v);
138 void pt_restore_timer(struct vcpu *v);
139 void pt_update_irq(struct vcpu *v);
140 void pt_intr_post(struct vcpu *v, struct hvm_intack intack);
141 void pt_reset(struct vcpu *v);
142 void pt_migrate(struct vcpu *v);
143 void create_periodic_time(
144 struct vcpu *v, struct periodic_time *pt, uint64_t period,
145 uint8_t irq, char one_shot, time_cb *cb, void *data);
146 void destroy_periodic_time(struct periodic_time *pt);
148 int pv_pit_handler(int port, int data, int write);
149 void pit_init(struct vcpu *v, unsigned long cpu_khz);
150 void pit_stop_channel0_irq(PITState * pit);
151 void pit_deinit(struct domain *d);
152 void rtc_init(struct vcpu *v, int base);
153 void rtc_migrate_timers(struct vcpu *v);
154 void rtc_deinit(struct domain *d);
155 int is_rtc_periodic_irq(void *opaque);
156 void pmtimer_init(struct vcpu *v);
157 void pmtimer_deinit(struct domain *d);
159 void hpet_migrate_timers(struct vcpu *v);
160 void hpet_init(struct vcpu *v);
161 void hpet_deinit(struct domain *d);
163 #endif /* __ASM_X86_HVM_VPT_H__ */