debuggers.hg

view xen/include/asm-ia64/linux-xen/asm/pci.h @ 17977:11318234588e

[IA64] remove some #ifndef XEN using empty headerfiles.

move mm_numa.c from linux-xen to linux because now mm_numa.c is
identical to linux files.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Thu Jun 19 12:48:04 2008 +0900 (2008-06-19)
parents e71fd4513352
children
line source
1 #ifndef _ASM_IA64_PCI_H
2 #define _ASM_IA64_PCI_H
4 #include <linux/mm.h>
5 #include <linux/slab.h>
6 #include <linux/spinlock.h>
7 #include <linux/string.h>
8 #include <linux/types.h>
9 #ifdef XEN
10 #include <linux/ioport.h>
11 #endif
13 #include <asm/io.h>
14 #include <asm/scatterlist.h>
16 /*
17 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
18 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
19 * loader.
20 */
21 #define pcibios_assign_all_busses() 0
22 #define pcibios_scan_all_fns(a, b) 0
24 #define PCIBIOS_MIN_IO 0x1000
25 #define PCIBIOS_MIN_MEM 0x10000000
27 void pcibios_config_init(void);
29 struct pci_dev;
31 /*
32 * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct correspondence
33 * between device bus addresses and CPU physical addresses. Platforms with a hardware I/O
34 * MMU _must_ turn this off to suppress the bounce buffer handling code in the block and
35 * network device layers. Platforms with separate bus address spaces _must_ turn this off
36 * and provide a device DMA mapping implementation that takes care of the necessary
37 * address translation.
38 *
39 * For now, the ia64 platforms which may have separate/multiple bus address spaces all
40 * have I/O MMUs which support the merging of physically discontiguous buffers, so we can
41 * use that as the sole factor to determine the setting of PCI_DMA_BUS_IS_PHYS.
42 */
43 extern unsigned long ia64_max_iommu_merge_mask;
44 #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
46 static inline void
47 pcibios_set_master (struct pci_dev *dev)
48 {
49 /* No special bus mastering setup handling */
50 }
52 static inline void
53 pcibios_penalize_isa_irq (int irq, int active)
54 {
55 /* We don't do dynamic PCI IRQ allocation */
56 }
58 #define HAVE_ARCH_PCI_MWI 1
59 extern int pcibios_prep_mwi (struct pci_dev *);
61 #include <asm-generic/pci-dma-compat.h>
63 /* pci_unmap_{single,page} is not a nop, thus... */
64 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
65 dma_addr_t ADDR_NAME;
66 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
67 __u32 LEN_NAME;
68 #define pci_unmap_addr(PTR, ADDR_NAME) \
69 ((PTR)->ADDR_NAME)
70 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
71 (((PTR)->ADDR_NAME) = (VAL))
72 #define pci_unmap_len(PTR, LEN_NAME) \
73 ((PTR)->LEN_NAME)
74 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
75 (((PTR)->LEN_NAME) = (VAL))
77 /* The ia64 platform always supports 64-bit addressing. */
78 #define pci_dac_dma_supported(pci_dev, mask) (1)
79 #define pci_dac_page_to_dma(dev,pg,off,dir) ((dma_addr_t) page_to_bus(pg) + (off))
80 #define pci_dac_dma_to_page(dev,dma_addr) (virt_to_page(bus_to_virt(dma_addr)))
81 #define pci_dac_dma_to_offset(dev,dma_addr) offset_in_page(dma_addr)
82 #define pci_dac_dma_sync_single_for_cpu(dev,dma_addr,len,dir) do { } while (0)
83 #define pci_dac_dma_sync_single_for_device(dev,dma_addr,len,dir) do { mb(); } while (0)
85 #define sg_dma_len(sg) ((sg)->dma_length)
86 #define sg_dma_address(sg) ((sg)->dma_address)
88 #ifdef CONFIG_PCI
89 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
90 enum pci_dma_burst_strategy *strat,
91 unsigned long *strategy_parameter)
92 {
93 unsigned long cacheline_size;
94 u8 byte;
96 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
97 if (byte == 0)
98 cacheline_size = 1024;
99 else
100 cacheline_size = (int) byte * 4;
102 *strat = PCI_DMA_BURST_MULTIPLE;
103 *strategy_parameter = cacheline_size;
104 }
105 #endif
107 #define HAVE_PCI_MMAP
108 extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
109 enum pci_mmap_state mmap_state, int write_combine);
110 #define HAVE_PCI_LEGACY
111 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
112 struct vm_area_struct *vma);
113 #ifndef XEN
114 extern ssize_t pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off,
115 size_t count);
116 extern ssize_t pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off,
117 size_t count);
118 extern int pci_mmap_legacy_mem(struct kobject *kobj,
119 struct bin_attribute *attr,
120 struct vm_area_struct *vma);
121 #endif
123 #define pci_get_legacy_mem platform_pci_get_legacy_mem
124 #define pci_legacy_read platform_pci_legacy_read
125 #define pci_legacy_write platform_pci_legacy_write
127 struct pci_window {
128 struct resource resource;
129 u64 offset;
130 };
132 struct pci_controller {
133 void *acpi_handle;
134 void *iommu;
135 int segment;
136 int node; /* nearest node with memory or -1 for global allocation */
138 unsigned int windows;
139 struct pci_window *window;
141 void *platform_data;
142 };
144 #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
145 #define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
147 extern struct pci_ops pci_root_ops;
149 static inline int pci_proc_domain(struct pci_bus *bus)
150 {
151 return (pci_domain_nr(bus) != 0);
152 }
154 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
155 {
156 }
158 extern void pcibios_resource_to_bus(struct pci_dev *dev,
159 struct pci_bus_region *region, struct resource *res);
161 extern void pcibios_bus_to_resource(struct pci_dev *dev,
162 struct resource *res, struct pci_bus_region *region);
164 #ifndef XEN
165 static inline struct resource *
166 pcibios_select_root(struct pci_dev *pdev, struct resource *res)
167 {
168 struct resource *root = NULL;
170 if (res->flags & IORESOURCE_IO)
171 root = &ioport_resource;
172 if (res->flags & IORESOURCE_MEM)
173 root = &iomem_resource;
175 return root;
176 }
177 #endif
179 #define pcibios_scan_all_fns(a, b) 0
181 #endif /* _ASM_IA64_PCI_H */