debuggers.hg

view tools/ioemu/hw/pc.c @ 10971:386990d004b8

[qemu] Add switch to control whether acpi bridge is enabled.

Signed-off-by: Winston Wang <winston.l.wang@intel.com>
author chris@kneesaa.uk.xensource.com
date Fri Aug 04 10:41:27 2006 +0100 (2006-08-04)
parents b450f21472a0
children 08a11694b109
line source
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "vl.h"
26 /* output Bochs bios info messages */
27 //#define DEBUG_BIOS
29 #define BIOS_FILENAME "bios.bin"
30 #define VGABIOS_FILENAME "vgabios.bin"
31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
34 #define KERNEL_LOAD_ADDR 0x00100000
35 #define INITRD_LOAD_ADDR 0x00600000
36 #define KERNEL_PARAMS_ADDR 0x00090000
37 #define KERNEL_CMDLINE_ADDR 0x00099000
39 static fdctrl_t *floppy_controller;
40 static RTCState *rtc_state;
41 #ifndef CONFIG_DM
42 static PITState *pit;
43 #endif /* !CONFIG_DM */
44 #ifndef CONFIG_DM
45 static IOAPICState *ioapic;
46 #endif /* !CONFIG_DM */
47 static USBPort *usb_root_ports[2];
49 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
50 {
51 }
53 /* MSDOS compatibility mode FPU exception support */
54 /* XXX: add IGNNE support */
55 void cpu_set_ferr(CPUX86State *s)
56 {
57 pic_set_irq(13, 1);
58 }
60 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
61 {
62 pic_set_irq(13, 0);
63 }
65 /* TSC handling */
67 uint64_t cpu_get_tsc(CPUX86State *env)
68 {
69 return qemu_get_clock(vm_clock);
70 }
72 #ifndef CONFIG_DM
73 /* IRQ handling */
74 int cpu_get_pic_interrupt(CPUState *env)
75 {
76 int intno;
78 intno = apic_get_interrupt(env);
79 if (intno >= 0) {
80 /* set irq request if a PIC irq is still pending */
81 /* XXX: improve that */
82 pic_update_irq(isa_pic);
83 return intno;
84 }
85 /* read the irq from the PIC */
86 intno = pic_read_irq(isa_pic);
87 return intno;
88 }
89 #endif /* CONFIG_DM */
91 static void pic_irq_request(void *opaque, int level)
92 {
93 CPUState *env = opaque;
94 if (level)
95 cpu_interrupt(env, CPU_INTERRUPT_HARD);
96 else
97 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
98 }
100 /* PC cmos mappings */
102 #define REG_EQUIPMENT_BYTE 0x14
103 #define REG_IBM_CENTURY_BYTE 0x32
104 #define REG_IBM_PS2_CENTURY_BYTE 0x37
107 static inline int to_bcd(RTCState *s, int a)
108 {
109 return ((a / 10) << 4) | (a % 10);
110 }
112 static int cmos_get_fd_drive_type(int fd0)
113 {
114 int val;
116 switch (fd0) {
117 case 0:
118 /* 1.44 Mb 3"5 drive */
119 val = 4;
120 break;
121 case 1:
122 /* 2.88 Mb 3"5 drive */
123 val = 5;
124 break;
125 case 2:
126 /* 1.2 Mb 5"5 drive */
127 val = 2;
128 break;
129 default:
130 val = 0;
131 break;
132 }
133 return val;
134 }
136 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
137 {
138 RTCState *s = rtc_state;
139 int cylinders, heads, sectors;
140 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
141 rtc_set_memory(s, type_ofs, 47);
142 rtc_set_memory(s, info_ofs, cylinders);
143 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
144 rtc_set_memory(s, info_ofs + 2, heads);
145 rtc_set_memory(s, info_ofs + 3, 0xff);
146 rtc_set_memory(s, info_ofs + 4, 0xff);
147 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
148 rtc_set_memory(s, info_ofs + 6, cylinders);
149 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
150 rtc_set_memory(s, info_ofs + 8, sectors);
151 }
153 /* hd_table must contain 4 block drivers */
154 static void cmos_init(uint64_t ram_size, int boot_device, BlockDriverState **hd_table, time_t timeoffset)
155 {
156 RTCState *s = rtc_state;
157 int val;
158 int fd0, fd1, nb;
159 time_t ti;
160 struct tm *tm;
161 int i;
163 /* set the CMOS date */
164 time(&ti);
165 ti += timeoffset;
166 if (rtc_utc)
167 tm = gmtime(&ti);
168 else
169 tm = localtime(&ti);
170 rtc_set_date(s, tm);
172 val = to_bcd(s, (tm->tm_year / 100) + 19);
173 rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
174 rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
176 /* various important CMOS locations needed by PC/Bochs bios */
178 /* memory size */
179 val = 640; /* base memory in K */
180 rtc_set_memory(s, 0x15, val);
181 rtc_set_memory(s, 0x16, val >> 8);
183 val = (ram_size / 1024) - 1024;
184 if (val > 65535)
185 val = 65535;
186 rtc_set_memory(s, 0x17, val);
187 rtc_set_memory(s, 0x18, val >> 8);
188 rtc_set_memory(s, 0x30, val);
189 rtc_set_memory(s, 0x31, val >> 8);
191 if (ram_size > (16 * 1024 * 1024))
192 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
193 else
194 val = 0;
195 if (val > 65535)
196 val = 65535;
197 rtc_set_memory(s, 0x34, val);
198 rtc_set_memory(s, 0x35, val >> 8);
200 switch(boot_device) {
201 case 'a':
202 case 'b':
203 rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
204 break;
205 default:
206 case 'c':
207 rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
208 break;
209 case 'd':
210 rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
211 break;
212 }
214 /* floppy type */
216 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
217 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
219 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
220 rtc_set_memory(s, 0x10, val);
222 val = 0;
223 nb = 0;
224 if (fd0 < 3)
225 nb++;
226 if (fd1 < 3)
227 nb++;
228 switch (nb) {
229 case 0:
230 break;
231 case 1:
232 val |= 0x01; /* 1 drive, ready for boot */
233 break;
234 case 2:
235 val |= 0x41; /* 2 drives, ready for boot */
236 break;
237 }
238 val |= 0x02; /* FPU is there */
239 val |= 0x04; /* PS/2 mouse installed */
240 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
242 /* hard drives */
244 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
245 if (hd_table[0])
246 cmos_init_hd(0x19, 0x1b, hd_table[0]);
247 if (hd_table[1])
248 cmos_init_hd(0x1a, 0x24, hd_table[1]);
250 val = 0;
251 for (i = 0; i < 4; i++) {
252 if (hd_table[i]) {
253 int cylinders, heads, sectors, translation;
254 /* NOTE: bdrv_get_geometry_hint() returns the physical
255 geometry. It is always such that: 1 <= sects <= 63, 1
256 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
257 geometry can be different if a translation is done. */
258 translation = bdrv_get_translation_hint(hd_table[i]);
259 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
260 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
261 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
262 /* No translation. */
263 translation = 0;
264 } else {
265 /* LBA translation. */
266 translation = 1;
267 }
268 } else {
269 translation--;
270 }
271 val |= translation << (i * 2);
272 }
273 }
274 rtc_set_memory(s, 0x39, val);
276 /* Disable check of 0x55AA signature on the last two bytes of
277 first sector of disk. XXX: make it the default ? */
278 // rtc_set_memory(s, 0x38, 1);
279 }
281 void ioport_set_a20(int enable)
282 {
283 /* XXX: send to all CPUs ? */
284 cpu_x86_set_a20(first_cpu, enable);
285 }
287 int ioport_get_a20(void)
288 {
289 return ((first_cpu->a20_mask >> 20) & 1);
290 }
292 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
293 {
294 ioport_set_a20((val >> 1) & 1);
295 /* XXX: bit 0 is fast reset */
296 }
298 static uint32_t ioport92_read(void *opaque, uint32_t addr)
299 {
300 return ioport_get_a20() << 1;
301 }
303 /***********************************************************/
304 /* Bochs BIOS debug ports */
306 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
307 {
308 static const char shutdown_str[8] = "Shutdown";
309 static int shutdown_index = 0;
311 switch(addr) {
312 /* Bochs BIOS messages */
313 case 0x400:
314 case 0x401:
315 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
316 exit(1);
317 case 0x402:
318 case 0x403:
319 #ifdef DEBUG_BIOS
320 fprintf(stderr, "%c", val);
321 #endif
322 break;
323 case 0x8900:
324 /* same as Bochs power off */
325 if (val == shutdown_str[shutdown_index]) {
326 shutdown_index++;
327 if (shutdown_index == 8) {
328 shutdown_index = 0;
329 qemu_system_shutdown_request();
330 }
331 } else {
332 shutdown_index = 0;
333 }
334 break;
336 /* LGPL'ed VGA BIOS messages */
337 case 0x501:
338 case 0x502:
339 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
340 exit(1);
341 case 0x500:
342 case 0x503:
343 #ifdef DEBUG_BIOS
344 fprintf(stderr, "%c", val);
345 #endif
346 break;
347 }
348 }
350 void bochs_bios_init(void)
351 {
352 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
353 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
354 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
355 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
356 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
358 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
359 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
360 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
361 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
362 }
365 int load_kernel(const char *filename, uint8_t *addr,
366 uint8_t *real_addr)
367 {
368 int fd, size;
369 int setup_sects;
371 fd = open(filename, O_RDONLY | O_BINARY);
372 if (fd < 0)
373 return -1;
375 /* load 16 bit code */
376 if (read(fd, real_addr, 512) != 512)
377 goto fail;
378 setup_sects = real_addr[0x1F1];
379 if (!setup_sects)
380 setup_sects = 4;
381 if (read(fd, real_addr + 512, setup_sects * 512) !=
382 setup_sects * 512)
383 goto fail;
385 /* load 32 bit code */
386 size = read(fd, addr, 16 * 1024 * 1024);
387 if (size < 0)
388 goto fail;
389 close(fd);
390 return size;
391 fail:
392 close(fd);
393 return -1;
394 }
396 static void main_cpu_reset(void *opaque)
397 {
398 CPUState *env = opaque;
399 cpu_reset(env);
400 }
402 /*************************************************/
404 #ifndef CONFIG_DM
405 static void putb(uint8_t **pp, int val)
406 {
407 uint8_t *q;
408 q = *pp;
409 *q++ = val;
410 *pp = q;
411 }
413 static void putstr(uint8_t **pp, const char *str)
414 {
415 uint8_t *q;
416 q = *pp;
417 while (*str)
418 *q++ = *str++;
419 *pp = q;
420 }
422 static void putle16(uint8_t **pp, int val)
423 {
424 uint8_t *q;
425 q = *pp;
426 *q++ = val;
427 *q++ = val >> 8;
428 *pp = q;
429 }
431 static void putle32(uint8_t **pp, int val)
432 {
433 uint8_t *q;
434 q = *pp;
435 *q++ = val;
436 *q++ = val >> 8;
437 *q++ = val >> 16;
438 *q++ = val >> 24;
439 *pp = q;
440 }
442 static int mpf_checksum(const uint8_t *data, int len)
443 {
444 int sum, i;
445 sum = 0;
446 for(i = 0; i < len; i++)
447 sum += data[i];
448 return sum & 0xff;
449 }
451 /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
452 static void bios_add_mptable(uint8_t *bios_data)
453 {
454 uint8_t *mp_config_table, *q, *float_pointer_struct;
455 int ioapic_id, offset, i, len;
457 if (smp_cpus <= 1)
458 return;
460 mp_config_table = bios_data + 0xb000;
461 q = mp_config_table;
462 putstr(&q, "PCMP"); /* "PCMP signature */
463 putle16(&q, 0); /* table length (patched later) */
464 putb(&q, 4); /* spec rev */
465 putb(&q, 0); /* checksum (patched later) */
466 putstr(&q, "QEMUCPU "); /* OEM id */
467 putstr(&q, "0.1 "); /* vendor id */
468 putle32(&q, 0); /* OEM table ptr */
469 putle16(&q, 0); /* OEM table size */
470 putle16(&q, 20); /* entry count */
471 putle32(&q, 0xfee00000); /* local APIC addr */
472 putle16(&q, 0); /* ext table length */
473 putb(&q, 0); /* ext table checksum */
474 putb(&q, 0); /* reserved */
476 for(i = 0; i < smp_cpus; i++) {
477 putb(&q, 0); /* entry type = processor */
478 putb(&q, i); /* APIC id */
479 putb(&q, 0x11); /* local APIC version number */
480 if (i == 0)
481 putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
482 else
483 putb(&q, 1); /* cpu flags: enabled */
484 putb(&q, 0); /* cpu signature */
485 putb(&q, 6);
486 putb(&q, 0);
487 putb(&q, 0);
488 putle16(&q, 0x201); /* feature flags */
489 putle16(&q, 0);
491 putle16(&q, 0); /* reserved */
492 putle16(&q, 0);
493 putle16(&q, 0);
494 putle16(&q, 0);
495 }
497 /* isa bus */
498 putb(&q, 1); /* entry type = bus */
499 putb(&q, 0); /* bus ID */
500 putstr(&q, "ISA ");
502 /* ioapic */
503 ioapic_id = smp_cpus;
504 putb(&q, 2); /* entry type = I/O APIC */
505 putb(&q, ioapic_id); /* apic ID */
506 putb(&q, 0x11); /* I/O APIC version number */
507 putb(&q, 1); /* enable */
508 putle32(&q, 0xfec00000); /* I/O APIC addr */
510 /* irqs */
511 for(i = 0; i < 16; i++) {
512 putb(&q, 3); /* entry type = I/O interrupt */
513 putb(&q, 0); /* interrupt type = vectored interrupt */
514 putb(&q, 0); /* flags: po=0, el=0 */
515 putb(&q, 0);
516 putb(&q, 0); /* source bus ID = ISA */
517 putb(&q, i); /* source bus IRQ */
518 putb(&q, ioapic_id); /* dest I/O APIC ID */
519 putb(&q, i); /* dest I/O APIC interrupt in */
520 }
521 /* patch length */
522 len = q - mp_config_table;
523 mp_config_table[4] = len;
524 mp_config_table[5] = len >> 8;
526 mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
528 /* align to 16 */
529 offset = q - bios_data;
530 offset = (offset + 15) & ~15;
531 float_pointer_struct = bios_data + offset;
533 /* floating pointer structure */
534 q = float_pointer_struct;
535 putstr(&q, "_MP_");
536 /* pointer to MP config table */
537 putle32(&q, mp_config_table - bios_data + 0x000f0000);
539 putb(&q, 1); /* length in 16 byte units */
540 putb(&q, 4); /* MP spec revision */
541 putb(&q, 0); /* checksum (patched later) */
542 putb(&q, 0); /* MP feature byte 1 */
544 putb(&q, 0);
545 putb(&q, 0);
546 putb(&q, 0);
547 putb(&q, 0);
548 float_pointer_struct[10] =
549 -mpf_checksum(float_pointer_struct, q - float_pointer_struct);
550 }
551 #endif /* !CONFIG_DM */
554 static const int ide_iobase[2] = { 0x1f0, 0x170 };
555 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
556 static const int ide_irq[2] = { 14, 15 };
558 #define NE2000_NB_MAX 6
560 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
561 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
563 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
564 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
566 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
567 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
569 /* PIIX4 acpi pci configuration space, func 3 */
570 extern void pci_piix4_acpi_init(PCIBus *bus);
572 #ifdef HAS_AUDIO
573 static void audio_init (PCIBus *pci_bus)
574 {
575 struct soundhw *c;
576 int audio_enabled = 0;
578 for (c = soundhw; !audio_enabled && c->name; ++c) {
579 audio_enabled = c->enabled;
580 }
582 if (audio_enabled) {
583 AudioState *s;
585 s = AUD_init ();
586 if (s) {
587 for (c = soundhw; c->name; ++c) {
588 if (c->enabled) {
589 if (c->isa) {
590 c->init.init_isa (s);
591 }
592 else {
593 if (pci_bus) {
594 c->init.init_pci (pci_bus, s);
595 }
596 }
597 }
598 }
599 }
600 }
601 }
602 #endif
604 static void pc_init_ne2k_isa(NICInfo *nd)
605 {
606 static int nb_ne2k = 0;
608 if (nb_ne2k == NE2000_NB_MAX)
609 return;
610 isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
611 nb_ne2k++;
612 }
614 #define NOBIOS 1
616 /* PC hardware initialisation */
617 static void pc_init1(uint64_t ram_size, int vga_ram_size, int boot_device,
618 DisplayState *ds, const char **fd_filename, int snapshot,
619 const char *kernel_filename, const char *kernel_cmdline,
620 const char *initrd_filename, time_t timeoffset,
621 int pci_enabled)
622 {
623 #ifndef NOBIOS
624 char buf[1024];
625 int ret, initrd_size;
626 #endif
627 int linux_boot, i;
628 #ifndef NOBIOS
629 unsigned long bios_offset, vga_bios_offset;
630 int bios_size, isa_bios_size;
631 #endif /* !NOBIOS */
632 PCIBus *pci_bus;
633 CPUState *env;
634 NICInfo *nd;
636 linux_boot = (kernel_filename != NULL);
638 /* init CPUs */
639 for(i = 0; i < smp_cpus; i++) {
640 env = cpu_init();
641 #ifndef CONFIG_DM
642 if (i != 0)
643 env->hflags |= HF_HALTED_MASK;
644 if (smp_cpus > 1) {
645 /* XXX: enable it in all cases */
646 env->cpuid_features |= CPUID_APIC;
647 }
648 #endif /* !CONFIG_DM */
649 register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
650 qemu_register_reset(main_cpu_reset, env);
651 #ifndef CONFIG_DM
652 if (pci_enabled) {
653 apic_init(env);
654 }
655 #endif /* !CONFIG_DM */
656 }
658 /* allocate RAM */
659 #ifndef CONFIG_DM /* HVM domain owns memory */
660 cpu_register_physical_memory(0, ram_size, 0);
661 #endif
663 #ifndef NOBIOS
664 /* BIOS load */
665 bios_offset = ram_size + vga_ram_size;
666 vga_bios_offset = bios_offset + 256 * 1024;
668 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
669 bios_size = get_image_size(buf);
670 if (bios_size <= 0 ||
671 (bios_size % 65536) != 0 ||
672 bios_size > (256 * 1024)) {
673 goto bios_error;
674 }
675 ret = load_image(buf, phys_ram_base + bios_offset);
676 if (ret != bios_size) {
677 bios_error:
678 fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
679 exit(1);
680 }
681 if (bios_size == 65536) {
682 bios_add_mptable(phys_ram_base + bios_offset);
683 }
685 /* VGA BIOS load */
686 if (cirrus_vga_enabled) {
687 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
688 } else {
689 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
690 }
691 ret = load_image(buf, phys_ram_base + vga_bios_offset);
692 #endif /* !NOBIOS */
694 /* setup basic memory access */
695 #ifndef CONFIG_DM /* HVM domain owns memory */
696 cpu_register_physical_memory(0xc0000, 0x10000,
697 vga_bios_offset | IO_MEM_ROM);
698 #endif
700 #ifndef NOBIOS
701 /* map the last 128KB of the BIOS in ISA space */
702 isa_bios_size = bios_size;
703 if (isa_bios_size > (128 * 1024))
704 isa_bios_size = 128 * 1024;
705 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
706 IO_MEM_UNASSIGNED);
707 cpu_register_physical_memory(0x100000 - isa_bios_size,
708 isa_bios_size,
709 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
710 /* map all the bios at the top of memory */
711 cpu_register_physical_memory((uint32_t)(-bios_size),
712 bios_size, bios_offset | IO_MEM_ROM);
713 #endif
715 bochs_bios_init();
717 #ifndef CONFIG_DM
718 if (linux_boot) {
719 uint8_t bootsect[512];
720 uint8_t old_bootsect[512];
722 if (bs_table[0] == NULL) {
723 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
724 exit(1);
725 }
726 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
727 ret = load_image(buf, bootsect);
728 if (ret != sizeof(bootsect)) {
729 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
730 buf);
731 exit(1);
732 }
734 if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
735 /* copy the MSDOS partition table */
736 memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
737 }
739 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
741 /* now we can load the kernel */
742 ret = load_kernel(kernel_filename,
743 phys_ram_base + KERNEL_LOAD_ADDR,
744 phys_ram_base + KERNEL_PARAMS_ADDR);
745 if (ret < 0) {
746 fprintf(stderr, "qemu: could not load kernel '%s'\n",
747 kernel_filename);
748 exit(1);
749 }
751 /* load initrd */
752 initrd_size = 0;
753 if (initrd_filename) {
754 initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
755 if (initrd_size < 0) {
756 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
757 initrd_filename);
758 exit(1);
759 }
760 }
761 if (initrd_size > 0) {
762 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
763 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
764 }
765 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
766 kernel_cmdline);
767 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
768 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
769 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
770 /* loader type */
771 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
772 }
773 #endif /* !CONFIG_DM */
775 if (pci_enabled) {
776 pci_bus = i440fx_init();
777 piix3_init(pci_bus);
778 } else {
779 pci_bus = NULL;
780 }
782 /* init basic PC hardware */
783 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
785 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
787 if (cirrus_vga_enabled) {
788 if (pci_enabled) {
789 pci_cirrus_vga_init(pci_bus,
790 ds, NULL, ram_size,
791 vga_ram_size);
792 } else {
793 isa_cirrus_vga_init(ds, NULL, ram_size,
794 vga_ram_size);
795 }
796 } else {
797 vga_initialize(pci_bus, ds, NULL, ram_size,
798 vga_ram_size, 0, 0);
799 }
801 rtc_state = rtc_init(0x70, 8);
803 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
804 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
806 #ifndef CONFIG_DM
807 if (pci_enabled) {
808 ioapic = ioapic_init();
809 }
810 #endif /* !CONFIG_DM */
811 isa_pic = pic_init(pic_irq_request, first_cpu);
812 #ifndef CONFIG_DM
813 pit = pit_init(0x40, 0);
814 pcspk_init(pit);
815 #endif /* !CONFIG_DM */
816 #ifndef CONFIG_DM
817 if (pci_enabled) {
818 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
819 }
820 #endif /* !CONFIG_DM */
822 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
823 if (serial_hds[i]) {
824 serial_init(&pic_set_irq_new, isa_pic,
825 serial_io[i], serial_irq[i], serial_hds[i]);
826 }
827 }
829 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
830 if (parallel_hds[i]) {
831 parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
832 }
833 }
835 for(i = 0; i < nb_nics; i++) {
836 nd = &nd_table[i];
837 if (!nd->model) {
838 if (pci_enabled) {
839 nd->model = "ne2k_pci";
840 } else {
841 nd->model = "ne2k_isa";
842 }
843 }
844 if (strcmp(nd->model, "ne2k_isa") == 0) {
845 pc_init_ne2k_isa(nd);
846 } else if (pci_enabled) {
847 pci_nic_init(pci_bus, nd);
848 } else {
849 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
850 exit(1);
851 }
852 }
854 if (pci_enabled) {
855 pci_piix3_ide_init(pci_bus, bs_table);
856 } else {
857 for(i = 0; i < 2; i++) {
858 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
859 bs_table[2 * i], bs_table[2 * i + 1]);
860 }
861 }
863 kbd_init();
864 DMA_init(0);
865 #ifdef HAS_AUDIO
866 audio_init(pci_enabled ? pci_bus : NULL);
867 #endif
869 floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
871 cmos_init(ram_size, boot_device, bs_table, timeoffset);
873 /* using PIIX4 acpi model */
874 if (pci_enabled && acpi_enabled)
875 pci_piix4_acpi_init(pci_bus);
877 if (pci_enabled && usb_enabled) {
878 usb_uhci_init(pci_bus, usb_root_ports);
879 usb_attach(usb_root_ports[0], vm_usb_hub);
880 }
882 /* must be done after all PCI devices are instanciated */
883 /* XXX: should be done in the Bochs BIOS */
884 if (pci_enabled) {
885 pci_bios_init();
886 }
887 }
889 static void pc_init_pci(uint64_t ram_size, int vga_ram_size, int boot_device,
890 DisplayState *ds, const char **fd_filename,
891 int snapshot,
892 const char *kernel_filename,
893 const char *kernel_cmdline,
894 const char *initrd_filename,
895 time_t timeoffset)
896 {
897 pc_init1(ram_size, vga_ram_size, boot_device,
898 ds, fd_filename, snapshot,
899 kernel_filename, kernel_cmdline,
900 initrd_filename, timeoffset, 1);
901 }
903 static void pc_init_isa(uint64_t ram_size, int vga_ram_size, int boot_device,
904 DisplayState *ds, const char **fd_filename,
905 int snapshot,
906 const char *kernel_filename,
907 const char *kernel_cmdline,
908 const char *initrd_filename,
909 time_t timeoffset)
910 {
911 pc_init1(ram_size, vga_ram_size, boot_device,
912 ds, fd_filename, snapshot,
913 kernel_filename, kernel_cmdline,
914 initrd_filename, timeoffset, 0);
915 }
917 QEMUMachine pc_machine = {
918 "pc",
919 "Standard PC",
920 pc_init_pci,
921 };
923 QEMUMachine isapc_machine = {
924 "isapc",
925 "ISA-only PC",
926 pc_init_isa,
927 };