debuggers.hg

view xen/arch/x86/setup.c @ 3690:6e6976c1a545

bitkeeper revision 1.1159.242.1 (4203fb9erjxo9v5Lwlohe2bcTrLYpg)

1. Deleted slab.c, added xmalloc.c. Do not rename header or remove
unnecessary includes (yet).
2. Add explicit align arg, although current implementation
over-aligns.
3. Add list_for_each_entry_safe().
4. Make xmalloc_array use _xmalloc_array, to avoid duplicate eval
of "num" arg.
5. Rearrange slab.h a little to show the exposed functions/macros
first.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: ian.pratt@cl.cam.ac.uk
author iap10@labyrinth.cl.cam.ac.uk
date Fri Feb 04 22:47:58 2005 +0000 (2005-02-04)
parents dbc41aaba297
children 32d29625d39b
line source
2 #include <xen/config.h>
3 #include <xen/init.h>
4 #include <xen/lib.h>
5 #include <xen/sched.h>
6 #include <xen/pci.h>
7 #include <xen/serial.h>
8 #include <xen/softirq.h>
9 #include <xen/acpi.h>
10 #include <xen/console.h>
11 #include <xen/trace.h>
12 #include <xen/multiboot.h>
13 #include <asm/bitops.h>
14 #include <asm/smp.h>
15 #include <asm/processor.h>
16 #include <asm/mpspec.h>
17 #include <asm/apic.h>
18 #include <asm/desc.h>
19 #include <asm/domain_page.h>
20 #include <asm/pdb.h>
21 #include <asm/shadow.h>
22 #include <asm/e820.h>
24 /* opt_dom0_mem: Kilobytes of memory allocated to domain 0. */
25 static unsigned int opt_dom0_mem = 16000;
26 integer_param("dom0_mem", opt_dom0_mem);
28 /*
29 * opt_xenheap_megabytes: Size of Xen heap in megabytes, excluding the
30 * pfn_info table and allocation bitmap.
31 */
32 static unsigned int opt_xenheap_megabytes = XENHEAP_DEFAULT_MB;
33 #if defined(__x86_64__)
34 integer_param("xenheap_megabytes", opt_xenheap_megabytes);
35 #endif
37 /* opt_noht: If true, Hyperthreading is ignored. */
38 int opt_noht = 0;
39 boolean_param("noht", opt_noht);
41 /* opt_noacpi: If true, ACPI tables are not parsed. */
42 static int opt_noacpi = 0;
43 boolean_param("noacpi", opt_noacpi);
45 /* opt_nosmp: If true, secondary processors are ignored. */
46 static int opt_nosmp = 0;
47 boolean_param("nosmp", opt_nosmp);
49 /* opt_ignorebiostables: If true, ACPI and MP tables are ignored. */
50 /* NB. This flag implies 'nosmp' and 'noacpi'. */
51 static int opt_ignorebiostables = 0;
52 boolean_param("ignorebiostables", opt_ignorebiostables);
54 /* opt_watchdog: If true, run a watchdog NMI on each processor. */
55 static int opt_watchdog = 0;
56 boolean_param("watchdog", opt_watchdog);
58 int early_boot = 1;
60 unsigned long xenheap_phys_end;
62 extern void arch_init_memory(void);
63 extern void init_IRQ(void);
64 extern void trap_init(void);
65 extern void time_init(void);
66 extern void ac_timer_init(void);
67 extern void initialize_keytable();
68 extern int do_timer_lists_from_pit;
70 char ignore_irq13; /* set if exception 16 works */
71 struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1 };
73 #if defined(__x86_64__)
74 unsigned long mmu_cr4_features = X86_CR4_PSE | X86_CR4_PGE | X86_CR4_PAE;
75 #else
76 unsigned long mmu_cr4_features = X86_CR4_PSE | X86_CR4_PGE;
77 #endif
78 EXPORT_SYMBOL(mmu_cr4_features);
80 unsigned long wait_init_idle;
82 struct exec_domain *idle_task[NR_CPUS] = { &idle0_exec_domain };
84 #ifdef CONFIG_ACPI_INTERPRETER
85 int acpi_disabled = 0;
86 #else
87 int acpi_disabled = 1;
88 #endif
89 EXPORT_SYMBOL(acpi_disabled);
91 int phys_proc_id[NR_CPUS];
92 int logical_proc_id[NR_CPUS];
94 /* Standard macro to see if a specific flag is changeable. */
95 static inline int flag_is_changeable_p(unsigned long flag)
96 {
97 unsigned long f1, f2;
99 asm("pushf\n\t"
100 "pushf\n\t"
101 "pop %0\n\t"
102 "mov %0,%1\n\t"
103 "xor %2,%0\n\t"
104 "push %0\n\t"
105 "popf\n\t"
106 "pushf\n\t"
107 "pop %0\n\t"
108 "popf\n\t"
109 : "=&r" (f1), "=&r" (f2)
110 : "ir" (flag));
112 return ((f1^f2) & flag) != 0;
113 }
115 /* Probe for the CPUID instruction */
116 static int __init have_cpuid_p(void)
117 {
118 return flag_is_changeable_p(X86_EFLAGS_ID);
119 }
121 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
122 {
123 char *v = c->x86_vendor_id;
125 if (!strcmp(v, "GenuineIntel"))
126 c->x86_vendor = X86_VENDOR_INTEL;
127 else if (!strcmp(v, "AuthenticAMD"))
128 c->x86_vendor = X86_VENDOR_AMD;
129 else if (!strcmp(v, "CyrixInstead"))
130 c->x86_vendor = X86_VENDOR_CYRIX;
131 else if (!strcmp(v, "UMC UMC UMC "))
132 c->x86_vendor = X86_VENDOR_UMC;
133 else if (!strcmp(v, "CentaurHauls"))
134 c->x86_vendor = X86_VENDOR_CENTAUR;
135 else if (!strcmp(v, "NexGenDriven"))
136 c->x86_vendor = X86_VENDOR_NEXGEN;
137 else if (!strcmp(v, "RiseRiseRise"))
138 c->x86_vendor = X86_VENDOR_RISE;
139 else if (!strcmp(v, "GenuineTMx86") ||
140 !strcmp(v, "TransmetaCPU"))
141 c->x86_vendor = X86_VENDOR_TRANSMETA;
142 else
143 c->x86_vendor = X86_VENDOR_UNKNOWN;
144 }
146 static void __init init_intel(struct cpuinfo_x86 *c)
147 {
148 /* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it */
149 if ( c->x86 == 6 && c->x86_model < 3 && c->x86_mask < 3 )
150 clear_bit(X86_FEATURE_SEP, &c->x86_capability);
152 #ifdef CONFIG_SMP
153 if ( test_bit(X86_FEATURE_HT, &c->x86_capability) )
154 {
155 u32 eax, ebx, ecx, edx;
156 int initial_apic_id, siblings, cpu = smp_processor_id();
158 cpuid(1, &eax, &ebx, &ecx, &edx);
159 ht_per_core = siblings = (ebx & 0xff0000) >> 16;
161 if ( opt_noht )
162 clear_bit(X86_FEATURE_HT, &c->x86_capability[0]);
164 if ( siblings <= 1 )
165 {
166 printk(KERN_INFO "CPU#%d: Hyper-Threading is disabled\n", cpu);
167 }
168 else if ( siblings > 2 )
169 {
170 panic("We don't support more than two logical CPUs per package!");
171 }
172 else
173 {
174 initial_apic_id = ebx >> 24 & 0xff;
175 phys_proc_id[cpu] = initial_apic_id >> 1;
176 logical_proc_id[cpu] = initial_apic_id & 1;
177 printk(KERN_INFO "CPU#%d: Physical ID: %d, Logical ID: %d\n",
178 cpu, phys_proc_id[cpu], logical_proc_id[cpu]);
179 }
180 }
181 #endif
183 #ifdef CONFIG_VMX
184 start_vmx();
185 #endif
187 }
189 static void __init init_amd(struct cpuinfo_x86 *c)
190 {
191 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
192 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
193 clear_bit(0*32+31, &c->x86_capability);
195 switch(c->x86)
196 {
197 case 5:
198 panic("AMD K6 is not supported.\n");
199 case 6: /* An Athlon/Duron. We can trust the BIOS probably */
200 break;
201 }
202 }
204 /*
205 * This does the hard work of actually picking apart the CPU stuff...
206 */
207 void __init identify_cpu(struct cpuinfo_x86 *c)
208 {
209 int junk, i, cpu = smp_processor_id();
210 u32 xlvl, tfms;
212 phys_proc_id[cpu] = cpu;
213 logical_proc_id[cpu] = 0;
215 c->x86_vendor = X86_VENDOR_UNKNOWN;
216 c->cpuid_level = -1; /* CPUID not detected */
217 c->x86_model = c->x86_mask = 0; /* So far unknown... */
218 c->x86_vendor_id[0] = '\0'; /* Unset */
219 memset(&c->x86_capability, 0, sizeof c->x86_capability);
221 if ( !have_cpuid_p() )
222 panic("Ancient processors not supported\n");
224 /* Get vendor name */
225 cpuid(0x00000000, &c->cpuid_level,
226 (int *)&c->x86_vendor_id[0],
227 (int *)&c->x86_vendor_id[8],
228 (int *)&c->x86_vendor_id[4]);
230 get_cpu_vendor(c);
232 if ( c->cpuid_level == 0 )
233 panic("Decrepit CPUID not supported\n");
235 cpuid(0x00000001, &tfms, &junk, &junk,
236 &c->x86_capability[0]);
237 c->x86 = (tfms >> 8) & 15;
238 c->x86_model = (tfms >> 4) & 15;
239 c->x86_mask = tfms & 15;
241 /* AMD-defined flags: level 0x80000001 */
242 xlvl = cpuid_eax(0x80000000);
243 if ( (xlvl & 0xffff0000) == 0x80000000 ) {
244 if ( xlvl >= 0x80000001 )
245 c->x86_capability[1] = cpuid_edx(0x80000001);
246 }
248 /* Transmeta-defined flags: level 0x80860001 */
249 xlvl = cpuid_eax(0x80860000);
250 if ( (xlvl & 0xffff0000) == 0x80860000 ) {
251 if ( xlvl >= 0x80860001 )
252 c->x86_capability[2] = cpuid_edx(0x80860001);
253 }
255 printk("CPU%d: Before vendor init, caps: %08x %08x %08x, vendor = %d\n",
256 smp_processor_id(),
257 c->x86_capability[0],
258 c->x86_capability[1],
259 c->x86_capability[2],
260 c->x86_vendor);
262 switch ( c->x86_vendor ) {
263 case X86_VENDOR_INTEL:
264 init_intel(c);
265 break;
266 case X86_VENDOR_AMD:
267 init_amd(c);
268 break;
269 case X86_VENDOR_UNKNOWN: /* Connectix Virtual PC reports this */
270 break;
271 case X86_VENDOR_CENTAUR:
272 break;
273 default:
274 printk("Unknown CPU identifier (%d): continuing anyway, "
275 "but might fail.\n", c->x86_vendor);
276 }
278 printk("CPU caps: %08x %08x %08x %08x\n",
279 c->x86_capability[0],
280 c->x86_capability[1],
281 c->x86_capability[2],
282 c->x86_capability[3]);
284 /*
285 * On SMP, boot_cpu_data holds the common feature set between
286 * all CPUs; so make sure that we indicate which features are
287 * common between the CPUs. The first time this routine gets
288 * executed, c == &boot_cpu_data.
289 */
290 if ( c != &boot_cpu_data ) {
291 /* AND the already accumulated flags with these */
292 for ( i = 0 ; i < NCAPINTS ; i++ )
293 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
294 }
295 }
298 unsigned long cpu_initialized;
299 void __init cpu_init(void)
300 {
301 int nr = smp_processor_id();
302 struct tss_struct *t = &init_tss[nr];
304 if ( test_and_set_bit(nr, &cpu_initialized) )
305 panic("CPU#%d already initialized!!!\n", nr);
306 printk("Initializing CPU#%d\n", nr);
308 /* Set up GDT and IDT. */
309 SET_GDT_ENTRIES(current, DEFAULT_GDT_ENTRIES);
310 SET_GDT_ADDRESS(current, DEFAULT_GDT_ADDRESS);
311 __asm__ __volatile__ ( "lgdt %0" : "=m" (*current->mm.gdt) );
312 __asm__ __volatile__ ( "lidt %0" : "=m" (idt_descr) );
314 /* No nested task. */
315 __asm__ __volatile__ ( "pushf ; andw $0xbfff,(%"__OP"sp) ; popf" );
317 /* Ensure FPU gets initialised for each domain. */
318 stts();
320 /* Set up and load the per-CPU TSS and LDT. */
321 t->bitmap = IOBMP_INVALID_OFFSET;
322 memset(t->io_bitmap, ~0, sizeof(t->io_bitmap));
323 #if defined(__i386__)
324 t->ss0 = __HYPERVISOR_DS;
325 t->esp0 = get_stack_top();
326 #elif defined(__x86_64__)
327 t->rsp0 = get_stack_top();
328 #endif
329 set_tss_desc(nr,t);
330 load_TR(nr);
331 __asm__ __volatile__ ( "lldt %%ax" : : "a" (0) );
333 /* Clear all 6 debug registers. */
334 #define CD(register) __asm__ ( "mov %0,%%db" #register : : "r" (0UL) );
335 CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);
336 #undef CD
338 /* Install correct page table. */
339 write_ptbase(&current->mm);
341 init_idle_task();
342 }
344 static void __init do_initcalls(void)
345 {
346 initcall_t *call;
347 for ( call = &__initcall_start; call < &__initcall_end; call++ )
348 (*call)();
349 }
351 unsigned long pci_mem_start = 0x10000000;
353 static void __init start_of_day(void)
354 {
355 unsigned long low_mem_size;
357 #ifdef MEMORY_GUARD
358 /* Unmap the first page of CPU0's stack. */
359 extern unsigned long cpu0_stack[];
360 memguard_guard_range(cpu0_stack, PAGE_SIZE);
361 #endif
363 open_softirq(NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ, new_tlbflush_clock_period);
365 if ( opt_watchdog )
366 nmi_watchdog = NMI_LOCAL_APIC;
368 sort_exception_tables();
370 arch_do_createdomain(current);
372 /* Tell the PCI layer not to allocate too close to the RAM area.. */
373 low_mem_size = ((max_page << PAGE_SHIFT) + 0xfffff) & ~0xfffff;
374 if ( low_mem_size > pci_mem_start ) pci_mem_start = low_mem_size;
376 identify_cpu(&boot_cpu_data); /* get CPU type info */
377 if ( cpu_has_fxsr ) set_in_cr4(X86_CR4_OSFXSR);
378 if ( cpu_has_xmm ) set_in_cr4(X86_CR4_OSXMMEXCPT);
379 #ifdef CONFIG_SMP
380 if ( opt_ignorebiostables )
381 {
382 opt_nosmp = 1; /* No SMP without configuration */
383 opt_noacpi = 1; /* ACPI will just confuse matters also */
384 }
385 else
386 {
387 find_smp_config();
388 smp_alloc_memory(); /* trampoline which other CPUs jump at */
389 }
390 #endif
391 paging_init(); /* not much here now, but sets up fixmap */
392 if ( !opt_noacpi )
393 acpi_boot_init();
394 #ifdef CONFIG_SMP
395 if ( smp_found_config )
396 get_smp_config();
397 #endif
398 scheduler_init();
399 init_IRQ(); /* installs simple interrupt wrappers. Starts HZ clock. */
400 trap_init();
401 time_init(); /* installs software handler for HZ clock. */
402 init_apic_mappings(); /* make APICs addressable in our pagetables. */
404 arch_init_memory();
406 #ifndef CONFIG_SMP
407 APIC_init_uniprocessor();
408 #else
409 if ( opt_nosmp )
410 APIC_init_uniprocessor();
411 else
412 smp_boot_cpus();
413 /*
414 * Does loads of stuff, including kicking the local
415 * APIC, and the IO APIC after other CPUs are booted.
416 * Each IRQ is preferably handled by IO-APIC, but
417 * fall thru to 8259A if we have to (but slower).
418 */
419 #endif
421 __sti();
423 initialize_keytable(); /* call back handling for key codes */
425 serial_init_stage2();
427 #ifdef XEN_DEBUGGER
428 initialize_pdb(); /* pervasive debugger */
429 #endif
431 if ( !cpu_has_apic )
432 {
433 do_timer_lists_from_pit = 1;
434 if ( smp_num_cpus != 1 )
435 panic("We need local APICs on SMP machines!");
436 }
438 ac_timer_init(); /* init accurate timers */
439 init_xen_time(); /* initialise the time */
440 schedulers_start(); /* start scheduler for each CPU */
442 check_nmi_watchdog();
444 #ifdef CONFIG_PCI
445 pci_init();
446 #endif
447 do_initcalls();
449 #ifdef CONFIG_SMP
450 wait_init_idle = cpu_online_map;
451 clear_bit(smp_processor_id(), &wait_init_idle);
452 smp_threads_ready = 1;
453 smp_commence(); /* Tell other CPUs that state of the world is stable. */
454 while ( wait_init_idle != 0 )
455 {
456 cpu_relax();
457 barrier();
458 }
459 #endif
461 watchdog_on = 1;
462 #ifdef __x86_64__ /* x86_32 uses low mappings when building DOM0. */
463 zap_low_mappings();
464 #endif
465 }
467 void __init __start_xen(multiboot_info_t *mbi)
468 {
469 unsigned char *cmdline;
470 module_t *mod = (module_t *)__va(mbi->mods_addr);
471 void *heap_start;
472 unsigned long firsthole_start, nr_pages;
473 unsigned long dom0_memory_start, dom0_memory_end;
474 unsigned long initial_images_start, initial_images_end;
475 struct e820entry e820_raw[E820MAX];
476 int i, e820_raw_nr = 0, bytes = 0;
478 /* Parse the command-line options. */
479 if ( (mbi->flags & MBI_CMDLINE) && (mbi->cmdline != 0) )
480 cmdline_parse(__va(mbi->cmdline));
482 /* Must do this early -- e.g., spinlocks rely on get_current(). */
483 set_current(&idle0_exec_domain);
485 /* We initialise the serial devices very early so we can get debugging. */
486 serial_init_stage1();
488 init_console();
490 /* Check that we have at least one Multiboot module. */
491 if ( !(mbi->flags & MBI_MODULES) || (mbi->mods_count == 0) )
492 {
493 printk("FATAL ERROR: Require at least one Multiboot module.\n");
494 for ( ; ; ) ;
495 }
497 xenheap_phys_end = opt_xenheap_megabytes << 20;
499 if ( mbi->flags & MBI_MEMMAP )
500 {
501 while ( bytes < mbi->mmap_length )
502 {
503 memory_map_t *map = __va(mbi->mmap_addr + bytes);
504 e820_raw[e820_raw_nr].addr =
505 ((u64)map->base_addr_high << 32) | (u64)map->base_addr_low;
506 e820_raw[e820_raw_nr].size =
507 ((u64)map->length_high << 32) | (u64)map->length_low;
508 e820_raw[e820_raw_nr].type =
509 (map->type > E820_SHARED_PAGE) ? E820_RESERVED : map->type;
510 e820_raw_nr++;
511 bytes += map->size + 4;
512 }
513 }
514 else if ( mbi->flags & MBI_MEMLIMITS )
515 {
516 e820_raw[0].addr = 0;
517 e820_raw[0].size = mbi->mem_lower << 10;
518 e820_raw[0].type = E820_RAM;
519 e820_raw[1].addr = 0x100000;
520 e820_raw[1].size = mbi->mem_upper << 10;
521 e820_raw[1].type = E820_RAM;
522 e820_raw_nr = 2;
523 }
524 else
525 {
526 printk("FATAL ERROR: Bootloader provided no memory information.\n");
527 for ( ; ; ) ;
528 }
530 max_page = init_e820(e820_raw, e820_raw_nr);
532 /* Find the first high-memory RAM hole. */
533 for ( i = 0; i < e820.nr_map; i++ )
534 if ( (e820.map[i].type == E820_RAM) &&
535 (e820.map[i].addr >= 0x100000) )
536 break;
537 firsthole_start = e820.map[i].addr + e820.map[i].size;
539 /* Relocate the Multiboot modules. */
540 initial_images_start = xenheap_phys_end;
541 initial_images_end = initial_images_start +
542 (mod[mbi->mods_count-1].mod_end - mod[0].mod_start);
543 if ( initial_images_end > firsthole_start )
544 {
545 printk("Not enough memory to stash the DOM0 kernel image.\n");
546 for ( ; ; ) ;
547 }
548 #if defined(__i386__)
549 memmove((void *)initial_images_start, /* use low mapping */
550 (void *)mod[0].mod_start, /* use low mapping */
551 mod[mbi->mods_count-1].mod_end - mod[0].mod_start);
552 #elif defined(__x86_64__)
553 memmove(__va(initial_images_start),
554 __va(mod[0].mod_start),
555 mod[mbi->mods_count-1].mod_end - mod[0].mod_start);
556 #endif
558 /* Initialise boot-time allocator with all RAM situated after modules. */
559 heap_start = memguard_init(&_end);
560 heap_start = __va(init_boot_allocator(__pa(heap_start)));
561 nr_pages = 0;
562 for ( i = 0; i < e820.nr_map; i++ )
563 {
564 if ( e820.map[i].type != E820_RAM )
565 continue;
566 nr_pages += e820.map[i].size >> PAGE_SHIFT;
567 if ( (e820.map[i].addr + e820.map[i].size) >= initial_images_end )
568 init_boot_pages((e820.map[i].addr < initial_images_end) ?
569 initial_images_end : e820.map[i].addr,
570 e820.map[i].addr + e820.map[i].size);
571 }
573 printk("System RAM: %luMB (%lukB)\n",
574 nr_pages >> (20 - PAGE_SHIFT),
575 nr_pages << (PAGE_SHIFT - 10));
577 /* Allocate an aligned chunk of RAM for DOM0. */
578 dom0_memory_start = alloc_boot_pages(opt_dom0_mem << 10, 4UL << 20);
579 dom0_memory_end = dom0_memory_start + (opt_dom0_mem << 10);
580 if ( dom0_memory_start == 0 )
581 {
582 printk("Not enough memory for DOM0 memory reservation.\n");
583 for ( ; ; ) ;
584 }
586 init_frametable();
588 end_boot_allocator();
590 init_xenheap_pages(__pa(heap_start), xenheap_phys_end);
591 printk("Xen heap: %luMB (%lukB)\n",
592 (xenheap_phys_end-__pa(heap_start)) >> 20,
593 (xenheap_phys_end-__pa(heap_start)) >> 10);
595 early_boot = 0;
597 start_of_day();
599 grant_table_init();
601 shadow_mode_init();
603 /* Create initial domain 0. */
604 dom0 = do_createdomain(0, 0);
605 if ( dom0 == NULL )
606 panic("Error creating domain 0\n");
608 set_bit(DF_PRIVILEGED, &dom0->d_flags);
610 /* Grab the DOM0 command line. Skip past the image name. */
611 cmdline = (unsigned char *)(mod[0].string ? __va(mod[0].string) : NULL);
612 if ( cmdline != NULL )
613 {
614 while ( *cmdline == ' ' ) cmdline++;
615 if ( (cmdline = strchr(cmdline, ' ')) != NULL )
616 while ( *cmdline == ' ' ) cmdline++;
617 }
619 /*
620 * We're going to setup domain0 using the module(s) that we stashed safely
621 * above our heap. The second module, if present, is an initrd ramdisk.
622 */
623 if ( construct_dom0(dom0, dom0_memory_start, dom0_memory_end,
624 initial_images_start,
625 mod[0].mod_end-mod[0].mod_start,
626 (mbi->mods_count == 1) ? 0 :
627 initial_images_start +
628 (mod[1].mod_start-mod[0].mod_start),
629 (mbi->mods_count == 1) ? 0 :
630 mod[mbi->mods_count-1].mod_end - mod[1].mod_start,
631 cmdline) != 0)
632 panic("Could not set up DOM0 guest OS\n");
634 /* The stash space for the initial kernel image can now be freed up. */
635 init_domheap_pages(initial_images_start, initial_images_end);
637 scrub_heap_pages();
639 init_trace_bufs();
641 /* Give up the VGA console if DOM0 is configured to grab it. */
642 console_endboot(cmdline && strstr(cmdline, "tty0"));
644 domain_unpause_by_systemcontroller(current->domain);
645 domain_unpause_by_systemcontroller(dom0);
646 startup_cpu_idle_loop();
647 }