debuggers.hg

view tools/ioemu/patches/ioemu-save-restore-ide @ 0:7d21f7218375

Exact replica of unstable on 051908 + README-this
author Mukesh Rathor
date Mon May 19 15:34:57 2008 -0700 (2008-05-19)
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1 Index: ioemu/hw/ide.c
2 ===================================================================
3 --- ioemu.orig/hw/ide.c 2007-05-03 19:24:12.000000000 +0100
4 +++ ioemu/hw/ide.c 2007-05-03 19:24:43.000000000 +0100
5 @@ -2623,9 +2623,124 @@
6 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
7 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
9 + register_savevm("ide_pci", 0, 1, pci_device_save, pci_device_load, d);
10 register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
11 }
13 +static void pci_ide_save(QEMUFile* f, void *opaque)
14 +{
15 + PCIIDEState *d = opaque;
16 + int i;
17 +
18 + for(i = 0; i < 2; i++) {
19 + BMDMAState *bm = &d->bmdma[i];
20 + qemu_put_8s(f, &bm->cmd);
21 + qemu_put_8s(f, &bm->status);
22 + qemu_put_be32s(f, &bm->addr);
23 + /* XXX: if a transfer is pending, we do not save it yet */
24 + }
25 +
26 + /* per IDE interface data */
27 + for(i = 0; i < 2; i++) {
28 + IDEState *s = &d->ide_if[i * 2];
29 + uint8_t drive1_selected;
30 + qemu_put_8s(f, &s->cmd);
31 + drive1_selected = (s->cur_drive != s);
32 + qemu_put_8s(f, &drive1_selected);
33 + }
34 +
35 + /* per IDE drive data */
36 + for(i = 0; i < 4; i++) {
37 + IDEState *s = &d->ide_if[i];
38 + qemu_put_be32s(f, &s->mult_sectors);
39 + qemu_put_be32s(f, &s->identify_set);
40 + if (s->identify_set) {
41 + qemu_put_buffer(f, (const uint8_t *)s->identify_data, 512);
42 + }
43 + qemu_put_8s(f, &s->write_cache);
44 + qemu_put_8s(f, &s->feature);
45 + qemu_put_8s(f, &s->error);
46 + qemu_put_be32s(f, &s->nsector);
47 + qemu_put_8s(f, &s->sector);
48 + qemu_put_8s(f, &s->lcyl);
49 + qemu_put_8s(f, &s->hcyl);
50 + qemu_put_8s(f, &s->hob_feature);
51 + qemu_put_8s(f, &s->hob_nsector);
52 + qemu_put_8s(f, &s->hob_sector);
53 + qemu_put_8s(f, &s->hob_lcyl);
54 + qemu_put_8s(f, &s->hob_hcyl);
55 + qemu_put_8s(f, &s->select);
56 + qemu_put_8s(f, &s->status);
57 + qemu_put_8s(f, &s->lba48);
58 +
59 + qemu_put_8s(f, &s->sense_key);
60 + qemu_put_8s(f, &s->asc);
61 + /* XXX: if a transfer is pending, we do not save it yet */
62 + }
63 +}
64 +
65 +static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
66 +{
67 + PCIIDEState *d = opaque;
68 + int ret, i;
69 +
70 + if (version_id != 1)
71 + return -EINVAL;
72 +
73 + for(i = 0; i < 2; i++) {
74 + BMDMAState *bm = &d->bmdma[i];
75 + qemu_get_8s(f, &bm->cmd);
76 + qemu_get_8s(f, &bm->status);
77 + qemu_get_be32s(f, &bm->addr);
78 + /* XXX: if a transfer is pending, we do not save it yet */
79 + }
80 +
81 + /* per IDE interface data */
82 + for(i = 0; i < 2; i++) {
83 + IDEState *s = &d->ide_if[i * 2];
84 + uint8_t drive1_selected;
85 + qemu_get_8s(f, &s->cmd);
86 + qemu_get_8s(f, &drive1_selected);
87 + s->cur_drive = &d->ide_if[i * 2 + (drive1_selected != 0)];
88 + }
89 +
90 + /* per IDE drive data */
91 + for(i = 0; i < 4; i++) {
92 + IDEState *s = &d->ide_if[i];
93 + qemu_get_be32s(f, &s->mult_sectors);
94 + qemu_get_be32s(f, &s->identify_set);
95 + if (s->identify_set) {
96 + qemu_get_buffer(f, (uint8_t *)s->identify_data, 512);
97 + }
98 + qemu_get_8s(f, &s->write_cache);
99 + qemu_get_8s(f, &s->feature);
100 + qemu_get_8s(f, &s->error);
101 + qemu_get_be32s(f, &s->nsector);
102 + qemu_get_8s(f, &s->sector);
103 + qemu_get_8s(f, &s->lcyl);
104 + qemu_get_8s(f, &s->hcyl);
105 + qemu_get_8s(f, &s->hob_feature);
106 + qemu_get_8s(f, &s->hob_nsector);
107 + qemu_get_8s(f, &s->hob_sector);
108 + qemu_get_8s(f, &s->hob_lcyl);
109 + qemu_get_8s(f, &s->hob_hcyl);
110 + qemu_get_8s(f, &s->select);
111 + qemu_get_8s(f, &s->status);
112 + qemu_get_8s(f, &s->lba48);
113 +
114 + qemu_get_8s(f, &s->sense_key);
115 + qemu_get_8s(f, &s->asc);
116 + /* XXX: if a transfer is pending, we do not save it yet */
117 + if (s->status & (DRQ_STAT|BUSY_STAT)) {
118 + /* Tell the guest that its transfer has gone away */
119 + ide_abort_command(s);
120 + ide_set_irq(s);
121 + }
122 + }
123 + return 0;
124 +}
125 +
126 +
127 /* hd_table must contain 4 block drivers */
128 /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
129 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn)
130 @@ -2662,6 +2777,7 @@
131 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
132 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
134 + register_savevm("ide_pci", 0, 1, pci_device_save, pci_device_load, d);
135 register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
136 }