debuggers.hg

view tools/ioemu/patches/qemu-pci @ 0:7d21f7218375

Exact replica of unstable on 051908 + README-this
author Mukesh Rathor
date Mon May 19 15:34:57 2008 -0700 (2008-05-19)
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1 Index: ioemu/hw/pci.c
2 ===================================================================
3 --- ioemu.orig/hw/pci.c 2007-05-10 15:17:54.000000000 +0100
4 +++ ioemu/hw/pci.c 2007-05-10 15:19:29.000000000 +0100
5 @@ -314,6 +314,7 @@
6 case 0x0b:
7 case 0x0e:
8 case 0x10 ... 0x27: /* base */
9 + case 0x2c ... 0x2f: /* subsystem vendor id, subsystem id */
10 case 0x30 ... 0x33: /* rom */
11 case 0x3d:
12 can_write = 0;
13 @@ -346,6 +347,18 @@
14 break;
15 }
16 if (can_write) {
17 + if( addr == 0x05 ) {
18 + /* In Command Register, bits 15:11 are reserved */
19 + val &= 0x07;
20 + } else if ( addr == 0x06 ) {
21 + /* In Status Register, bits 6, 2:0 are reserved, */
22 + /* and bits 7,5,4,3 are read only */
23 + val = d->config[addr];
24 + } else if ( addr == 0x07 ) {
25 + /* In Status Register, bits 10,9 are reserved, */
26 + val = (val & ~0x06) | (d->config[addr] & 0x06);
27 + }
28 +
29 d->config[addr] = val;
30 }
31 if (++addr > 0xff)
32 Index: ioemu/hw/rtl8139.c
33 ===================================================================
34 --- ioemu.orig/hw/rtl8139.c 2007-05-10 15:17:54.000000000 +0100
35 +++ ioemu/hw/rtl8139.c 2007-05-10 15:19:29.000000000 +0100
36 @@ -3432,6 +3432,8 @@
37 pci_conf[0x0e] = 0x00; /* header_type */
38 pci_conf[0x3d] = 1; /* interrupt pin 0 */
39 pci_conf[0x34] = 0xdc;
40 + pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
41 + pci_conf[0x2d] = pci_conf[0x01];
43 s = &d->rtl8139;
45 Index: ioemu/hw/usb-uhci.c
46 ===================================================================
47 --- ioemu.orig/hw/usb-uhci.c 2007-05-10 15:17:54.000000000 +0100
48 +++ ioemu/hw/usb-uhci.c 2007-05-10 15:19:29.000000000 +0100
49 @@ -832,6 +832,8 @@
50 pci_conf[0x0e] = 0x00; // header_type
51 pci_conf[0x3d] = 4; // interrupt pin 3
52 pci_conf[0x60] = 0x10; // release number
53 + pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
54 + pci_conf[0x2d] = pci_conf[0x01];
56 for(i = 0; i < NB_PORTS; i++) {
57 qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
58 Index: ioemu/vl.h
59 ===================================================================
60 --- ioemu.orig/vl.h 2007-05-10 15:19:28.000000000 +0100
61 +++ ioemu/vl.h 2007-05-10 15:19:29.000000000 +0100
62 @@ -777,8 +777,11 @@
63 #define PCI_MAX_LAT 0x3f /* 8 bits */
65 struct PCIDevice {
66 - /* PCI config space */
67 - uint8_t config[256];
68 + /*
69 + * PCI config space. The 4 extra bytes are a safety buffer for guest
70 + * word/dword writes that can extend past byte 0xff.
71 + */
72 + uint8_t config[256+4];
74 /* the following fields are read only */
75 PCIBus *bus;