debuggers.hg

view xen/arch/ia64/linux-xen/sn/kernel/setup.c @ 0:7d21f7218375

Exact replica of unstable on 051908 + README-this
author Mukesh Rathor
date Mon May 19 15:34:57 2008 -0700 (2008-05-19)
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1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999,2001-2006 Silicon Graphics, Inc. All rights reserved.
7 */
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/delay.h>
12 #include <linux/kernel.h>
13 #ifndef XEN
14 #include <linux/kdev_t.h>
15 #endif
16 #include <linux/string.h>
17 #ifndef XEN
18 #include <linux/screen_info.h>
19 #endif
20 #include <linux/console.h>
21 #include <linux/timex.h>
22 #include <linux/sched.h>
23 #include <linux/ioport.h>
24 #include <linux/mm.h>
25 #include <linux/serial.h>
26 #include <linux/irq.h>
27 #include <linux/bootmem.h>
28 #include <linux/mmzone.h>
29 #include <linux/interrupt.h>
30 #include <linux/acpi.h>
31 #include <linux/compiler.h>
32 #include <linux/sched.h>
33 #ifndef XEN
34 #include <linux/root_dev.h>
35 #endif
36 #include <linux/nodemask.h>
37 #include <linux/pm.h>
38 #include <linux/efi.h>
40 #include <asm/io.h>
41 #include <asm/sal.h>
42 #include <asm/machvec.h>
43 #include <asm/system.h>
44 #include <asm/processor.h>
45 #ifndef XEN
46 #include <asm/vga.h>
47 #endif
48 #include <asm/sn/arch.h>
49 #include <asm/sn/addrs.h>
50 #include <asm/sn/pda.h>
51 #include <asm/sn/nodepda.h>
52 #include <asm/sn/sn_cpuid.h>
53 #include <asm/sn/simulator.h>
54 #include <asm/sn/leds.h>
55 #ifndef XEN
56 #include <asm/sn/bte.h>
57 #endif
58 #include <asm/sn/shub_mmr.h>
59 #ifndef XEN
60 #include <asm/sn/clksupport.h>
61 #endif
62 #include <asm/sn/sn_sal.h>
63 #include <asm/sn/geo.h>
64 #include <asm/sn/sn_feature_sets.h>
65 #ifndef XEN
66 #include "xtalk/xwidgetdev.h"
67 #include "xtalk/hubdev.h"
68 #else
69 #include "asm/sn/xwidgetdev.h"
70 #include "asm/sn/hubdev.h"
71 #endif
72 #include <asm/sn/klconfig.h>
73 #ifdef XEN
74 #include <asm/sn/shubio.h>
75 #endif
78 DEFINE_PER_CPU(struct pda_s, pda_percpu);
80 #define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */
82 extern void bte_init_node(nodepda_t *, cnodeid_t);
84 extern void sn_timer_init(void);
85 extern unsigned long last_time_offset;
86 extern void (*ia64_mark_idle) (int);
87 extern void snidle(int);
88 extern unsigned long long (*ia64_printk_clock)(void);
90 unsigned long sn_rtc_cycles_per_second;
91 EXPORT_SYMBOL(sn_rtc_cycles_per_second);
93 DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
94 EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
96 DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_COMPACT_NODES]);
97 EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
99 DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
100 EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
102 char sn_system_serial_number_string[128];
103 EXPORT_SYMBOL(sn_system_serial_number_string);
104 u64 sn_partition_serial_number;
105 EXPORT_SYMBOL(sn_partition_serial_number);
106 u8 sn_partition_id;
107 EXPORT_SYMBOL(sn_partition_id);
108 u8 sn_system_size;
109 EXPORT_SYMBOL(sn_system_size);
110 u8 sn_sharing_domain_size;
111 EXPORT_SYMBOL(sn_sharing_domain_size);
112 u8 sn_coherency_id;
113 EXPORT_SYMBOL(sn_coherency_id);
114 u8 sn_region_size;
115 EXPORT_SYMBOL(sn_region_size);
116 int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
118 short physical_node_map[MAX_NUMALINK_NODES];
119 static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS];
121 EXPORT_SYMBOL(physical_node_map);
123 int num_cnodes;
125 static void sn_init_pdas(char **);
126 static void build_cnode_tables(void);
128 static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
130 #ifndef XEN
131 /*
132 * The format of "screen_info" is strange, and due to early i386-setup
133 * code. This is just enough to make the console code think we're on a
134 * VGA color display.
135 */
136 struct screen_info sn_screen_info = {
137 .orig_x = 0,
138 .orig_y = 0,
139 .orig_video_mode = 3,
140 .orig_video_cols = 80,
141 .orig_video_ega_bx = 3,
142 .orig_video_lines = 25,
143 .orig_video_isVGA = 1,
144 .orig_video_points = 16
145 };
146 #endif
148 /*
149 * This routine can only be used during init, since
150 * smp_boot_data is an init data structure.
151 * We have to use smp_boot_data.cpu_phys_id to find
152 * the physical id of the processor because the normal
153 * cpu_physical_id() relies on data structures that
154 * may not be initialized yet.
155 */
157 static int __init pxm_to_nasid(int pxm)
158 {
159 int i;
160 int nid;
162 nid = pxm_to_node(pxm);
163 for (i = 0; i < num_node_memblks; i++) {
164 if (node_memblk[i].nid == nid) {
165 return NASID_GET(node_memblk[i].start_paddr);
166 }
167 }
168 return -1;
169 }
171 /**
172 * early_sn_setup - early setup routine for SN platforms
173 *
174 * Sets up an initial console to aid debugging. Intended primarily
175 * for bringup. See start_kernel() in init/main.c.
176 */
178 void __init early_sn_setup(void)
179 {
180 efi_system_table_t *efi_systab;
181 efi_config_table_t *config_tables;
182 struct ia64_sal_systab *sal_systab;
183 struct ia64_sal_desc_entry_point *ep;
184 char *p;
185 int i, j;
187 /*
188 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
189 * IO on SN2 is done via SAL calls, early_printk won't work without this.
190 *
191 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
192 * Any changes to those file may have to be made hereas well.
193 */
194 efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
195 config_tables = __va(efi_systab->tables);
196 for (i = 0; i < efi_systab->nr_tables; i++) {
197 if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
198 0) {
199 sal_systab = __va(config_tables[i].table);
200 p = (char *)(sal_systab + 1);
201 for (j = 0; j < sal_systab->entry_count; j++) {
202 if (*p == SAL_DESC_ENTRY_POINT) {
203 ep = (struct ia64_sal_desc_entry_point
204 *)p;
205 ia64_sal_handler_init(__va
206 (ep->sal_proc),
207 __va(ep->gp));
208 return;
209 }
210 p += SAL_DESC_SIZE(*p);
211 }
212 }
213 }
214 /* Uh-oh, SAL not available?? */
215 printk(KERN_ERR "failed to find SAL entry point\n");
216 }
218 extern int platform_intr_list[];
219 static int __initdata shub_1_1_found;
221 /*
222 * sn_check_for_wars
223 *
224 * Set flag for enabling shub specific wars
225 */
227 static inline int __init is_shub_1_1(int nasid)
228 {
229 unsigned long id;
230 int rev;
232 if (is_shub2())
233 return 0;
234 id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
235 rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
236 return rev <= 2;
237 }
239 static void __init sn_check_for_wars(void)
240 {
241 int cnode;
243 if (is_shub2()) {
244 /* none yet */
245 } else {
246 for_each_online_node(cnode) {
247 if (is_shub_1_1(cnodeid_to_nasid(cnode)))
248 shub_1_1_found = 1;
249 }
250 }
251 }
253 #ifndef XEN
254 /*
255 * Scan the EFI PCDP table (if it exists) for an acceptable VGA console
256 * output device. If one exists, pick it and set sn_legacy_{io,mem} to
257 * reflect the bus offsets needed to address it.
258 *
259 * Since pcdp support in SN is not supported in the 2.4 kernel (or at least
260 * the one lbs is based on) just declare the needed structs here.
261 *
262 * Reference spec http://www.dig64.org/specifications/DIG64_PCDPv20.pdf
263 *
264 * Returns 0 if no acceptable vga is found, !0 otherwise.
265 *
266 * Note: This stuff is duped here because Altix requires the PCDP to
267 * locate a usable VGA device due to lack of proper ACPI support. Structures
268 * could be used from drivers/firmware/pcdp.h, but it was decided that moving
269 * this file to a more public location just for Altix use was undesireable.
270 */
272 struct hcdp_uart_desc {
273 u8 pad[45];
274 };
276 struct pcdp {
277 u8 signature[4]; /* should be 'HCDP' */
278 u32 length;
279 u8 rev; /* should be >=3 for pcdp, <3 for hcdp */
280 u8 sum;
281 u8 oem_id[6];
282 u64 oem_tableid;
283 u32 oem_rev;
284 u32 creator_id;
285 u32 creator_rev;
286 u32 num_type0;
287 struct hcdp_uart_desc uart[0]; /* num_type0 of these */
288 /* pcdp descriptors follow */
289 } __attribute__((packed));
291 struct pcdp_device_desc {
292 u8 type;
293 u8 primary;
294 u16 length;
295 u16 index;
296 /* interconnect specific structure follows */
297 /* device specific structure follows that */
298 } __attribute__((packed));
300 struct pcdp_interface_pci {
301 u8 type; /* 1 == pci */
302 u8 reserved;
303 u16 length;
304 u8 segment;
305 u8 bus;
306 u8 dev;
307 u8 fun;
308 u16 devid;
309 u16 vendid;
310 u32 acpi_interrupt;
311 u64 mmio_tra;
312 u64 ioport_tra;
313 u8 flags;
314 u8 translation;
315 } __attribute__((packed));
317 struct pcdp_vga_device {
318 u8 num_eas_desc;
319 /* ACPI Extended Address Space Desc follows */
320 } __attribute__((packed));
322 /* from pcdp_device_desc.primary */
323 #define PCDP_PRIMARY_CONSOLE 0x01
325 /* from pcdp_device_desc.type */
326 #define PCDP_CONSOLE_INOUT 0x0
327 #define PCDP_CONSOLE_DEBUG 0x1
328 #define PCDP_CONSOLE_OUT 0x2
329 #define PCDP_CONSOLE_IN 0x3
330 #define PCDP_CONSOLE_TYPE_VGA 0x8
332 #define PCDP_CONSOLE_VGA (PCDP_CONSOLE_TYPE_VGA | PCDP_CONSOLE_OUT)
334 /* from pcdp_interface_pci.type */
335 #define PCDP_IF_PCI 1
337 /* from pcdp_interface_pci.translation */
338 #define PCDP_PCI_TRANS_IOPORT 0x02
339 #define PCDP_PCI_TRANS_MMIO 0x01
341 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
342 static void
343 sn_scan_pcdp(void)
344 {
345 u8 *bp;
346 struct pcdp *pcdp;
347 struct pcdp_device_desc device;
348 struct pcdp_interface_pci if_pci;
349 extern struct efi efi;
351 if (efi.hcdp == EFI_INVALID_TABLE_ADDR)
352 return; /* no hcdp/pcdp table */
354 pcdp = __va(efi.hcdp);
356 if (pcdp->rev < 3)
357 return; /* only support PCDP (rev >= 3) */
359 for (bp = (u8 *)&pcdp->uart[pcdp->num_type0];
360 bp < (u8 *)pcdp + pcdp->length;
361 bp += device.length) {
362 memcpy(&device, bp, sizeof(device));
363 if (! (device.primary & PCDP_PRIMARY_CONSOLE))
364 continue; /* not primary console */
366 if (device.type != PCDP_CONSOLE_VGA)
367 continue; /* not VGA descriptor */
369 memcpy(&if_pci, bp+sizeof(device), sizeof(if_pci));
370 if (if_pci.type != PCDP_IF_PCI)
371 continue; /* not PCI interconnect */
373 if (if_pci.translation & PCDP_PCI_TRANS_IOPORT)
374 vga_console_iobase =
375 if_pci.ioport_tra | __IA64_UNCACHED_OFFSET;
377 if (if_pci.translation & PCDP_PCI_TRANS_MMIO)
378 vga_console_membase =
379 if_pci.mmio_tra | __IA64_UNCACHED_OFFSET;
381 break; /* once we find the primary, we're done */
382 }
383 }
384 #endif
386 static unsigned long sn2_rtc_initial;
388 static unsigned long long ia64_sn2_printk_clock(void)
389 {
390 unsigned long rtc_now = rtc_time();
392 return (rtc_now - sn2_rtc_initial) *
393 (1000000000 / sn_rtc_cycles_per_second);
394 }
395 #endif
397 /**
398 * sn_setup - SN platform setup routine
399 * @cmdline_p: kernel command line
400 *
401 * Handles platform setup for SN machines. This includes determining
402 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
403 * setting up per-node data areas. The console is also initialized here.
404 */
405 #ifdef XEN
406 void __cpuinit sn_cpu_init(void);
407 #endif
409 void __init sn_setup(char **cmdline_p)
410 {
411 #ifndef XEN
412 long status, ticks_per_sec, drift;
413 #else
414 unsigned long status, ticks_per_sec, drift;
415 #endif
416 u32 version = sn_sal_rev();
417 #ifndef XEN
418 extern void sn_cpu_init(void);
420 sn2_rtc_initial = rtc_time();
421 ia64_sn_plat_set_error_handling_features(); // obsolete
422 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV);
423 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES);
426 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
427 /*
428 * Handle SN vga console.
429 *
430 * SN systems do not have enough ACPI table information
431 * being passed from prom to identify VGA adapters and the legacy
432 * addresses to access them. Until that is done, SN systems rely
433 * on the PCDP table to identify the primary VGA console if one
434 * exists.
435 *
436 * However, kernel PCDP support is optional, and even if it is built
437 * into the kernel, it will not be used if the boot cmdline contains
438 * console= directives.
439 *
440 * So, to work around this mess, we duplicate some of the PCDP code
441 * here so that the primary VGA console (as defined by PCDP) will
442 * work on SN systems even if a different console (e.g. serial) is
443 * selected on the boot line (or CONFIG_EFI_PCDP is off).
444 */
446 if (! vga_console_membase)
447 sn_scan_pcdp();
449 if (vga_console_membase) {
450 /* usable vga ... make tty0 the preferred default console */
451 if (!strstr(*cmdline_p, "console="))
452 add_preferred_console("tty", 0, NULL);
453 } else {
454 printk(KERN_DEBUG "SGI: Disabling VGA console\n");
455 if (!strstr(*cmdline_p, "console="))
456 add_preferred_console("ttySG", 0, NULL);
457 #ifdef CONFIG_DUMMY_CONSOLE
458 conswitchp = &dummy_con;
459 #else
460 conswitchp = NULL;
461 #endif /* CONFIG_DUMMY_CONSOLE */
462 }
463 #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
465 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
466 #endif
468 /*
469 * Build the tables for managing cnodes.
470 */
471 build_cnode_tables();
473 status =
474 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
475 &drift);
476 if (status != 0 || ticks_per_sec < 100000) {
477 printk(KERN_WARNING
478 "unable to determine platform RTC clock frequency, guessing.\n");
479 /* PROM gives wrong value for clock freq. so guess */
480 sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
481 } else
482 sn_rtc_cycles_per_second = ticks_per_sec;
483 #ifndef XEN
485 platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
487 ia64_printk_clock = ia64_sn2_printk_clock;
488 #endif
490 printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
492 /*
493 * we set the default root device to /dev/hda
494 * to make simulation easy
495 */
496 #ifndef XEN
497 ROOT_DEV = Root_HDA1;
498 #endif
500 /*
501 * Create the PDAs and NODEPDAs for all the cpus.
502 */
503 sn_init_pdas(cmdline_p);
505 #ifndef XEN
506 ia64_mark_idle = &snidle;
507 #endif
509 /*
510 * For the bootcpu, we do this here. All other cpus will make the
511 * call as part of cpu_init in slave cpu initialization.
512 */
513 sn_cpu_init();
515 #ifndef XEN
516 #ifdef CONFIG_SMP
517 init_smp_config();
518 #endif
519 screen_info = sn_screen_info;
521 sn_timer_init();
523 /*
524 * set pm_power_off to a SAL call to allow
525 * sn machines to power off. The SAL call can be replaced
526 * by an ACPI interface call when ACPI is fully implemented
527 * for sn.
528 */
529 pm_power_off = ia64_sn_power_down;
530 current->thread.flags |= IA64_THREAD_MIGRATION;
531 #endif
532 }
534 /**
535 * sn_init_pdas - setup node data areas
536 *
537 * One time setup for Node Data Area. Called by sn_setup().
538 */
539 static void __init sn_init_pdas(char **cmdline_p)
540 {
541 cnodeid_t cnode;
543 /*
544 * Allocate & initalize the nodepda for each node.
545 */
546 for_each_online_node(cnode) {
547 nodepdaindr[cnode] =
548 alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
549 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
550 memset(nodepdaindr[cnode]->phys_cpuid, -1,
551 sizeof(nodepdaindr[cnode]->phys_cpuid));
552 spin_lock_init(&nodepdaindr[cnode]->ptc_lock);
553 }
555 /*
556 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
557 */
558 for (cnode = num_online_nodes(); cnode < num_cnodes; cnode++) {
559 nodepdaindr[cnode] =
560 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
561 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
562 }
564 /*
565 * Now copy the array of nodepda pointers to each nodepda.
566 */
567 for (cnode = 0; cnode < num_cnodes; cnode++)
568 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
569 sizeof(nodepdaindr));
571 #ifndef XEN
572 /*
573 * Set up IO related platform-dependent nodepda fields.
574 * The following routine actually sets up the hubinfo struct
575 * in nodepda.
576 */
577 for_each_online_node(cnode) {
578 bte_init_node(nodepdaindr[cnode], cnode);
579 }
581 /*
582 * Initialize the per node hubdev. This includes IO Nodes and
583 * headless/memless nodes.
584 */
585 for (cnode = 0; cnode < num_cnodes; cnode++) {
586 hubdev_init_node(nodepdaindr[cnode], cnode);
587 }
588 #endif
589 }
591 /**
592 * sn_cpu_init - initialize per-cpu data areas
593 * @cpuid: cpuid of the caller
594 *
595 * Called during cpu initialization on each cpu as it starts.
596 * Currently, initializes the per-cpu data area for SNIA.
597 * Also sets up a few fields in the nodepda. Also known as
598 * platform_cpu_init() by the ia64 machvec code.
599 */
600 void __cpuinit sn_cpu_init(void)
601 {
602 int cpuid;
603 int cpuphyid;
604 int nasid;
605 int subnode;
606 int slice;
607 int cnode;
608 int i;
609 static int wars_have_been_checked;
611 cpuid = smp_processor_id();
612 #ifndef XEN
613 if (cpuid == 0 && IS_MEDUSA()) {
614 if (ia64_sn_is_fake_prom())
615 sn_prom_type = 2;
616 else
617 sn_prom_type = 1;
618 printk(KERN_INFO "Running on medusa with %s PROM\n",
619 (sn_prom_type == 1) ? "real" : "fake");
620 }
621 #endif
623 memset(pda, 0, sizeof(pda));
624 if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2,
625 &sn_hub_info->nasid_bitmask,
626 &sn_hub_info->nasid_shift,
627 &sn_system_size, &sn_sharing_domain_size,
628 &sn_partition_id, &sn_coherency_id,
629 &sn_region_size))
630 BUG();
631 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
633 /*
634 * Don't check status. The SAL call is not supported on all PROMs
635 * but a failure is harmless.
636 */
637 (void) ia64_sn_set_cpu_number(cpuid);
639 /*
640 * The boot cpu makes this call again after platform initialization is
641 * complete.
642 */
643 if (nodepdaindr[0] == NULL)
644 return;
646 for (i = 0; i < MAX_PROM_FEATURE_SETS; i++)
647 if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0)
648 break;
650 cpuphyid = get_sapicid();
652 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
653 BUG();
655 for (i=0; i < MAX_NUMNODES; i++) {
656 if (nodepdaindr[i]) {
657 nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
658 nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
659 nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
660 }
661 }
663 cnode = nasid_to_cnodeid(nasid);
665 sn_nodepda = nodepdaindr[cnode];
667 pda->led_address =
668 (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
669 pda->led_state = LED_ALWAYS_SET;
670 pda->hb_count = HZ / 2;
671 pda->hb_state = 0;
672 pda->idle_flag = 0;
674 if (cpuid != 0) {
675 /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
676 memcpy(sn_cnodeid_to_nasid,
677 (&per_cpu(__sn_cnodeid_to_nasid, 0)),
678 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
679 }
681 /*
682 * Check for WARs.
683 * Only needs to be done once, on BSP.
684 * Has to be done after loop above, because it uses this cpu's
685 * sn_cnodeid_to_nasid table which was just initialized if this
686 * isn't cpu 0.
687 * Has to be done before assignment below.
688 */
689 if (!wars_have_been_checked) {
690 sn_check_for_wars();
691 wars_have_been_checked = 1;
692 }
693 sn_hub_info->shub_1_1_found = shub_1_1_found;
695 /*
696 * Set up addresses of PIO/MEM write status registers.
697 */
698 {
699 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
700 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2,
701 SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3};
702 u64 *pio;
703 pio = is_shub1() ? pio1 : pio2;
704 pda->pio_write_status_addr =
705 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid, pio[slice]);
706 pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
707 }
709 #ifndef XEN /* local_node_data is not allocated .... yet */
710 /*
711 * WAR addresses for SHUB 1.x.
712 */
713 if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
714 int buddy_nasid;
715 buddy_nasid =
716 cnodeid_to_nasid(numa_node_id() ==
717 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
718 pda->pio_shub_war_cam_addr =
719 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
720 SH1_PI_CAM_CONTROL);
721 }
722 #endif
723 }
725 /*
726 * Build tables for converting between NASIDs and cnodes.
727 */
728 static inline int __init board_needs_cnode(int type)
729 {
730 return (type == KLTYPE_SNIA || type == KLTYPE_TIO);
731 }
733 void __init build_cnode_tables(void)
734 {
735 int nasid;
736 int node;
737 lboard_t *brd;
739 memset(physical_node_map, -1, sizeof(physical_node_map));
740 memset(sn_cnodeid_to_nasid, -1,
741 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
743 /*
744 * First populate the tables with C/M bricks. This ensures that
745 * cnode == node for all C & M bricks.
746 */
747 for_each_online_node(node) {
748 nasid = pxm_to_nasid(node_to_pxm(node));
749 sn_cnodeid_to_nasid[node] = nasid;
750 physical_node_map[nasid] = node;
751 }
753 /*
754 * num_cnodes is total number of C/M/TIO bricks. Because of the 256 node
755 * limit on the number of nodes, we can't use the generic node numbers
756 * for this. Note that num_cnodes is incremented below as TIOs or
757 * headless/memoryless nodes are discovered.
758 */
759 num_cnodes = num_online_nodes();
761 /* fakeprom does not support klgraph */
762 if (IS_RUNNING_ON_FAKE_PROM())
763 return;
765 /* Find TIOs & headless/memoryless nodes and add them to the tables */
766 for_each_online_node(node) {
767 kl_config_hdr_t *klgraph_header;
768 nasid = cnodeid_to_nasid(node);
769 klgraph_header = ia64_sn_get_klconfig_addr(nasid);
770 if (klgraph_header == NULL)
771 BUG();
772 brd = NODE_OFFSET_TO_LBOARD(nasid, klgraph_header->ch_board_info);
773 while (brd) {
774 if (board_needs_cnode(brd->brd_type) && physical_node_map[brd->brd_nasid] < 0) {
775 sn_cnodeid_to_nasid[num_cnodes] = brd->brd_nasid;
776 physical_node_map[brd->brd_nasid] = num_cnodes++;
777 }
778 brd = find_lboard_next(brd);
779 }
780 }
781 }
783 int
784 nasid_slice_to_cpuid(int nasid, int slice)
785 {
786 long cpu;
788 for (cpu = 0; cpu < NR_CPUS; cpu++)
789 if (cpuid_to_nasid(cpu) == nasid &&
790 cpuid_to_slice(cpu) == slice)
791 return cpu;
793 return -1;
794 }
796 int sn_prom_feature_available(int id)
797 {
798 if (id >= BITS_PER_LONG * MAX_PROM_FEATURE_SETS)
799 return 0;
800 return test_bit(id, sn_prom_features);
801 }
802 EXPORT_SYMBOL(sn_prom_feature_available);