debuggers.hg

view xen/include/asm-x86/config.h @ 3726:88957a238191

bitkeeper revision 1.1159.1.544 (4207248crq3YxiyLWjUehtHv_Yd3tg)

Merge tempest.cl.cam.ac.uk:/auto/groups/xeno-xenod/BK/xeno.bk
into tempest.cl.cam.ac.uk:/local/scratch/smh22/xen-unstable.bk
author smh22@tempest.cl.cam.ac.uk
date Mon Feb 07 08:19:24 2005 +0000 (2005-02-07)
parents bbe8541361dd 253e8e10e986
children f5f2757b3aa2
line source
1 /******************************************************************************
2 * config.h
3 *
4 * A Linux-style configuration list.
5 */
7 #ifndef __X86_CONFIG_H__
8 #define __X86_CONFIG_H__
10 #ifdef __i386__
11 #define CONFIG_VMX 1
12 #endif
14 #define CONFIG_X86 1
16 #define CONFIG_SMP 1
17 #define CONFIG_X86_LOCAL_APIC 1
18 #define CONFIG_X86_GOOD_APIC 1
19 #define CONFIG_X86_IO_APIC 1
20 #define CONFIG_X86_L1_CACHE_SHIFT 5
22 #define CONFIG_ACPI 1
23 #define CONFIG_ACPI_BOOT 1
25 #define CONFIG_PCI 1
26 #define CONFIG_PCI_DIRECT 1
27 #if defined(__i386__)
28 #define CONFIG_PCI_BIOS 1
29 #endif
31 #define CONFIG_IDE 1
32 #define CONFIG_BLK_DEV_IDE 1
33 #define CONFIG_BLK_DEV_IDEDMA 1
34 #define CONFIG_BLK_DEV_IDEPCI 1
35 #define CONFIG_IDEDISK_MULTI_MODE 1
36 #define CONFIG_IDEDISK_STROKE 1
37 #define CONFIG_IDEPCI_SHARE_IRQ 1
38 #define CONFIG_BLK_DEV_IDEDMA_PCI 1
39 #define CONFIG_IDEDMA_PCI_AUTO 1
40 #define CONFIG_IDEDMA_AUTO 1
41 #define CONFIG_IDEDMA_ONLYDISK 1
42 #define CONFIG_BLK_DEV_IDE_MODES 1
43 #define CONFIG_BLK_DEV_PIIX 1
45 #define CONFIG_SCSI 1
46 #define CONFIG_SCSI_LOGGING 1
47 #define CONFIG_BLK_DEV_SD 1
48 #define CONFIG_SD_EXTRA_DEVS 40
49 #define CONFIG_SCSI_MULTI_LUN 1
51 #define CONFIG_XEN_ATTENTION_KEY 1
53 #define HZ 100
55 #define OPT_CONSOLE_STR "com1,vga"
57 /*
58 * Just to keep compiler happy.
59 * NB. DO NOT CHANGE SMP_CACHE_BYTES WITHOUT FIXING arch/i386/entry.S!!!
60 * It depends on size of irq_cpustat_t, for example, being 64 bytes. :-)
61 */
62 #define SMP_CACHE_BYTES 64
63 #define NR_CPUS 16
65 /* Linkage for x86 */
66 #define __ALIGN .align 16,0x90
67 #define __ALIGN_STR ".align 16,0x90"
68 #define SYMBOL_NAME_STR(X) #X
69 #define SYMBOL_NAME(X) X
70 #define SYMBOL_NAME_LABEL(X) X##:
71 #ifdef __ASSEMBLY__
72 #define ALIGN __ALIGN
73 #define ALIGN_STR __ALIGN_STR
74 #define ENTRY(name) \
75 .globl SYMBOL_NAME(name); \
76 ALIGN; \
77 SYMBOL_NAME_LABEL(name)
78 #endif
80 #define barrier() __asm__ __volatile__("": : :"memory")
82 #define NR_hypercalls 32
84 #ifndef NDEBUG
85 #define MEMORY_GUARD
86 #ifdef __x86_64__
87 #define STACK_ORDER 2
88 #endif
89 #endif
91 #ifndef STACK_ORDER
92 #define STACK_ORDER 1
93 #endif
94 #define STACK_SIZE (PAGE_SIZE << STACK_ORDER)
96 #ifndef __ASSEMBLY__
97 extern unsigned long _end; /* standard ELF symbol */
98 extern void __out_of_line_bug(int line) __attribute__((noreturn));
99 #define out_of_line_bug() __out_of_line_bug(__LINE__)
100 #endif /* __ASSEMBLY__ */
102 #define BUG() do { \
103 printk("BUG at %s:%d\n", __FILE__, __LINE__); \
104 __asm__ __volatile__("ud2"); \
105 } while (0)
107 #if defined(__x86_64__)
109 #define asmlinkage
111 #define XENHEAP_DEFAULT_MB (16)
113 #define PML4_ENTRY_BITS 39
114 #define PML4_ENTRY_BYTES (1UL << PML4_ENTRY_BITS)
115 #define PML4_ADDR(_slot) \
116 ((((_slot ## UL) >> 8) * 0xffff000000000000UL) | \
117 (_slot ## UL << PML4_ENTRY_BITS))
119 /*
120 * Memory layout:
121 * 0x0000000000000000 - 0x00007fffffffffff [128TB, 2^47 bytes, PML4:0-255]
122 * Guest-defined use.
123 * 0x0000800000000000 - 0xffff7fffffffffff [16EB]
124 * Inaccessible: current arch only supports 48-bit sign-extended VAs.
125 * 0xffff800000000000 - 0xffff803fffffffff [256GB, 2^38 bytes, PML4:256]
126 * Read-only machine-to-phys translation table (GUEST ACCESSIBLE).
127 * 0xffff804000000000 - 0xffff807fffffffff [256GB, 2^38 bytes, PML4:256]
128 * Reserved for future shared info with the guest OS (GUEST ACCESSIBLE).
129 * 0xffff808000000000 - 0xffff80ffffffffff [512GB, 2^39 bytes, PML4:257]
130 * Read-only guest linear page table (GUEST ACCESSIBLE).
131 * 0xffff810000000000 - 0xffff817fffffffff [512GB, 2^39 bytes, PML4:258]
132 * Guest linear page table.
133 * 0xffff818000000000 - 0xffff81ffffffffff [512GB, 2^39 bytes, PML4:259]
134 * Shadow linear page table.
135 * 0xffff820000000000 - 0xffff827fffffffff [512GB, 2^39 bytes, PML4:260]
136 * Per-domain mappings (e.g., GDT, LDT).
137 * 0xffff828000000000 - 0xffff8283ffffffff [16GB, 2^34 bytes, PML4:261]
138 * Machine-to-phys translation table.
139 * 0xffff828400000000 - 0xffff8287ffffffff [16GB, 2^34 bytes, PML4:261]
140 * Page-frame information array.
141 * 0xffff828800000000 - 0xffff828bffffffff [16GB, 2^34 bytes, PML4:261]
142 * ioremap()/fixmap area.
143 * 0xffff828c00000000 - 0xffff82ffffffffff [464GB, PML4:261]
144 * Reserved for future use.
145 * 0xffff830000000000 - 0xffff83ffffffffff [1TB, 2^40 bytes, PML4:262-263]
146 * 1:1 direct mapping of all physical memory. Xen and its heap live here.
147 * 0xffff840000000000 - 0xffff87ffffffffff [4TB, 2^42 bytes, PML4:264-271]
148 * Reserved for future use.
149 * 0xffff880000000000 - 0xffffffffffffffff [120TB, PML4:272-511]
150 * Guest-defined use.
151 */
154 /* Hypervisor reserves PML4 slots 256 to 271 inclusive. */
155 #define HYPERVISOR_VIRT_START (PML4_ADDR(256))
156 #define HYPERVISOR_VIRT_END (HYPERVISOR_VIRT_START + PML4_ENTRY_BYTES*16)
157 /* Slot 256: read-only guest-accessible machine-to-phys translation table. */
158 #define RO_MPT_VIRT_START (PML4_ADDR(256))
159 #define RO_MPT_VIRT_END (RO_MPT_VIRT_START + PML4_ENTRY_BYTES/2)
160 /* Slot 257: read-only guest-accessible linear page table. */
161 #define RO_LINEAR_PT_VIRT_START (PML4_ADDR(257))
162 #define RO_LINEAR_PT_VIRT_END (RO_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
163 /* Slot 258: linear page table (guest table). */
164 #define LINEAR_PT_VIRT_START (PML4_ADDR(258))
165 #define LINEAR_PT_VIRT_END (LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
166 /* Slot 259: linear page table (shadow table). */
167 #define SH_LINEAR_PT_VIRT_START (PML4_ADDR(259))
168 #define SH_LINEAR_PT_VIRT_END (SH_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
169 /* Slot 260: per-domain mappings. */
170 #define PERDOMAIN_VIRT_START (PML4_ADDR(260))
171 #define PERDOMAIN_VIRT_END (PERDOMAIN_VIRT_START + PML4_ENTRY_BYTES)
172 /* Slot 261: machine-to-phys conversion table (16GB). */
173 #define RDWR_MPT_VIRT_START (PML4_ADDR(261))
174 #define RDWR_MPT_VIRT_END (RDWR_MPT_VIRT_START + (16UL<<30))
175 /* Slot 261: page-frame information array (16GB). */
176 #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
177 #define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + (16UL<<30))
178 /* Slot 261: ioremap()/fixmap area (16GB). */
179 #define IOREMAP_VIRT_START (FRAMETABLE_VIRT_END)
180 #define IOREMAP_VIRT_END (IOREMAP_VIRT_START + (16UL<<30))
181 /* Slot 262-263: A direct 1:1 mapping of all of physical memory. */
182 #define DIRECTMAP_VIRT_START (PML4_ADDR(262))
183 #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + PML4_ENTRY_BYTES*2)
185 #define PGT_base_page_table PGT_l4_page_table
187 #define __HYPERVISOR_CS64 0x0810
188 #define __HYPERVISOR_CS32 0x0808
189 #define __HYPERVISOR_CS __HYPERVISOR_CS64
190 #define __HYPERVISOR_DS64 0x0000
191 #define __HYPERVISOR_DS32 0x0818
192 #define __HYPERVISOR_DS __HYPERVISOR_DS64
194 /* For generic assembly code: use macros to define operation/operand sizes. */
195 #define __OS "q" /* Operation Suffix */
196 #define __OP "r" /* Operand Prefix */
198 #elif defined(__i386__)
200 #define asmlinkage __attribute__((regparm(0)))
202 #define XENHEAP_DEFAULT_MB (12)
203 #define DIRECTMAP_PHYS_END (12*1024*1024)
205 /* Hypervisor owns top 64MB of virtual address space. */
206 #define __HYPERVISOR_VIRT_START 0xFC000000
207 #define HYPERVISOR_VIRT_START (0xFC000000UL)
209 /*
210 * First 4MB are mapped read-only for all. It's for the machine->physical
211 * mapping table (MPT table). The following are virtual addresses.
212 */
213 #define RO_MPT_VIRT_START (HYPERVISOR_VIRT_START)
214 #define RO_MPT_VIRT_END (RO_MPT_VIRT_START + (4*1024*1024))
215 /* Xen heap extends to end of 1:1 direct-mapped memory region. */
216 #define DIRECTMAP_VIRT_START (RO_MPT_VIRT_END)
217 #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + DIRECTMAP_PHYS_END)
218 /* Machine-to-phys conversion table. */
219 #define RDWR_MPT_VIRT_START (DIRECTMAP_VIRT_END)
220 #define RDWR_MPT_VIRT_END (RDWR_MPT_VIRT_START + (4*1024*1024))
221 /* Variable-length page-frame information array. */
222 #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
223 #define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + (24*1024*1024))
224 /* Next 4MB of virtual address space is used as a linear p.t. mapping. */
225 #define LINEAR_PT_VIRT_START (FRAMETABLE_VIRT_END)
226 #define LINEAR_PT_VIRT_END (LINEAR_PT_VIRT_START + (4*1024*1024))
227 /* Next 4MB of virtual address space is used as a shadow linear p.t. map. */
228 #define SH_LINEAR_PT_VIRT_START (LINEAR_PT_VIRT_END)
229 #define SH_LINEAR_PT_VIRT_END (SH_LINEAR_PT_VIRT_START + (4*1024*1024))
230 /* Next 4MB of virtual address space used for per-domain mappings (eg. GDT). */
231 #define PERDOMAIN_VIRT_START (SH_LINEAR_PT_VIRT_END)
232 #define PERDOMAIN_VIRT_END (PERDOMAIN_VIRT_START + (4*1024*1024))
233 /* Penultimate 4MB of virtual address space used for domain page mappings. */
234 #define MAPCACHE_VIRT_START (PERDOMAIN_VIRT_END)
235 #define MAPCACHE_VIRT_END (MAPCACHE_VIRT_START + (4*1024*1024))
236 /* Final 4MB of virtual address space used for ioremap(). */
237 #define IOREMAP_VIRT_START (MAPCACHE_VIRT_END)
238 #define IOREMAP_VIRT_END (IOREMAP_VIRT_START + (4*1024*1024))
240 #define PGT_base_page_table PGT_l2_page_table
242 #define __HYPERVISOR_CS 0x0808
243 #define __HYPERVISOR_DS 0x0810
245 /* For generic assembly code: use macros to define operation/operand sizes. */
246 #define __OS "l" /* Operation Suffix */
247 #define __OP "e" /* Operand Prefix */
249 #endif /* __i386__ */
251 #ifndef __ASSEMBLY__
252 extern unsigned long xenheap_phys_end; /* user-configurable */
253 #endif
255 #define GDT_VIRT_START(ed) (PERDOMAIN_VIRT_START + ((ed)->eid << PDPT_VCPU_VA_SHIFT))
256 #define GDT_VIRT_END(ed) (GDT_VIRT_START(ed) + (64*1024))
257 #define LDT_VIRT_START(ed) (PERDOMAIN_VIRT_START + (64*1024) + ((ed)->eid << PDPT_VCPU_VA_SHIFT))
258 #define LDT_VIRT_END(ed) (LDT_VIRT_START(ed) + (64*1024))
260 #define PDPT_VCPU_SHIFT 5
261 #define PDPT_VCPU_VA_SHIFT (PDPT_VCPU_SHIFT + PAGE_SHIFT)
263 #if defined(__x86_64__)
264 #define ELFSIZE 64
265 #else
266 #define ELFSIZE 32
267 #endif
269 #endif /* __X86_CONFIG_H__ */