debuggers.hg

view xen/include/asm-x86/desc.h @ 3640:9a9c5a491401

bitkeeper revision 1.1159.235.1 (42000d3dwcPyT8aY4VIPYGCfCAJuQQ)

More x86/64. Status: traps.c now included in the build, but actual building
of IDT doesn't happen, and we need some sort of entry.S. More page-table
building required so that arch_init_memory() can work. And there is something
odd with MP-table parsing; I currently suspect that __init sections are
causing problems.
Signed-off-by: keir.fraser@cl.cam.ac.uk
author kaf24@viper.(none)
date Tue Feb 01 23:14:05 2005 +0000 (2005-02-01)
parents ed902e5c4b49
children e6af5d8f8b39
line source
1 #ifndef __ARCH_DESC_H
2 #define __ARCH_DESC_H
3 #ifndef __ASSEMBLY__
5 #define LDT_ENTRY_SIZE 8
7 #define __DOUBLEFAULT_TSS_ENTRY FIRST_RESERVED_GDT_ENTRY
9 #define __FIRST_TSS_ENTRY (FIRST_RESERVED_GDT_ENTRY + 8)
10 #define __FIRST_LDT_ENTRY (__FIRST_TSS_ENTRY + 1)
12 #define __TSS(n) (((n)<<1) + __FIRST_TSS_ENTRY)
13 #define __LDT(n) (((n)<<1) + __FIRST_LDT_ENTRY)
15 #define load_TR(n) __asm__ __volatile__ ("ltr %%ax" : : "a" (__TSS(n)<<3) )
17 /*
18 * Guest OS must provide its own code selectors, or use the one we provide. The
19 * RPL must be 1, as we only create bounce frames to ring 1. Any LDT selector
20 * value is okay. Note that checking only the RPL is insufficient: if the
21 * selector is poked into an interrupt, trap or call gate then the RPL is
22 * ignored when the gate is accessed.
23 */
24 #define VALID_SEL(_s) \
25 (((((_s)>>3) < FIRST_RESERVED_GDT_ENTRY) || \
26 (((_s)>>3) > LAST_RESERVED_GDT_ENTRY) || \
27 ((_s)&4)) && \
28 (((_s)&3) == 1))
30 /* These are bitmasks for the high 32 bits of a descriptor table entry. */
31 #define _SEGMENT_TYPE (15<< 8)
32 #define _SEGMENT_EC ( 1<<10) /* Expand-down or Conforming segment */
33 #define _SEGMENT_CODE ( 1<<11) /* Code (vs data) segment for non-system
34 segments */
35 #define _SEGMENT_S ( 1<<12) /* System descriptor (yes iff S==0) */
36 #define _SEGMENT_DPL ( 3<<13) /* Descriptor Privilege Level */
37 #define _SEGMENT_P ( 1<<15) /* Segment Present */
38 #define _SEGMENT_DB ( 1<<22) /* 16- or 32-bit segment */
39 #define _SEGMENT_G ( 1<<23) /* Granularity */
41 struct desc_struct {
42 u32 a, b;
43 };
45 #if defined(__x86_64__)
47 #define VALID_CODESEL(_s) ((_s) == FLAT_RING3_CS64 || VALID_SEL(_s))
49 typedef struct {
50 u64 a, b;
51 } idt_entry_t;
53 #define _set_gate(gate_addr,type,dpl,addr) ((void)0)
54 #define _set_tssldt_desc(n,addr,limit,type) ((void)0)
56 #elif defined(__i386__)
58 #define VALID_CODESEL(_s) ((_s) == FLAT_RING1_CS || VALID_SEL(_s))
60 typedef struct desc_struct idt_entry_t;
62 #define _set_gate(gate_addr,type,dpl,addr) \
63 do { \
64 int __d0, __d1; \
65 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
66 "movw %4,%%dx\n\t" \
67 "movl %%eax,%0\n\t" \
68 "movl %%edx,%1" \
69 :"=m" (*((long *) (gate_addr))), \
70 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
71 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
72 "3" ((char *) (addr)),"2" (__HYPERVISOR_CS << 16)); \
73 } while (0)
75 #define _set_tssldt_desc(n,addr,limit,type) \
76 __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
77 "movw %%ax,2(%2)\n\t" \
78 "rorl $16,%%eax\n\t" \
79 "movb %%al,4(%2)\n\t" \
80 "movb %4,5(%2)\n\t" \
81 "movb $0,6(%2)\n\t" \
82 "movb %%ah,7(%2)\n\t" \
83 "rorl $16,%%eax" \
84 : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type))
86 #endif
88 extern struct desc_struct gdt_table[];
89 extern struct desc_struct *gdt;
90 extern idt_entry_t *idt;
92 struct Xgt_desc_struct {
93 unsigned short size;
94 unsigned long address __attribute__((packed));
95 };
97 #define idt_descr (*(struct Xgt_desc_struct *)((char *)&idt - 2))
98 #define gdt_descr (*(struct Xgt_desc_struct *)((char *)&gdt - 2))
100 extern void set_intr_gate(unsigned int irq, void * addr);
101 extern void set_system_gate(unsigned int n, void *addr);
102 extern void set_task_gate(unsigned int n, unsigned int sel);
103 extern void set_tss_desc(unsigned int n, void *addr);
105 #endif /* !__ASSEMBLY__ */
106 #endif /* __ARCH_DESC_H */