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view linux-2.6.10-rc2-xen-sparse/include/asm-xen/asm-i386/io.h @ 3289:a169836882cb

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sync w/ head.
author cl349@arcadians.cl.cam.ac.uk
date Mon Dec 06 20:37:17 2004 +0000 (2004-12-06)
parents f65b65977b19
children
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
5 #include <linux/string.h>
6 #include <linux/compiler.h>
8 /*
9 * This file contains the definitions for the x86 IO instructions
10 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
11 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
12 * versions of the single-IO instructions (inb_p/inw_p/..).
13 *
14 * This file is not meant to be obfuscating: it's just complicated
15 * to (a) handle it all in a way that makes gcc able to optimize it
16 * as well as possible and (b) trying to avoid writing the same thing
17 * over and over again with slight variations and possibly making a
18 * mistake somewhere.
19 */
21 /*
22 * Thanks to James van Artsdalen for a better timing-fix than
23 * the two short jumps: using outb's to a nonexistent port seems
24 * to guarantee better timings even on fast machines.
25 *
26 * On the other hand, I'd like to be sure of a non-existent port:
27 * I feel a bit unsafe about using 0x80 (should be safe, though)
28 *
29 * Linus
30 */
32 /*
33 * Bit simplified and optimized by Jan Hubicka
34 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 *
36 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
37 * isa_read[wl] and isa_write[wl] fixed
38 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
39 */
41 #define IO_SPACE_LIMIT 0xffff
43 #define XQUAD_PORTIO_BASE 0xfe400000
44 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
46 #ifdef __KERNEL__
48 #include <asm-generic/iomap.h>
50 #include <linux/vmalloc.h>
51 #include <asm/fixmap.h>
53 /**
54 * virt_to_phys - map virtual addresses to physical
55 * @address: address to remap
56 *
57 * The returned physical address is the physical (CPU) mapping for
58 * the memory address given. It is only valid to use this function on
59 * addresses directly mapped or allocated via kmalloc.
60 *
61 * This function does not give bus mappings for DMA transfers. In
62 * almost all conceivable cases a device driver should not be using
63 * this function
64 */
66 static inline unsigned long virt_to_phys(volatile void * address)
67 {
68 return __pa(address);
69 }
71 /**
72 * phys_to_virt - map physical address to virtual
73 * @address: address to remap
74 *
75 * The returned virtual address is a current CPU mapping for
76 * the memory address given. It is only valid to use this function on
77 * addresses that have a kernel mapping
78 *
79 * This function does not handle bus mappings for DMA transfers. In
80 * almost all conceivable cases a device driver should not be using
81 * this function
82 */
84 static inline void * phys_to_virt(unsigned long address)
85 {
86 return __va(address);
87 }
89 /*
90 * Change "struct page" to physical address.
91 */
92 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
93 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
95 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
96 (unsigned long) bio_offset((bio)))
97 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
98 (unsigned long) (bv)->bv_offset)
100 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
101 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
102 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
103 bvec_to_pseudophys((vec2))))
105 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
107 /**
108 * ioremap - map bus memory into CPU space
109 * @offset: bus address of the memory
110 * @size: size of the resource to map
111 *
112 * ioremap performs a platform specific sequence of operations to
113 * make bus memory CPU accessible via the readb/readw/readl/writeb/
114 * writew/writel functions and the other mmio helpers. The returned
115 * address is not guaranteed to be usable directly as a virtual
116 * address.
117 */
119 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
120 {
121 return __ioremap(offset, size, 0);
122 }
124 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
125 extern void iounmap(volatile void __iomem *addr);
127 /*
128 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
129 * mappings, before the real ioremap() is functional.
130 * A boot-time mapping is currently limited to at most 16 pages.
131 */
132 extern void *bt_ioremap(unsigned long offset, unsigned long size);
133 extern void bt_iounmap(void *addr, unsigned long size);
135 /*
136 * ISA I/O bus memory addresses are 1:1 with the physical address.
137 */
138 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
139 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
140 #ifdef CONFIG_XEN_PHYSDEV_ACCESS
141 #define isa_bus_to_virt(_x) (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + (_x))
142 #else
143 #define isa_bus_to_virt(_x) isa_bus_to_virt_needs_PRIVILEGED_BUILD
144 #endif
146 /*
147 * However PCI ones are not necessarily 1:1 and therefore these interfaces
148 * are forbidden in portable PCI drivers.
149 *
150 * Allow them on x86 for legacy drivers, though.
151 */
152 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
153 #define bus_to_virt(_x) __va(machine_to_phys(_x))
155 /*
156 * readX/writeX() are used to access memory mapped devices. On some
157 * architectures the memory mapped IO stuff needs to be accessed
158 * differently. On the x86 architecture, we just read/write the
159 * memory location directly.
160 */
162 static inline unsigned char readb(const volatile void __iomem *addr)
163 {
164 return *(volatile unsigned char __force *) addr;
165 }
166 static inline unsigned short readw(const volatile void __iomem *addr)
167 {
168 return *(volatile unsigned short __force *) addr;
169 }
170 static inline unsigned int readl(const volatile void __iomem *addr)
171 {
172 return *(volatile unsigned int __force *) addr;
173 }
174 #define readb_relaxed(addr) readb(addr)
175 #define readw_relaxed(addr) readw(addr)
176 #define readl_relaxed(addr) readl(addr)
177 #define __raw_readb readb
178 #define __raw_readw readw
179 #define __raw_readl readl
181 static inline void writeb(unsigned char b, volatile void __iomem *addr)
182 {
183 *(volatile unsigned char __force *) addr = b;
184 }
185 static inline void writew(unsigned short b, volatile void __iomem *addr)
186 {
187 *(volatile unsigned short __force *) addr = b;
188 }
189 static inline void writel(unsigned int b, volatile void __iomem *addr)
190 {
191 *(volatile unsigned int __force *) addr = b;
192 }
193 #define __raw_writeb writeb
194 #define __raw_writew writew
195 #define __raw_writel writel
197 #define mmiowb()
199 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
200 {
201 memset((void __force *) addr, val, count);
202 }
203 static inline void memcpy_fromio(void *dst, volatile void __iomem *src, int count)
204 {
205 __memcpy(dst, (void __force *) src, count);
206 }
207 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
208 {
209 __memcpy((void __force *) dst, src, count);
210 }
212 /*
213 * ISA space is 'always mapped' on a typical x86 system, no need to
214 * explicitly ioremap() it. The fact that the ISA IO space is mapped
215 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
216 * are physical addresses. The following constant pointer can be
217 * used as the IO-area pointer (it can be iounmapped as well, so the
218 * analogy with PCI is quite large):
219 */
220 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
222 #define isa_readb(a) readb(__ISA_IO_base + (a))
223 #define isa_readw(a) readw(__ISA_IO_base + (a))
224 #define isa_readl(a) readl(__ISA_IO_base + (a))
225 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
226 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
227 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
228 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
229 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
230 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
233 /*
234 * Again, i386 does not require mem IO specific function.
235 */
237 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
238 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d))
240 /**
241 * check_signature - find BIOS signatures
242 * @io_addr: mmio address to check
243 * @signature: signature block
244 * @length: length of signature
245 *
246 * Perform a signature comparison with the mmio address io_addr. This
247 * address should have been obtained by ioremap.
248 * Returns 1 on a match.
249 */
251 static inline int check_signature(volatile void __iomem * io_addr,
252 const unsigned char *signature, int length)
253 {
254 int retval = 0;
255 do {
256 if (readb(io_addr) != *signature)
257 goto out;
258 io_addr++;
259 signature++;
260 length--;
261 } while (length);
262 retval = 1;
263 out:
264 return retval;
265 }
267 /**
268 * isa_check_signature - find BIOS signatures
269 * @io_addr: mmio address to check
270 * @signature: signature block
271 * @length: length of signature
272 *
273 * Perform a signature comparison with the ISA mmio address io_addr.
274 * Returns 1 on a match.
275 *
276 * This function is deprecated. New drivers should use ioremap and
277 * check_signature.
278 */
281 static inline int isa_check_signature(unsigned long io_addr,
282 const unsigned char *signature, int length)
283 {
284 int retval = 0;
285 do {
286 if (isa_readb(io_addr) != *signature)
287 goto out;
288 io_addr++;
289 signature++;
290 length--;
291 } while (length);
292 retval = 1;
293 out:
294 return retval;
295 }
297 /*
298 * Cache management
299 *
300 * This needed for two cases
301 * 1. Out of order aware processors
302 * 2. Accidentally out of order processors (PPro errata #51)
303 */
305 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
307 static inline void flush_write_buffers(void)
308 {
309 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
310 }
312 #define dma_cache_inv(_start,_size) flush_write_buffers()
313 #define dma_cache_wback(_start,_size) flush_write_buffers()
314 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
316 #else
318 /* Nothing to do */
320 #define dma_cache_inv(_start,_size) do { } while (0)
321 #define dma_cache_wback(_start,_size) do { } while (0)
322 #define dma_cache_wback_inv(_start,_size) do { } while (0)
323 #define flush_write_buffers()
325 #endif
327 #endif /* __KERNEL__ */
329 #ifdef SLOW_IO_BY_JUMPING
330 #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
331 #elif defined(__UNSAFE_IO__)
332 #define __SLOW_DOWN_IO "outb %%al,$0x80;"
333 #else
334 #define __SLOW_DOWN_IO "\n1: outb %%al,$0x80\n" \
335 "2:\n" \
336 ".section __ex_table,\"a\"\n\t" \
337 ".align 4\n\t" \
338 ".long 1b,2b\n" \
339 ".previous"
340 #endif
342 static inline void slow_down_io(void) {
343 __asm__ __volatile__(
344 __SLOW_DOWN_IO
345 #ifdef REALLY_SLOW_IO
346 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
347 #endif
348 : : );
349 }
351 #ifdef CONFIG_X86_NUMAQ
352 extern void *xquad_portio; /* Where the IO area was mapped */
353 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
354 #define __BUILDIO(bwl,bw,type) \
355 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
356 if (xquad_portio) \
357 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
358 else \
359 out##bwl##_local(value, port); \
360 } \
361 static inline void out##bwl(unsigned type value, int port) { \
362 out##bwl##_quad(value, port, 0); \
363 } \
364 static inline unsigned type in##bwl##_quad(int port, int quad) { \
365 if (xquad_portio) \
366 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
367 else \
368 return in##bwl##_local(port); \
369 } \
370 static inline unsigned type in##bwl(int port) { \
371 return in##bwl##_quad(port, 0); \
372 }
373 #else
374 #define __BUILDIO(bwl,bw,type) \
375 static inline void out##bwl(unsigned type value, int port) { \
376 out##bwl##_local(value, port); \
377 } \
378 static inline unsigned type in##bwl(int port) { \
379 return in##bwl##_local(port); \
380 }
381 #endif
384 #if __UNSAFE_IO__
385 #define ____BUILDIO(bwl,bw,type) \
386 static inline void out##bwl##_local(unsigned type value, int port) { \
387 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
388 } \
389 static inline unsigned type in##bwl##_local(int port) { \
390 unsigned type value; \
391 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
392 return value; \
393 }
394 #else
395 #define ____BUILDIO(bwl,bw,type) \
396 static inline void out##bwl##_local(unsigned type value, int port) { \
397 __asm__ __volatile__("1: out" #bwl " %" #bw "0, %w1\n" \
398 "2:\n" \
399 ".section __ex_table,\"a\"\n\t" \
400 ".align 4\n\t" \
401 ".long 1b,2b\n" \
402 ".previous" : : "a"(value), "Nd"(port)); \
403 } \
404 static inline unsigned type in##bwl##_local(int port) { \
405 unsigned type value; \
406 __asm__ __volatile__("1:in" #bwl " %w1, %" #bw "0\n" \
407 "2:\n" \
408 ".section .fixup,\"ax\"\n" \
409 "3: mov" #bwl " $~0,%" #bw "0\n\t" \
410 "jmp 2b\n" \
411 ".previous\n" \
412 ".section __ex_table,\"a\"\n\t" \
413 ".align 4\n\t" \
414 ".long 1b,3b\n" \
415 ".previous" : "=a"(value) : "Nd"(port)); \
416 return value; \
417 }
418 #endif
420 #define BUILDIO(bwl,bw,type) \
421 ____BUILDIO(bwl,bw,type) \
422 static inline void out##bwl##_local_p(unsigned type value, int port) { \
423 out##bwl##_local(value, port); \
424 slow_down_io(); \
425 } \
426 static inline unsigned type in##bwl##_local_p(int port) { \
427 unsigned type value = in##bwl##_local(port); \
428 slow_down_io(); \
429 return value; \
430 } \
431 __BUILDIO(bwl,bw,type) \
432 static inline void out##bwl##_p(unsigned type value, int port) { \
433 out##bwl(value, port); \
434 slow_down_io(); \
435 } \
436 static inline unsigned type in##bwl##_p(int port) { \
437 unsigned type value = in##bwl(port); \
438 slow_down_io(); \
439 return value; \
440 } \
441 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
442 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
443 } \
444 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
445 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
446 }
448 BUILDIO(b,b,char)
449 BUILDIO(w,w,short)
450 BUILDIO(l,,int)
452 /* We will be supplying our own /dev/mem implementation */
453 #define ARCH_HAS_DEV_MEM
455 #endif