debuggers.hg

view linux-2.6.11-xen-sparse/arch/xen/i386/kernel/head.S @ 4621:c75e32dc585e

bitkeeper revision 1.1331 (42662daawcgGfsYXrl37riGl22RhdA)

[PATCH] [PATCH 1/2] i386 whitespace cleanup in Linux sparse tree

Eliminate extraneous whitespace changes in i386 portion of Linux
sparse patch.

Signed-off-by: Chris Wright <chrisw@osdl.org>
author chrisw@osdl.org[kaf24]
date Wed Apr 20 10:23:38 2005 +0000 (2005-04-20)
parents 445b12a7221a
children 71ac8f618782 b2ca9de6952a 65b28c74cec2
line source
2 #include <linux/config.h>
4 .section __xen_guest
5 .ascii "GUEST_OS=linux,GUEST_VER=2.6,XEN_VER=3.0,VIRT_BASE=0xC0000000"
6 .ascii ",LOADER=generic"
7 .byte 0
9 .text
10 #include <linux/threads.h>
11 #include <linux/linkage.h>
12 #include <asm/segment.h>
13 #include <asm/thread_info.h>
14 #include <asm/asm_offsets.h>
15 #include <asm-xen/xen-public/arch-x86_32.h>
17 /*
18 * References to members of the new_cpu_data structure.
19 */
21 #define X86 new_cpu_data+CPUINFO_x86
22 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
23 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
24 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
25 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
26 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
27 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
28 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
30 ENTRY(startup_32)
31 cld
33 /* Copy the necessary stuff from xen_start_info structure. */
34 mov $xen_start_info_union,%edi
35 mov $128,%ecx
36 rep movsl
38 #ifdef CONFIG_SMP
39 ENTRY(startup_32_smp)
40 cld
41 #endif /* CONFIG_SMP */
43 /* Set up the stack pointer */
44 lss stack_start,%esp
46 checkCPUtype:
48 /* get vendor info */
49 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
50 cpuid
51 movl %eax,X86_CPUID # save CPUID level
52 movl %ebx,X86_VENDOR_ID # lo 4 chars
53 movl %edx,X86_VENDOR_ID+4 # next 4 chars
54 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
56 movl $1,%eax # Use the CPUID instruction to get CPU type
57 cpuid
58 movb %al,%cl # save reg for future use
59 andb $0x0f,%ah # mask processor family
60 movb %ah,X86
61 andb $0xf0,%al # mask model
62 shrb $4,%al
63 movb %al,X86_MODEL
64 andb $0x0f,%cl # mask mask revision
65 movb %cl,X86_MASK
66 movl %edx,X86_CAPABILITY
68 incb ready
70 xorl %eax,%eax # Clear FS/GS and LDT
71 movl %eax,%fs
72 movl %eax,%gs
73 cld # gcc2 wants the direction flag cleared at all times
75 #ifdef CONFIG_SMP
76 movb ready, %cl
77 cmpb $1,%cl
78 je 1f # the first CPU calls start_kernel
79 # all other CPUs call initialize_secondary
80 call initialize_secondary
81 jmp L6
82 1:
83 #endif /* CONFIG_SMP */
84 call start_kernel
85 L6:
86 jmp L6 # main should never return here, but
87 # just in case, we know what happens.
89 ENTRY(lgdt_finish)
90 movl $(__KERNEL_DS),%eax # reload all the segment registers
91 movw %ax,%ss # after changing gdt.
93 movl $(__USER_DS),%eax # DS/ES contains default USER segment
94 movw %ax,%ds
95 movw %ax,%es
97 popl %eax # reload CS by intersegment return
98 pushl $(__KERNEL_CS)
99 pushl %eax
100 lret
102 ENTRY(stack_start)
103 .long init_thread_union+THREAD_SIZE
104 .long __BOOT_DS
106 ready: .byte 0
108 .globl idt_descr
109 .globl cpu_gdt_descr
111 ALIGN
112 .word 0 # 32-bit align idt_desc.address
113 idt_descr:
114 .word IDT_ENTRIES*8-1 # idt contains 256 entries
115 .long idt_table
117 # boot GDT descriptor (later on used by CPU#0):
118 .word 0 # 32 bit align gdt_desc.address
119 cpu_gdt_descr:
120 .word GDT_SIZE
121 .long cpu_gdt_table
123 .fill NR_CPUS-1,8,0 # space for the other GDT descriptors
125 .org 0x1000
126 ENTRY(empty_zero_page)
128 .org 0x2000
129 ENTRY(swapper_pg_dir)
131 .org 0x3000
132 ENTRY(cpu_gdt_table)
133 .quad 0x0000000000000000 /* NULL descriptor */
134 .quad 0x0000000000000000 /* 0x0b reserved */
135 .quad 0x0000000000000000 /* 0x13 reserved */
136 .quad 0x0000000000000000 /* 0x1b reserved */
137 .quad 0x0000000000000000 /* 0x20 unused */
138 .quad 0x0000000000000000 /* 0x28 unused */
139 .quad 0x0000000000000000 /* 0x33 TLS entry 1 */
140 .quad 0x0000000000000000 /* 0x3b TLS entry 2 */
141 .quad 0x0000000000000000 /* 0x43 TLS entry 3 */
142 .quad 0x0000000000000000 /* 0x4b reserved */
143 .quad 0x0000000000000000 /* 0x53 reserved */
144 .quad 0x0000000000000000 /* 0x5b reserved */
146 .quad 0x00cfbb000000c3ff /* 0x60 kernel 4GB code at 0x00000000 */
147 .quad 0x00cfb3000000c3ff /* 0x68 kernel 4GB data at 0x00000000 */
148 .quad 0x00cffb000000c3ff /* 0x73 user 4GB code at 0x00000000 */
149 .quad 0x00cff3000000c3ff /* 0x7b user 4GB data at 0x00000000 */
151 .quad 0x0000000000000000 /* 0x80 TSS descriptor */
152 .quad 0x0000000000000000 /* 0x88 LDT descriptor */
154 /* Segments used for calling PnP BIOS */
155 .quad 0x0000000000000000 /* 0x90 32-bit code */
156 .quad 0x0000000000000000 /* 0x98 16-bit code */
157 .quad 0x0000000000000000 /* 0xa0 16-bit data */
158 .quad 0x0000000000000000 /* 0xa8 16-bit data */
159 .quad 0x0000000000000000 /* 0xb0 16-bit data */
160 /*
161 * The APM segments have byte granularity and their bases
162 * and limits are set at run time.
163 */
164 .quad 0x0000000000000000 /* 0xb8 APM CS code */
165 .quad 0x0000000000000000 /* 0xc0 APM CS 16 code (16 bit) */
166 .quad 0x0000000000000000 /* 0xc8 APM DS data */
168 .quad 0x0000000000000000 /* 0xd0 - unused */
169 .quad 0x0000000000000000 /* 0xd8 - unused */
170 .quad 0x0000000000000000 /* 0xe0 - unused */
171 .quad 0x0000000000000000 /* 0xe8 - unused */
172 .quad 0x0000000000000000 /* 0xf0 - unused */
173 .quad 0x0000000000000000 /* 0xf8 - GDT entry 31: double-fault TSS */
174 .fill GDT_ENTRIES-32,8,0
176 .org 0x4000
177 ENTRY(default_ldt)
179 .org 0x5000
180 /*
181 * Real beginning of normal "text" segment
182 */
183 ENTRY(stext)
184 ENTRY(_stext)