debuggers.hg

view xen/include/asm-x86/vmx_vmcs.h @ 3607:cd26f113b1b1

bitkeeper revision 1.1159.231.12 (41f97ef6r1c2TDcgR-o8jFV1IWm5dA)

Lean decoder for MMIO instructions.

Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Signed-off-by: Chengyuan Li <chengyuan.li@intel.com>
Signed-off-by: ian.pratt@cl.cam.ac.uk
author iap10@labyrinth.cl.cam.ac.uk
date Thu Jan 27 23:53:26 2005 +0000 (2005-01-27)
parents b9ab4345fd1b
children bc0fbb38cb25
line source
1 /*
2 * vmx_vmcs.h: VMCS related definitions
3 * Copyright (c) 2004, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19 #ifndef __ASM_X86_VMX_VMCS_H__
20 #define __ASM_X86_VMX_VMCS_H__
22 #include <asm/config.h>
23 #include <asm/vmx_cpu.h>
24 #include <asm/vmx_platform.h>
26 extern int start_vmx(void);
27 extern void stop_vmx(void);
29 void vmx_enter_scheduler(void);
31 union vmcs_arbytes {
32 struct arbyte_fields {
33 unsigned int
34 seg_type: 4, s: 1, dpl: 2, p: 1,
35 reserved0: 4, avl: 1, reserved1: 1,
36 default_ops_size: 1, g: 1, null_bit: 1,
37 reserved2: 15;
38 } __attribute__((packed)) fields;
39 unsigned int bytes;
40 };
42 #define VMX_CPU_STATE_PG_ENABLED 0
43 #define VMCS_SIZE 0x1000
45 struct vmcs_struct {
46 u32 vmcs_revision_id;
47 unsigned char data [0x1000 - sizeof (u32)];
48 };
50 struct arch_vmx_struct {
51 struct vmcs_struct *vmcs; /* VMCS pointer in virtual */
52 unsigned long flags; /* VMCS flags */
53 unsigned long cpu_cr2; /* save CR2 */
54 unsigned long cpu_cr3;
55 unsigned long cpu_state;
56 struct virutal_platform_def vmx_platform;
57 };
59 #define vmx_schedule_tail(next) \
60 (next)->thread.arch_vmx.arch_vmx_schedule_tail((next))
62 #define VMX_DOMAIN(d) d->thread.arch_vmx.flags
64 #define ARCH_VMX_VMCS_LOADED 0 /* VMCS has been loaded and active */
65 #define ARCH_VMX_VMCS_LAUNCH 1 /* Needs VMCS launch */
66 #define ARCH_VMX_VMCS_RESUME 2 /* Needs VMCS resume */
67 #define ARCH_VMX_IO_WAIT 3 /* Waiting for I/O completion */
69 void vmx_do_launch(struct exec_domain *);
70 void vmx_do_resume(struct exec_domain *);
72 struct vmcs_struct *alloc_vmcs(void);
73 void free_vmcs(struct vmcs_struct *);
74 int load_vmcs(struct arch_vmx_struct *, u64);
75 int store_vmcs(struct arch_vmx_struct *, u64);
76 void dump_vmcs(void);
77 int construct_vmcs(struct arch_vmx_struct *, execution_context_t *,
78 full_execution_context_t *, int);
80 #define VMCS_USE_HOST_ENV 1
81 #define VMCS_USE_SEPARATE_ENV 0
83 #define VMCS_EFLAGS_RESERVED_0 0xffc08028 /* bitmap for 0 */
84 #define VMCS_EFLAGS_RESERVED_1 0x00000002 /* bitmap for 1 */
86 extern int vmcs_version;
88 /* VMCS Encordings */
89 enum vmcs_field {
90 GUEST_ES_SELECTOR = 0x00000800,
91 GUEST_CS_SELECTOR = 0x00000802,
92 GUEST_SS_SELECTOR = 0x00000804,
93 GUEST_DS_SELECTOR = 0x00000806,
94 GUEST_FS_SELECTOR = 0x00000808,
95 GUEST_GS_SELECTOR = 0x0000080a,
96 GUEST_LDTR_SELECTOR = 0x0000080c,
97 GUEST_TR_SELECTOR = 0x0000080e,
98 HOST_ES_SELECTOR = 0x00000c00,
99 HOST_CS_SELECTOR = 0x00000c02,
100 HOST_SS_SELECTOR = 0x00000c04,
101 HOST_DS_SELECTOR = 0x00000c06,
102 HOST_FS_SELECTOR = 0x00000c08,
103 HOST_GS_SELECTOR = 0x00000c0a,
104 HOST_TR_SELECTOR = 0x00000c0c,
105 IO_BITMAP_A = 0x00002000,
106 IO_BITMAP_B = 0x00002002,
107 VM_EXIT_MSR_STORE_ADDR = 0x00002006,
108 VM_EXIT_MSR_LOAD_ADDR = 0x00002008,
109 VM_ENTRY_MSR_LOAD_ADDR = 0x0000200a,
110 TSC_OFFSET = 0x00002010,
111 GUEST_VMCS0 = 0x00002800,
112 GUEST_VMCS1 = 0x00002801,
113 GUEST_IA32_DEBUGCTL = 0x00002802,
114 PIN_BASED_VM_EXEC_CONTROL = 0x00004000,
115 CPU_BASED_VM_EXEC_CONTROL = 0x00004002,
116 EXCEPTION_BITMAP = 0x00004004,
117 PAGE_FAULT_ERROR_CODE_MASK = 0x00004006,
118 PAGE_FAULT_ERROR_CODE_MATCH = 0x00004008,
119 CR3_TARGET_COUNT = 0x0000400a,
120 VM_EXIT_CONTROLS = 0x0000400c,
121 VM_EXIT_MSR_STORE_COUNT = 0x0000400e,
122 VM_EXIT_MSR_LOAD_COUNT = 0x00004010,
123 VM_ENTRY_CONTROLS = 0x00004012,
124 VM_ENTRY_MSR_LOAD_COUNT = 0x00004014,
125 VM_ENTRY_INTR_INFO_FIELD = 0x00004016,
126 VM_ENTRY_EXCEPTION_ERROR_CODE = 0x00004018,
127 VM_EXIT_REASON = 0x00004402,
128 VM_EXIT_INTR_INFO = 0x00004404,
129 VM_EXIT_INTR_ERROR_CODE = 0x00004406,
130 IDT_VECTORING_INFO_FIELD = 0x00004408,
131 IDT_VECTORING_ERROR_CODE = 0x0000440a,
132 INSTRUCTION_LEN = 0x0000440c,
133 GUEST_ES_LIMIT = 0x00004800,
134 GUEST_CS_LIMIT = 0x00004802,
135 GUEST_SS_LIMIT = 0x00004804,
136 GUEST_DS_LIMIT = 0x00004806,
137 GUEST_FS_LIMIT = 0x00004808,
138 GUEST_GS_LIMIT = 0x0000480a,
139 GUEST_LDTR_LIMIT = 0x0000480c,
140 GUEST_TR_LIMIT = 0x0000480e,
141 GUEST_GDTR_LIMIT = 0x00004810,
142 GUEST_IDTR_LIMIT = 0x00004812,
143 GUEST_ES_AR_BYTES = 0x00004814,
144 GUEST_CS_AR_BYTES = 0x00004816,
145 GUEST_SS_AR_BYTES = 0x00004818,
146 GUEST_DS_AR_BYTES = 0x0000481a,
147 GUEST_FS_AR_BYTES = 0x0000481c,
148 GUEST_GS_AR_BYTES = 0x0000481e,
149 GUEST_LDTR_AR_BYTES = 0x00004820,
150 GUEST_TR_AR_BYTES = 0x00004822,
151 GUEST_INTERRUPTIBILITY_INFO = 0x00004824,
152 CR0_GUEST_HOST_MASK = 0x00006000,
153 CR4_GUEST_HOST_MASK = 0x00006002,
154 CR0_READ_SHADOW = 0x00006004,
155 CR4_READ_SHADOW = 0x00006006,
156 CR3_TARGET_VALUES = 0x00006008,
157 CR3_GUEST_HOST_MASK = 0x00006208,
158 EXIT_QUALIFICATION = 0x00006400,
159 GUEST_CR0 = 0x00006800,
160 GUEST_CR3 = 0x00006802,
161 GUEST_CR4 = 0x00006804,
162 GUEST_ES_BASE = 0x00006806,
163 GUEST_CS_BASE = 0x00006808,
164 GUEST_SS_BASE = 0x0000680a,
165 GUEST_DS_BASE = 0x0000680c,
166 GUEST_FS_BASE = 0x0000680e,
167 GUEST_GS_BASE = 0x00006810,
168 GUEST_LDTR_BASE = 0x00006812,
169 GUEST_TR_BASE = 0x00006814,
170 GUEST_GDTR_BASE = 0x00006816,
171 GUEST_IDTR_BASE = 0x00006818,
172 GUEST_DR7 = 0x0000681a,
173 GUEST_ESP = 0x0000681c,
174 GUEST_EIP = 0x0000681e,
175 GUEST_EFLAGS = 0x00006820,
176 GUEST_PENDING_DBG_EXCEPTIONS = 0x00006822,
177 HOST_CR0 = 0x00006c00,
178 HOST_CR3 = 0x00006c02,
179 HOST_CR4 = 0x00006c04,
180 HOST_FS_BASE = 0x00006c06,
181 HOST_GS_BASE = 0x00006c08,
182 HOST_TR_BASE = 0x00006c0a,
183 HOST_GDTR_BASE = 0x00006c0c,
184 HOST_IDTR_BASE = 0x00006c0e,
185 HOST_ESP = 0x00006c14,
186 HOST_EIP = 0x00006c16,
187 };
189 #define VMX_DEBUG 1
190 #if VMX_DEBUG
191 #define DBG_LEVEL_0 (1 << 0)
192 #define DBG_LEVEL_1 (1 << 1)
193 #define DBG_LEVEL_2 (1 << 2)
194 #define DBG_LEVEL_3 (1 << 3)
195 #define DBG_LEVEL_IO (1 << 4)
196 #define DBG_LEVEL_VMMU (1 << 5)
198 extern unsigned int opt_vmx_debug_level;
199 #define VMX_DBG_LOG(level, _f, _a...) \
200 if ((level) & opt_vmx_debug_level) \
201 printk("[VMX]" _f "\n", ## _a )
202 #else
203 #define VMX_DBG_LOG(level, _f, _a...)
204 #endif
206 #define __vmx_bug(regs) \
207 do { \
208 printk("__vmx_bug at %s:%d\n", __FILE__, __LINE__); \
209 show_registers(regs); \
210 domain_crash(); \
211 } while (0)
213 #endif /* ASM_X86_VMX_VMCS_H__ */