debuggers.hg

view xenolinux-2.4.21-sparse/include/asm-xeno/hypervisor.h @ 648:cda951fc1bef

bitkeeper revision 1.341 (3f1120a2WW6KGE81TArq_p654xy38Q)

Merge labyrinth.cl.cam.ac.uk:/auto/groups/xeno/BK/xeno.bk
into labyrinth.cl.cam.ac.uk:/auto/anfs/scratch/labyrinth/iap10/xeno-clone/xeno.bk
author iap10@labyrinth.cl.cam.ac.uk
date Sun Jul 13 09:04:34 2003 +0000 (2003-07-13)
parents 93c7dcf4a80e 9339f3942f4e
children
line source
1 /******************************************************************************
2 * hypervisor.h
3 *
4 * Linux-specific hypervisor handling.
5 *
6 * Copyright (c) 2002, K A Fraser
7 */
9 #ifndef __HYPERVISOR_H__
10 #define __HYPERVISOR_H__
12 #include <linux/types.h>
13 #include <asm/hypervisor-ifs/hypervisor-if.h>
14 #include <asm/ptrace.h>
16 /* arch/xeno/kernel/setup.c */
17 union start_info_union
18 {
19 start_info_t start_info;
20 char padding[512];
21 };
22 extern union start_info_union start_info_union;
23 #define start_info (start_info_union.start_info)
25 /* arch/xeno/kernel/hypervisor.c */
26 void do_hypervisor_callback(struct pt_regs *regs);
29 /* arch/xeno/mm/hypervisor.c */
30 /*
31 * NB. ptr values should be PHYSICAL, not MACHINE. 'vals' should be already
32 * be MACHINE addresses.
33 */
35 extern unsigned int pt_update_queue_idx;
37 void queue_l1_entry_update(unsigned long ptr, unsigned long val);
38 void queue_l2_entry_update(unsigned long ptr, unsigned long val);
39 void queue_pt_switch(unsigned long ptr);
40 void queue_tlb_flush(void);
41 void queue_invlpg(unsigned long ptr);
42 void queue_pgd_pin(unsigned long ptr);
43 void queue_pgd_unpin(unsigned long ptr);
44 void queue_pte_pin(unsigned long ptr);
45 void queue_pte_unpin(unsigned long ptr);
46 void queue_set_ldt(unsigned long ptr, unsigned long bytes);
47 #define PT_UPDATE_DEBUG 0
49 #if PT_UPDATE_DEBUG > 0
50 typedef struct {
51 unsigned long ptr, val, pteval;
52 void *ptep;
53 int line; char *file;
54 } page_update_debug_t;
55 extern page_update_debug_t update_debug_queue[];
56 #define queue_l1_entry_update(_p,_v) ({ \
57 update_debug_queue[pt_update_queue_idx].ptr = (_p); \
58 update_debug_queue[pt_update_queue_idx].val = (_v); \
59 update_debug_queue[pt_update_queue_idx].line = __LINE__; \
60 update_debug_queue[pt_update_queue_idx].file = __FILE__; \
61 queue_l1_entry_update((_p),(_v)); \
62 })
63 #define queue_l2_entry_update(_p,_v) ({ \
64 update_debug_queue[pt_update_queue_idx].ptr = (_p); \
65 update_debug_queue[pt_update_queue_idx].val = (_v); \
66 update_debug_queue[pt_update_queue_idx].line = __LINE__; \
67 update_debug_queue[pt_update_queue_idx].file = __FILE__; \
68 queue_l2_entry_update((_p),(_v)); \
69 })
70 #endif
72 #if PT_UPDATE_DEBUG > 1
73 #undef queue_l1_entry_update
74 #undef queue_l2_entry_update
75 #define queue_l1_entry_update(_p,_v) ({ \
76 update_debug_queue[pt_update_queue_idx].ptr = (_p); \
77 update_debug_queue[pt_update_queue_idx].val = (_v); \
78 update_debug_queue[pt_update_queue_idx].line = __LINE__; \
79 update_debug_queue[pt_update_queue_idx].file = __FILE__; \
80 printk("L1 %s %d: %08lx (%08lx -> %08lx)\n", __FILE__, __LINE__, \
81 phys_to_machine(_p), *(unsigned long *)__va(_p), \
82 (unsigned long)(_v)); \
83 queue_l1_entry_update((_p),(_v)); \
84 })
85 #define queue_l2_entry_update(_p,_v) ({ \
86 update_debug_queue[pt_update_queue_idx].ptr = (_p); \
87 update_debug_queue[pt_update_queue_idx].val = (_v); \
88 update_debug_queue[pt_update_queue_idx].line = __LINE__; \
89 update_debug_queue[pt_update_queue_idx].file = __FILE__; \
90 printk("L2 %s %d: %08lx (%08lx -> %08lx)\n", __FILE__, __LINE__, \
91 phys_to_machine(_p), *(unsigned long *)__va(_p), \
92 (unsigned long)(_v)); \
93 queue_l2_entry_update((_p),(_v)); \
94 })
95 #define queue_pt_switch(_p) ({ \
96 printk("PTSWITCH %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
97 queue_pt_switch(_p); \
98 })
99 #define queue_tlb_flush() ({ \
100 printk("TLB FLUSH %s %d\n", __FILE__, __LINE__); \
101 queue_tlb_flush(); \
102 })
103 #define queue_invlpg(_p) ({ \
104 printk("INVLPG %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
105 queue_invlpg(_p); \
106 })
107 #define queue_pgd_pin(_p) ({ \
108 printk("PGD PIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
109 queue_pgd_pin(_p); \
110 })
111 #define queue_pgd_unpin(_p) ({ \
112 printk("PGD UNPIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
113 queue_pgd_unpin(_p); \
114 })
115 #define queue_pte_pin(_p) ({ \
116 printk("PTE PIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
117 queue_pte_pin(_p); \
118 })
119 #define queue_pte_unpin(_p) ({ \
120 printk("PTE UNPIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
121 queue_pte_unpin(_p); \
122 })
123 #define queue_set_ldt(_p,_l) ({ \
124 printk("SETL LDT %s %d: %08lx %d\n", __FILE__, __LINE__, (_p), (_l)); \
125 queue_set_ldt((_p), (_l)); \
126 })
127 #endif
129 void _flush_page_update_queue(void);
130 static inline int flush_page_update_queue(void)
131 {
132 unsigned int idx = pt_update_queue_idx;
133 if ( idx != 0 ) _flush_page_update_queue();
134 return idx;
135 }
136 #define XENO_flush_page_update_queue() (_flush_page_update_queue())
137 void MULTICALL_flush_page_update_queue(void);
140 /*
141 * Assembler stubs for hyper-calls.
142 */
144 static inline int HYPERVISOR_set_trap_table(trap_info_t *table)
145 {
146 int ret;
147 __asm__ __volatile__ (
148 TRAP_INSTR
149 : "=a" (ret) : "0" (__HYPERVISOR_set_trap_table),
150 "b" (table) );
152 return ret;
153 }
156 static inline int HYPERVISOR_pt_update(page_update_request_t *req, int count)
157 {
158 int ret;
159 __asm__ __volatile__ (
160 TRAP_INSTR
161 : "=a" (ret) : "0" (__HYPERVISOR_pt_update),
162 "b" (req), "c" (count) );
164 return ret;
165 }
168 static inline int HYPERVISOR_console_write(const char *str, int count)
169 {
170 int ret;
171 __asm__ __volatile__ (
172 TRAP_INSTR
173 : "=a" (ret) : "0" (__HYPERVISOR_console_write),
174 "b" (str), "c" (count) );
177 return ret;
178 }
180 static inline int HYPERVISOR_set_gdt(unsigned long *frame_list, int entries)
181 {
182 int ret;
183 __asm__ __volatile__ (
184 TRAP_INSTR
185 : "=a" (ret) : "0" (__HYPERVISOR_set_gdt),
186 "b" (frame_list), "c" (entries) );
189 return ret;
190 }
192 static inline int HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
193 {
194 int ret;
195 __asm__ __volatile__ (
196 TRAP_INSTR
197 : "=a" (ret) : "0" (__HYPERVISOR_stack_switch),
198 "b" (ss), "c" (esp) : "memory" );
200 return ret;
201 }
203 static inline int HYPERVISOR_set_callbacks(
204 unsigned long event_selector, unsigned long event_address,
205 unsigned long failsafe_selector, unsigned long failsafe_address)
206 {
207 int ret;
208 __asm__ __volatile__ (
209 TRAP_INSTR
210 : "=a" (ret) : "0" (__HYPERVISOR_set_callbacks),
211 "b" (event_selector), "c" (event_address),
212 "d" (failsafe_selector), "S" (failsafe_address) : "memory" );
214 return ret;
215 }
217 static inline int HYPERVISOR_net_update(void)
218 {
219 int ret;
220 __asm__ __volatile__ (
221 TRAP_INSTR
222 : "=a" (ret) : "0" (__HYPERVISOR_net_update) );
224 return ret;
225 }
227 static inline int HYPERVISOR_fpu_taskswitch(void)
228 {
229 int ret;
230 __asm__ __volatile__ (
231 TRAP_INSTR
232 : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) );
234 return ret;
235 }
237 static inline int HYPERVISOR_yield(void)
238 {
239 int ret;
240 __asm__ __volatile__ (
241 TRAP_INSTR
242 : "=a" (ret) : "0" (__HYPERVISOR_yield) );
244 return ret;
245 }
247 static inline int HYPERVISOR_exit(void)
248 {
249 int ret;
250 __asm__ __volatile__ (
251 TRAP_INSTR
252 : "=a" (ret) : "0" (__HYPERVISOR_exit) );
254 return ret;
255 }
257 static inline int HYPERVISOR_dom0_op(void *dom0_op)
258 {
259 int ret;
260 __asm__ __volatile__ (
261 TRAP_INSTR
262 : "=a" (ret) : "0" (__HYPERVISOR_dom0_op),
263 "b" (dom0_op) : "memory" );
265 return ret;
266 }
268 static inline int HYPERVISOR_network_op(void *network_op)
269 {
270 int ret;
271 __asm__ __volatile__ (
272 TRAP_INSTR
273 : "=a" (ret) : "0" (__HYPERVISOR_network_op),
274 "b" (network_op) );
276 return ret;
277 }
279 static inline int HYPERVISOR_block_io_op(void)
280 {
281 int ret;
282 __asm__ __volatile__ (
283 TRAP_INSTR
284 : "=a" (ret) : "0" (__HYPERVISOR_block_io_op) );
286 return ret;
287 }
289 static inline int HYPERVISOR_set_debugreg(int reg, unsigned long value)
290 {
291 int ret;
292 __asm__ __volatile__ (
293 TRAP_INSTR
294 : "=a" (ret) : "0" (__HYPERVISOR_set_debugreg),
295 "b" (reg), "c" (value) );
297 return ret;
298 }
300 static inline unsigned long HYPERVISOR_get_debugreg(int reg)
301 {
302 unsigned long ret;
303 __asm__ __volatile__ (
304 TRAP_INSTR
305 : "=a" (ret) : "0" (__HYPERVISOR_get_debugreg),
306 "b" (reg) );
308 return ret;
309 }
311 static inline int HYPERVISOR_update_descriptor(
312 unsigned long pa, unsigned long word1, unsigned long word2)
313 {
314 int ret;
315 __asm__ __volatile__ (
316 TRAP_INSTR
317 : "=a" (ret) : "0" (__HYPERVISOR_update_descriptor),
318 "b" (pa), "c" (word1), "d" (word2) );
320 return ret;
321 }
323 static inline int HYPERVISOR_set_fast_trap(int idx)
324 {
325 int ret;
326 __asm__ __volatile__ (
327 TRAP_INSTR
328 : "=a" (ret) : "0" (__HYPERVISOR_set_fast_trap),
329 "b" (idx) );
331 return ret;
332 }
334 static inline int HYPERVISOR_dom_mem_op(void *dom_mem_op)
335 {
336 int ret;
337 __asm__ __volatile__ (
338 TRAP_INSTR
339 : "=a" (ret) : "0" (__HYPERVISOR_dom_mem_op),
340 "b" (dom_mem_op) : "memory" );
342 return ret;
343 }
345 static inline int HYPERVISOR_multicall(void *call_list, int nr_calls)
346 {
347 int ret;
348 __asm__ __volatile__ (
349 TRAP_INSTR
350 : "=a" (ret) : "0" (__HYPERVISOR_multicall),
351 "b" (call_list), "c" (nr_calls) : "memory" );
353 return ret;
354 }
356 static inline long HYPERVISOR_kbd_op(unsigned char op, unsigned char val)
357 {
358 int ret;
359 __asm__ __volatile__ (
360 TRAP_INSTR
361 : "=a" (ret) : "0" (__HYPERVISOR_kbd_op),
362 "b" (op), "c" (val) );
364 return ret;
365 }
367 #endif /* __HYPERVISOR_H__ */