debuggers.hg

view tools/ioemu/hw/xen_platform.c @ 13688:d1710eb35385

[HVM] Allow HVM guest to request invalidation of foreign mappings via
an I/O port write.
Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
author kaf24@localhost.localdomain
date Sat Jan 27 13:32:27 2007 +0000 (2007-01-27)
parents a77e38f63785
children 1a347b19142a
line source
1 /*
2 * XEN platform fake pci device, formerly known as the event channel device
3 *
4 * Copyright (c) 2003-2004 Intel Corp.
5 * Copyright (c) 2006 XenSource
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 #include "vl.h"
27 #include <xenguest.h>
28 #include <xc_private.h>
30 extern FILE *logfile;
32 static void platform_ioport_write(void *opaque, uint32_t addr, uint32_t val)
33 {
34 if (val == 0)
35 qemu_invalidate_map_cache();
36 }
38 static void platform_ioport_map(PCIDevice *pci_dev, int region_num,
39 uint32_t addr, uint32_t size, int type)
40 {
41 register_ioport_write(addr, 1, 1, platform_ioport_write, NULL);
42 }
44 static uint32_t platform_mmio_read(void *opaque, target_phys_addr_t addr)
45 {
46 fprintf(logfile, "Warning: try read from xen platform mmio space\n");
47 return 0;
48 }
50 static void platform_mmio_write(void *opaque, target_phys_addr_t addr,
51 uint32_t val)
52 {
53 fprintf(logfile, "Warning: try write to xen platform mmio space\n");
54 return;
55 }
57 static CPUReadMemoryFunc *platform_mmio_read_funcs[3] = {
58 platform_mmio_read,
59 platform_mmio_read,
60 platform_mmio_read,
61 };
63 static CPUWriteMemoryFunc *platform_mmio_write_funcs[3] = {
64 platform_mmio_write,
65 platform_mmio_write,
66 platform_mmio_write,
67 };
69 static void platform_mmio_map(PCIDevice *d, int region_num,
70 uint32_t addr, uint32_t size, int type)
71 {
72 int mmio_io_addr;
74 mmio_io_addr = cpu_register_io_memory(0, platform_mmio_read_funcs,
75 platform_mmio_write_funcs, NULL);
77 cpu_register_physical_memory(addr, 0x1000000, mmio_io_addr);
78 }
80 struct pci_config_header {
81 uint16_t vendor_id;
82 uint16_t device_id;
83 uint16_t command;
84 uint16_t status;
85 uint8_t revision;
86 uint8_t api;
87 uint8_t subclass;
88 uint8_t class;
89 uint8_t cache_line_size; /* Units of 32 bit words */
90 uint8_t latency_timer; /* In units of bus cycles */
91 uint8_t header_type; /* Should be 0 */
92 uint8_t bist; /* Built in self test */
93 uint32_t base_address_regs[6];
94 uint32_t reserved1;
95 uint16_t subsystem_vendor_id;
96 uint16_t subsystem_id;
97 uint32_t rom_addr;
98 uint32_t reserved3;
99 uint32_t reserved4;
100 uint8_t interrupt_line;
101 uint8_t interrupt_pin;
102 uint8_t min_gnt;
103 uint8_t max_lat;
104 };
106 void pci_xen_platform_init(PCIBus *bus)
107 {
108 PCIDevice *d;
109 struct pci_config_header *pch;
111 printf("Register xen platform.\n");
112 d = pci_register_device(bus, "xen-platform", sizeof(PCIDevice), -1, NULL,
113 NULL);
114 pch = (struct pci_config_header *)d->config;
115 pch->vendor_id = 0x5853;
116 pch->device_id = 0x0001;
117 pch->command = 3; /* IO and memory access */
118 pch->revision = 1;
119 pch->api = 0;
120 pch->subclass = 0x80; /* Other */
121 pch->class = 0xff; /* Unclassified device class */
122 pch->header_type = 0;
123 pch->interrupt_pin = 1;
125 /* Microsoft WHQL requires non-zero subsystem IDs. */
126 /* http://www.pcisig.com/reflector/msg02205.html. */
127 pch->subsystem_vendor_id = pch->vendor_id; /* Duplicate vendor id. */
128 pch->subsystem_id = 0x0001; /* Hardcode sub-id as 1. */
130 pci_register_io_region(d, 0, 0x100, PCI_ADDRESS_SPACE_IO,
131 platform_ioport_map);
133 /* reserve 16MB mmio address for share memory*/
134 pci_register_io_region(d, 1, 0x1000000, PCI_ADDRESS_SPACE_MEM_PREFETCH,
135 platform_mmio_map);
137 register_savevm("platform", 0, 1, generic_pci_save, generic_pci_load, d);
138 printf("Done register platform.\n");
139 }