debuggers.hg

view xen/arch/x86/setup.c @ 3393:d1e0d9a8fde0

bitkeeper revision 1.1159.1.518 (41d448acXfjJK8iSoExMLCtViOvsoA)

Merge scramble.cl.cam.ac.uk:/local/scratch/kaf24/xen-2.0-testing.bk
into scramble.cl.cam.ac.uk:/local/scratch/kaf24/xen-unstable.bk
author kaf24@scramble.cl.cam.ac.uk
date Thu Dec 30 18:27:56 2004 +0000 (2004-12-30)
parents 3d7f4ed76300 7f2bf9fecd7e
children fec8b1778268 bbe8541361dd
line source
2 #include <xen/config.h>
3 #include <xen/init.h>
4 #include <xen/lib.h>
5 #include <xen/sched.h>
6 #include <xen/pci.h>
7 #include <xen/serial.h>
8 #include <xen/softirq.h>
9 #include <xen/acpi.h>
10 #include <xen/console.h>
11 #include <xen/trace.h>
12 #include <xen/multiboot.h>
13 #include <asm/bitops.h>
14 #include <asm/smp.h>
15 #include <asm/processor.h>
16 #include <asm/mpspec.h>
17 #include <asm/apic.h>
18 #include <asm/desc.h>
19 #include <asm/domain_page.h>
20 #include <asm/pdb.h>
21 #include <asm/shadow.h>
22 #include <asm/e820.h>
24 /* opt_dom0_mem: Kilobytes of memory allocated to domain 0. */
25 static unsigned int opt_dom0_mem = 16000;
26 integer_param("dom0_mem", opt_dom0_mem);
28 /*
29 * opt_xenheap_megabytes: Size of Xen heap in megabytes, excluding the
30 * pfn_info table and allocation bitmap.
31 */
32 static unsigned int opt_xenheap_megabytes = XENHEAP_DEFAULT_MB;
33 #if defined(__x86_64__)
34 integer_param("xenheap_megabytes", opt_xenheap_megabytes);
35 #endif
37 /* opt_noht: If true, Hyperthreading is ignored. */
38 int opt_noht = 0;
39 boolean_param("noht", opt_noht);
41 /* opt_noacpi: If true, ACPI tables are not parsed. */
42 static int opt_noacpi = 0;
43 boolean_param("noacpi", opt_noacpi);
45 /* opt_nosmp: If true, secondary processors are ignored. */
46 static int opt_nosmp = 0;
47 boolean_param("nosmp", opt_nosmp);
49 /* opt_ignorebiostables: If true, ACPI and MP tables are ignored. */
50 /* NB. This flag implies 'nosmp' and 'noacpi'. */
51 static int opt_ignorebiostables = 0;
52 boolean_param("ignorebiostables", opt_ignorebiostables);
54 /* opt_watchdog: If true, run a watchdog NMI on each processor. */
55 static int opt_watchdog = 0;
56 boolean_param("watchdog", opt_watchdog);
58 unsigned long xenheap_phys_end;
60 extern void arch_init_memory(void);
61 extern void init_IRQ(void);
62 extern void trap_init(void);
63 extern void time_init(void);
64 extern void ac_timer_init(void);
65 extern void initialize_keytable();
66 extern int do_timer_lists_from_pit;
68 char ignore_irq13; /* set if exception 16 works */
69 struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1 };
71 #if defined(__x86_64__)
72 unsigned long mmu_cr4_features = X86_CR4_PSE | X86_CR4_PGE | X86_CR4_PAE;
73 #else
74 unsigned long mmu_cr4_features = X86_CR4_PSE | X86_CR4_PGE;
75 #endif
76 EXPORT_SYMBOL(mmu_cr4_features);
78 unsigned long wait_init_idle;
80 struct exec_domain *idle_task[NR_CPUS] = { &idle0_exec_domain };
82 #ifdef CONFIG_ACPI_INTERPRETER
83 int acpi_disabled = 0;
84 #else
85 int acpi_disabled = 1;
86 #endif
87 EXPORT_SYMBOL(acpi_disabled);
89 int phys_proc_id[NR_CPUS];
90 int logical_proc_id[NR_CPUS];
92 #if defined(__i386__)
94 /* Standard macro to see if a specific flag is changeable */
95 static inline int flag_is_changeable_p(u32 flag)
96 {
97 u32 f1, f2;
99 asm("pushfl\n\t"
100 "pushfl\n\t"
101 "popl %0\n\t"
102 "movl %0,%1\n\t"
103 "xorl %2,%0\n\t"
104 "pushl %0\n\t"
105 "popfl\n\t"
106 "pushfl\n\t"
107 "popl %0\n\t"
108 "popfl\n\t"
109 : "=&r" (f1), "=&r" (f2)
110 : "ir" (flag));
112 return ((f1^f2) & flag) != 0;
113 }
115 /* Probe for the CPUID instruction */
116 static int __init have_cpuid_p(void)
117 {
118 return flag_is_changeable_p(X86_EFLAGS_ID);
119 }
121 #elif defined(__x86_64__)
123 #define have_cpuid_p() (1)
125 #endif
127 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
128 {
129 char *v = c->x86_vendor_id;
131 if (!strcmp(v, "GenuineIntel"))
132 c->x86_vendor = X86_VENDOR_INTEL;
133 else if (!strcmp(v, "AuthenticAMD"))
134 c->x86_vendor = X86_VENDOR_AMD;
135 else if (!strcmp(v, "CyrixInstead"))
136 c->x86_vendor = X86_VENDOR_CYRIX;
137 else if (!strcmp(v, "UMC UMC UMC "))
138 c->x86_vendor = X86_VENDOR_UMC;
139 else if (!strcmp(v, "CentaurHauls"))
140 c->x86_vendor = X86_VENDOR_CENTAUR;
141 else if (!strcmp(v, "NexGenDriven"))
142 c->x86_vendor = X86_VENDOR_NEXGEN;
143 else if (!strcmp(v, "RiseRiseRise"))
144 c->x86_vendor = X86_VENDOR_RISE;
145 else if (!strcmp(v, "GenuineTMx86") ||
146 !strcmp(v, "TransmetaCPU"))
147 c->x86_vendor = X86_VENDOR_TRANSMETA;
148 else
149 c->x86_vendor = X86_VENDOR_UNKNOWN;
150 }
152 static void __init init_intel(struct cpuinfo_x86 *c)
153 {
154 /* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it */
155 if ( c->x86 == 6 && c->x86_model < 3 && c->x86_mask < 3 )
156 clear_bit(X86_FEATURE_SEP, &c->x86_capability);
158 #ifdef CONFIG_SMP
159 if ( test_bit(X86_FEATURE_HT, &c->x86_capability) )
160 {
161 u32 eax, ebx, ecx, edx;
162 int initial_apic_id, siblings, cpu = smp_processor_id();
164 cpuid(1, &eax, &ebx, &ecx, &edx);
165 ht_per_core = siblings = (ebx & 0xff0000) >> 16;
167 if ( opt_noht )
168 clear_bit(X86_FEATURE_HT, &c->x86_capability[0]);
170 if ( siblings <= 1 )
171 {
172 printk(KERN_INFO "CPU#%d: Hyper-Threading is disabled\n", cpu);
173 }
174 else if ( siblings > 2 )
175 {
176 panic("We don't support more than two logical CPUs per package!");
177 }
178 else
179 {
180 initial_apic_id = ebx >> 24 & 0xff;
181 phys_proc_id[cpu] = initial_apic_id >> 1;
182 logical_proc_id[cpu] = initial_apic_id & 1;
183 printk(KERN_INFO "CPU#%d: Physical ID: %d, Logical ID: %d\n",
184 cpu, phys_proc_id[cpu], logical_proc_id[cpu]);
185 }
186 }
187 #endif
189 #ifdef CONFIG_VMX
190 start_vmx();
191 #endif
193 }
195 static void __init init_amd(struct cpuinfo_x86 *c)
196 {
197 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
198 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
199 clear_bit(0*32+31, &c->x86_capability);
201 switch(c->x86)
202 {
203 case 5:
204 panic("AMD K6 is not supported.\n");
205 case 6: /* An Athlon/Duron. We can trust the BIOS probably */
206 break;
207 }
208 }
210 /*
211 * This does the hard work of actually picking apart the CPU stuff...
212 */
213 void __init identify_cpu(struct cpuinfo_x86 *c)
214 {
215 int junk, i, cpu = smp_processor_id();
216 u32 xlvl, tfms;
218 phys_proc_id[cpu] = cpu;
219 logical_proc_id[cpu] = 0;
221 c->x86_vendor = X86_VENDOR_UNKNOWN;
222 c->cpuid_level = -1; /* CPUID not detected */
223 c->x86_model = c->x86_mask = 0; /* So far unknown... */
224 c->x86_vendor_id[0] = '\0'; /* Unset */
225 memset(&c->x86_capability, 0, sizeof c->x86_capability);
227 if ( !have_cpuid_p() )
228 panic("Ancient processors not supported\n");
230 /* Get vendor name */
231 cpuid(0x00000000, &c->cpuid_level,
232 (int *)&c->x86_vendor_id[0],
233 (int *)&c->x86_vendor_id[8],
234 (int *)&c->x86_vendor_id[4]);
236 get_cpu_vendor(c);
238 if ( c->cpuid_level == 0 )
239 panic("Decrepit CPUID not supported\n");
241 cpuid(0x00000001, &tfms, &junk, &junk,
242 &c->x86_capability[0]);
243 c->x86 = (tfms >> 8) & 15;
244 c->x86_model = (tfms >> 4) & 15;
245 c->x86_mask = tfms & 15;
247 /* AMD-defined flags: level 0x80000001 */
248 xlvl = cpuid_eax(0x80000000);
249 if ( (xlvl & 0xffff0000) == 0x80000000 ) {
250 if ( xlvl >= 0x80000001 )
251 c->x86_capability[1] = cpuid_edx(0x80000001);
252 }
254 /* Transmeta-defined flags: level 0x80860001 */
255 xlvl = cpuid_eax(0x80860000);
256 if ( (xlvl & 0xffff0000) == 0x80860000 ) {
257 if ( xlvl >= 0x80860001 )
258 c->x86_capability[2] = cpuid_edx(0x80860001);
259 }
261 printk("CPU%d: Before vendor init, caps: %08x %08x %08x, vendor = %d\n",
262 smp_processor_id(),
263 c->x86_capability[0],
264 c->x86_capability[1],
265 c->x86_capability[2],
266 c->x86_vendor);
268 switch ( c->x86_vendor ) {
269 case X86_VENDOR_INTEL:
270 init_intel(c);
271 break;
272 case X86_VENDOR_AMD:
273 init_amd(c);
274 break;
275 case X86_VENDOR_UNKNOWN: /* Connectix Virtual PC reports this */
276 break;
277 case X86_VENDOR_CENTAUR:
278 break;
279 default:
280 printk("Unknown CPU identifier (%d): continuing anyway, "
281 "but might fail.\n", c->x86_vendor);
282 }
284 printk("CPU caps: %08x %08x %08x %08x\n",
285 c->x86_capability[0],
286 c->x86_capability[1],
287 c->x86_capability[2],
288 c->x86_capability[3]);
290 /*
291 * On SMP, boot_cpu_data holds the common feature set between
292 * all CPUs; so make sure that we indicate which features are
293 * common between the CPUs. The first time this routine gets
294 * executed, c == &boot_cpu_data.
295 */
296 if ( c != &boot_cpu_data ) {
297 /* AND the already accumulated flags with these */
298 for ( i = 0 ; i < NCAPINTS ; i++ )
299 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
300 }
301 }
304 unsigned long cpu_initialized;
305 void __init cpu_init(void)
306 {
307 #if defined(__i386__) /* XXX */
308 int nr = smp_processor_id();
309 struct tss_struct * t = &init_tss[nr];
311 if ( test_and_set_bit(nr, &cpu_initialized) )
312 panic("CPU#%d already initialized!!!\n", nr);
313 printk("Initializing CPU#%d\n", nr);
315 t->bitmap = IOBMP_INVALID_OFFSET;
316 memset(t->io_bitmap, ~0, sizeof(t->io_bitmap));
318 /* Set up GDT and IDT. */
319 SET_GDT_ENTRIES(current, DEFAULT_GDT_ENTRIES);
320 SET_GDT_ADDRESS(current, DEFAULT_GDT_ADDRESS);
321 __asm__ __volatile__("lgdt %0": "=m" (*current->mm.gdt));
322 __asm__ __volatile__("lidt %0": "=m" (idt_descr));
324 /* No nested task. */
325 __asm__("pushfl ; andl $0xffffbfff,(%esp) ; popfl");
327 /* Ensure FPU gets initialised for each domain. */
328 stts();
330 /* Set up and load the per-CPU TSS and LDT. */
331 t->ss0 = __HYPERVISOR_DS;
332 t->esp0 = get_stack_top();
333 set_tss_desc(nr,t);
334 load_TR(nr);
335 __asm__ __volatile__("lldt %%ax"::"a" (0));
337 /* Clear all 6 debug registers. */
338 #define CD(register) __asm__("movl %0,%%db" #register ::"r"(0) );
339 CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);
340 #undef CD
342 /* Install correct page table. */
343 write_ptbase(&current->mm);
345 init_idle_task();
346 #endif
347 }
349 static void __init do_initcalls(void)
350 {
351 initcall_t *call;
352 for ( call = &__initcall_start; call < &__initcall_end; call++ )
353 (*call)();
354 }
356 unsigned long pci_mem_start = 0x10000000;
358 static void __init start_of_day(void)
359 {
360 unsigned long low_mem_size;
362 #ifdef MEMORY_GUARD
363 /* Unmap the first page of CPU0's stack. */
364 extern unsigned long cpu0_stack[];
365 memguard_guard_range(cpu0_stack, PAGE_SIZE);
366 #endif
368 open_softirq(NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ, new_tlbflush_clock_period);
370 if ( opt_watchdog )
371 nmi_watchdog = NMI_LOCAL_APIC;
373 sort_exception_tables();
375 arch_do_createdomain(current);
377 /* Tell the PCI layer not to allocate too close to the RAM area.. */
378 low_mem_size = ((max_page << PAGE_SHIFT) + 0xfffff) & ~0xfffff;
379 if ( low_mem_size > pci_mem_start ) pci_mem_start = low_mem_size;
381 identify_cpu(&boot_cpu_data); /* get CPU type info */
382 if ( cpu_has_fxsr ) set_in_cr4(X86_CR4_OSFXSR);
383 if ( cpu_has_xmm ) set_in_cr4(X86_CR4_OSXMMEXCPT);
384 #ifdef CONFIG_SMP
385 if ( opt_ignorebiostables )
386 {
387 opt_nosmp = 1; /* No SMP without configuration */
388 opt_noacpi = 1; /* ACPI will just confuse matters also */
389 }
390 else
391 {
392 find_smp_config();
393 smp_alloc_memory(); /* trampoline which other CPUs jump at */
394 }
395 #endif
396 paging_init(); /* not much here now, but sets up fixmap */
397 if ( !opt_noacpi )
398 acpi_boot_init();
399 #ifdef CONFIG_SMP
400 if ( smp_found_config )
401 get_smp_config();
402 #endif
403 scheduler_init();
404 init_IRQ(); /* installs simple interrupt wrappers. Starts HZ clock. */
405 trap_init();
406 time_init(); /* installs software handler for HZ clock. */
407 init_apic_mappings(); /* make APICs addressable in our pagetables. */
409 arch_init_memory();
411 #ifndef CONFIG_SMP
412 APIC_init_uniprocessor();
413 #else
414 if ( opt_nosmp )
415 APIC_init_uniprocessor();
416 else
417 smp_boot_cpus();
418 /*
419 * Does loads of stuff, including kicking the local
420 * APIC, and the IO APIC after other CPUs are booted.
421 * Each IRQ is preferably handled by IO-APIC, but
422 * fall thru to 8259A if we have to (but slower).
423 */
424 #endif
426 __sti();
428 initialize_keytable(); /* call back handling for key codes */
430 serial_init_stage2();
432 #ifdef XEN_DEBUGGER
433 initialize_pdb(); /* pervasive debugger */
434 #endif
436 if ( !cpu_has_apic )
437 {
438 do_timer_lists_from_pit = 1;
439 if ( smp_num_cpus != 1 )
440 panic("We need local APICs on SMP machines!");
441 }
443 ac_timer_init(); /* init accurate timers */
444 init_xen_time(); /* initialise the time */
445 schedulers_start(); /* start scheduler for each CPU */
447 check_nmi_watchdog();
449 #ifdef CONFIG_PCI
450 pci_init();
451 #endif
452 do_initcalls();
454 #ifdef CONFIG_SMP
455 wait_init_idle = cpu_online_map;
456 clear_bit(smp_processor_id(), &wait_init_idle);
457 smp_threads_ready = 1;
458 smp_commence(); /* Tell other CPUs that state of the world is stable. */
459 while ( wait_init_idle != 0 )
460 {
461 cpu_relax();
462 barrier();
463 }
464 #endif
466 watchdog_on = 1;
467 }
469 void __init __start_xen(multiboot_info_t *mbi)
470 {
471 unsigned char *cmdline;
472 module_t *mod = (module_t *)__va(mbi->mods_addr);
473 void *heap_start;
474 unsigned long firsthole_start, nr_pages;
475 unsigned long dom0_memory_start, dom0_memory_end;
476 unsigned long initial_images_start, initial_images_end;
477 struct e820entry e820_raw[E820MAX];
478 int i, e820_raw_nr = 0, bytes = 0;
480 /* Parse the command-line options. */
481 if ( (mbi->flags & MBI_CMDLINE) && (mbi->cmdline != 0) )
482 cmdline_parse(__va(mbi->cmdline));
484 /* Must do this early -- e.g., spinlocks rely on get_current(). */
485 set_current(&idle0_exec_domain);
487 /* We initialise the serial devices very early so we can get debugging. */
488 serial_init_stage1();
490 init_console();
492 /* Check that we have at least one Multiboot module. */
493 if ( !(mbi->flags & MBI_MODULES) || (mbi->mods_count == 0) )
494 {
495 printk("FATAL ERROR: Require at least one Multiboot module.\n");
496 for ( ; ; ) ;
497 }
499 xenheap_phys_end = opt_xenheap_megabytes << 20;
501 if ( mbi->flags & MBI_MEMMAP )
502 {
503 while ( bytes < mbi->mmap_length )
504 {
505 memory_map_t *map = __va(mbi->mmap_addr + bytes);
506 e820_raw[e820_raw_nr].addr =
507 ((u64)map->base_addr_high << 32) | (u64)map->base_addr_low;
508 e820_raw[e820_raw_nr].size =
509 ((u64)map->length_high << 32) | (u64)map->length_low;
510 e820_raw[e820_raw_nr].type =
511 (map->type > E820_SHARED_PAGE) ? E820_RESERVED : map->type;
512 e820_raw_nr++;
513 bytes += map->size + 4;
514 }
515 }
516 else if ( mbi->flags & MBI_MEMLIMITS )
517 {
518 e820_raw[0].addr = 0;
519 e820_raw[0].size = mbi->mem_lower << 10;
520 e820_raw[0].type = E820_RAM;
521 e820_raw[1].addr = 0x100000;
522 e820_raw[1].size = mbi->mem_upper << 10;
523 e820_raw[1].type = E820_RAM;
524 e820_raw_nr = 2;
525 }
526 else
527 {
528 printk("FATAL ERROR: Bootloader provided no memory information.\n");
529 for ( ; ; ) ;
530 }
532 max_page = init_e820(e820_raw, e820_raw_nr);
534 /* Find the first high-memory RAM hole. */
535 for ( i = 0; i < e820.nr_map; i++ )
536 if ( (e820.map[i].type == E820_RAM) &&
537 (e820.map[i].addr >= 0x100000) )
538 break;
539 firsthole_start = e820.map[i].addr + e820.map[i].size;
541 /* Relocate the Multiboot modules. */
542 initial_images_start = xenheap_phys_end;
543 initial_images_end = initial_images_start +
544 (mod[mbi->mods_count-1].mod_end - mod[0].mod_start);
545 if ( initial_images_end > firsthole_start )
546 {
547 printk("Not enough memory to stash the DOM0 kernel image.\n");
548 for ( ; ; ) ;
549 }
550 #if defined(__i386__)
551 memmove((void *)initial_images_start, /* use low mapping */
552 (void *)mod[0].mod_start, /* use low mapping */
553 mod[mbi->mods_count-1].mod_end - mod[0].mod_start);
554 #elif defined(__x86_64__)
555 memmove(__va(initial_images_start),
556 __va(mod[0].mod_start),
557 mod[mbi->mods_count-1].mod_end - mod[0].mod_start);
558 #endif
560 /* Initialise boot-time allocator with all RAM situated after modules. */
561 heap_start = memguard_init(&_end);
562 heap_start = __va(init_boot_allocator(__pa(heap_start)));
563 nr_pages = 0;
564 for ( i = 0; i < e820.nr_map; i++ )
565 {
566 if ( e820.map[i].type != E820_RAM )
567 continue;
568 nr_pages += e820.map[i].size >> PAGE_SHIFT;
569 if ( (e820.map[i].addr + e820.map[i].size) >= initial_images_end )
570 init_boot_pages((e820.map[i].addr < initial_images_end) ?
571 initial_images_end : e820.map[i].addr,
572 e820.map[i].addr + e820.map[i].size);
573 }
575 printk("System RAM: %luMB (%lukB)\n",
576 nr_pages >> (20 - PAGE_SHIFT),
577 nr_pages << (PAGE_SHIFT - 10));
579 /* Allocate an aligned chunk of RAM for DOM0. */
580 dom0_memory_start = alloc_boot_pages(opt_dom0_mem << 10, 4UL << 20);
581 dom0_memory_end = dom0_memory_start + (opt_dom0_mem << 10);
582 if ( dom0_memory_start == 0 )
583 {
584 printk("Not enough memory for DOM0 memory reservation.\n");
585 for ( ; ; ) ;
586 }
588 init_frametable();
590 end_boot_allocator();
592 init_xenheap_pages(__pa(heap_start), xenheap_phys_end);
593 printk("Xen heap: %luMB (%lukB)\n",
594 (xenheap_phys_end-__pa(heap_start)) >> 20,
595 (xenheap_phys_end-__pa(heap_start)) >> 10);
597 /* Initialise the slab allocator. */
598 xmem_cache_init();
599 xmem_cache_sizes_init(max_page);
601 domain_startofday();
603 start_of_day();
605 grant_table_init();
607 shadow_mode_init();
609 /* Create initial domain 0. */
610 dom0 = do_createdomain(0, 0);
611 if ( dom0 == NULL )
612 panic("Error creating domain 0\n");
614 set_bit(DF_PRIVILEGED, &dom0->d_flags);
616 /* Grab the DOM0 command line. Skip past the image name. */
617 cmdline = (unsigned char *)(mod[0].string ? __va(mod[0].string) : NULL);
618 if ( cmdline != NULL )
619 {
620 while ( *cmdline == ' ' ) cmdline++;
621 if ( (cmdline = strchr(cmdline, ' ')) != NULL )
622 while ( *cmdline == ' ' ) cmdline++;
623 }
625 /*
626 * We're going to setup domain0 using the module(s) that we stashed safely
627 * above our heap. The second module, if present, is an initrd ramdisk.
628 */
629 if ( construct_dom0(dom0, dom0_memory_start, dom0_memory_end,
630 (char *)initial_images_start,
631 mod[0].mod_end-mod[0].mod_start,
632 (mbi->mods_count == 1) ? 0 :
633 (char *)initial_images_start +
634 (mod[1].mod_start-mod[0].mod_start),
635 (mbi->mods_count == 1) ? 0 :
636 mod[mbi->mods_count-1].mod_end - mod[1].mod_start,
637 cmdline) != 0)
638 panic("Could not set up DOM0 guest OS\n");
640 /* The stash space for the initial kernel image can now be freed up. */
641 init_domheap_pages(initial_images_start, initial_images_end);
643 scrub_heap_pages();
645 init_trace_bufs();
647 /* Give up the VGA console if DOM0 is configured to grab it. */
648 console_endboot(cmdline && strstr(cmdline, "tty0"));
650 domain_unpause_by_systemcontroller(current->domain);
651 domain_unpause_by_systemcontroller(dom0);
652 startup_cpu_idle_loop();
653 }