debuggers.hg

view xen/include/asm-x86/config.h @ 3632:fec8b1778268

bitkeeper revision 1.1159.212.60 (41febc4bKKSkh9u-Zes9v2CmBuLZxA)

More bootstrap fixes for x86/64. Next thing to do is sort out the IDT and
get traps.c working; then we can get rid of a bunch of dummy labels from
end of boot/x86_64.S. We're also going to need some kind of entry.S before
we can safely enable interrupts. Also bear in mind that not all of physical
RAM may be mapped (only first 1GB) and no m2p table is yet allocated or
mapped. Plenty to be done!
author kaf24@viper.(none)
date Mon Jan 31 23:16:27 2005 +0000 (2005-01-31)
parents d1e0d9a8fde0
children bf2c38625b39
line source
1 /******************************************************************************
2 * config.h
3 *
4 * A Linux-style configuration list.
5 */
7 #ifndef __X86_CONFIG_H__
8 #define __X86_CONFIG_H__
10 #ifdef __i386__
11 #define CONFIG_VMX 1
12 #endif
14 #define CONFIG_X86 1
16 #define CONFIG_SMP 1
17 #define CONFIG_X86_LOCAL_APIC 1
18 #define CONFIG_X86_GOOD_APIC 1
19 #define CONFIG_X86_IO_APIC 1
20 #define CONFIG_X86_L1_CACHE_SHIFT 5
22 #define CONFIG_ACPI 1
23 #define CONFIG_ACPI_BOOT 1
25 #define CONFIG_PCI 1
26 #define CONFIG_PCI_DIRECT 1
27 #if defined(__i386__)
28 #define CONFIG_PCI_BIOS 1
29 #endif
31 #define CONFIG_IDE 1
32 #define CONFIG_BLK_DEV_IDE 1
33 #define CONFIG_BLK_DEV_IDEDMA 1
34 #define CONFIG_BLK_DEV_IDEPCI 1
35 #define CONFIG_IDEDISK_MULTI_MODE 1
36 #define CONFIG_IDEDISK_STROKE 1
37 #define CONFIG_IDEPCI_SHARE_IRQ 1
38 #define CONFIG_BLK_DEV_IDEDMA_PCI 1
39 #define CONFIG_IDEDMA_PCI_AUTO 1
40 #define CONFIG_IDEDMA_AUTO 1
41 #define CONFIG_IDEDMA_ONLYDISK 1
42 #define CONFIG_BLK_DEV_IDE_MODES 1
43 #define CONFIG_BLK_DEV_PIIX 1
45 #define CONFIG_SCSI 1
46 #define CONFIG_SCSI_LOGGING 1
47 #define CONFIG_BLK_DEV_SD 1
48 #define CONFIG_SD_EXTRA_DEVS 40
49 #define CONFIG_SCSI_MULTI_LUN 1
51 #define CONFIG_XEN_ATTENTION_KEY 1
53 #define HZ 100
55 /*
56 * Just to keep compiler happy.
57 * NB. DO NOT CHANGE SMP_CACHE_BYTES WITHOUT FIXING arch/i386/entry.S!!!
58 * It depends on size of irq_cpustat_t, for example, being 64 bytes. :-)
59 */
60 #define SMP_CACHE_BYTES 64
61 #define NR_CPUS 16
63 /* Linkage for x86 */
64 #define asmlinkage __attribute__((regparm(0)))
65 #define __ALIGN .align 16,0x90
66 #define __ALIGN_STR ".align 16,0x90"
67 #define SYMBOL_NAME_STR(X) #X
68 #define SYMBOL_NAME(X) X
69 #define SYMBOL_NAME_LABEL(X) X##:
70 #ifdef __ASSEMBLY__
71 #define ALIGN __ALIGN
72 #define ALIGN_STR __ALIGN_STR
73 #define ENTRY(name) \
74 .globl SYMBOL_NAME(name); \
75 ALIGN; \
76 SYMBOL_NAME_LABEL(name)
77 #endif
79 #define barrier() __asm__ __volatile__("": : :"memory")
81 #define NR_hypercalls 32
83 #ifndef NDEBUG
84 #define MEMORY_GUARD
85 #endif
87 #ifndef __ASSEMBLY__
88 extern unsigned long _end; /* standard ELF symbol */
89 extern void __out_of_line_bug(int line) __attribute__((noreturn));
90 #define out_of_line_bug() __out_of_line_bug(__LINE__)
91 #endif /* __ASSEMBLY__ */
93 #define BUG() do { \
94 printk("BUG at %s:%d\n", __FILE__, __LINE__); \
95 __asm__ __volatile__("ud2"); \
96 } while (0)
98 #if defined(__x86_64__)
100 #define XENHEAP_DEFAULT_MB (16)
102 #define PML4_ENTRY_BITS 39
103 #define PML4_ENTRY_BYTES (1UL << PML4_ENTRY_BITS)
104 #define PML4_ADDR(_slot) \
105 ((((_slot ## UL) >> 8) * 0xffff000000000000UL) | \
106 (_slot ## UL << PML4_ENTRY_BITS))
108 /*
109 * Memory layout:
110 * 0x0000000000000000 - 0x00007fffffffffff [128TB, 2^47 bytes, PML4:0-255]
111 * Guest-defined use.
112 * 0x0000800000000000 - 0xffff7fffffffffff [16EB]
113 * Inaccessible: current arch only supports 48-bit sign-extended VAs.
114 * 0xffff800000000000 - 0xffff803fffffffff [256GB, 2^38 bytes, PML4:256]
115 * Read-only machine-to-phys translation table (GUEST ACCESSIBLE).
116 * 0xffff804000000000 - 0xffff807fffffffff [256GB, 2^38 bytes, PML4:256]
117 * Reserved for future shared info with the guest OS (GUEST ACCESSIBLE).
118 * 0xffff808000000000 - 0xffff80ffffffffff [512GB, 2^39 bytes, PML4:257]
119 * Read-only guest linear page table (GUEST ACCESSIBLE).
120 * 0xffff810000000000 - 0xffff817fffffffff [512GB, 2^39 bytes, PML4:258]
121 * Guest linear page table.
122 * 0xffff818000000000 - 0xffff81ffffffffff [512GB, 2^39 bytes, PML4:259]
123 * Shadow linear page table.
124 * 0xffff820000000000 - 0xffff827fffffffff [512GB, 2^39 bytes, PML4:260]
125 * Per-domain mappings (e.g., GDT, LDT).
126 * 0xffff828000000000 - 0xffff8283ffffffff [16GB, 2^34 bytes, PML4:261]
127 * Machine-to-phys translation table.
128 * 0xffff828400000000 - 0xffff8287ffffffff [16GB, 2^34 bytes, PML4:261]
129 * Page-frame information array.
130 * 0xffff828800000000 - 0xffff828bffffffff [16GB, 2^34 bytes, PML4:261]
131 * ioremap()/fixmap area.
132 * 0xffff828c00000000 - 0xffff82ffffffffff [464GB, PML4:261]
133 * Reserved for future use.
134 * 0xffff830000000000 - 0xffff83ffffffffff [1TB, 2^40 bytes, PML4:262-263]
135 * 1:1 direct mapping of all physical memory. Xen and its heap live here.
136 * 0xffff840000000000 - 0xffff87ffffffffff [4TB, 2^42 bytes, PML4:264-271]
137 * Reserved for future use.
138 * 0xffff880000000000 - 0xffffffffffffffff [120TB, PML4:272-511]
139 * Guest-defined use.
140 */
143 /* Hypervisor reserves PML4 slots 256 to 271 inclusive. */
144 #define HYPERVISOR_VIRT_START (PML4_ADDR(256))
145 #define HYPERVISOR_VIRT_END (HYPERVISOR_VIRT_START + PML4_ENTRY_BYTES*16)
146 /* Slot 256: read-only guest-accessible machine-to-phys translation table. */
147 #define RO_MPT_VIRT_START (PML4_ADDR(256))
148 #define RO_MPT_VIRT_END (RO_MPT_VIRT_START + PML4_ENTRY_BYTES/2)
149 /* Slot 257: read-only guest-accessible linear page table. */
150 #define RO_LINEAR_PT_VIRT_START (PML4_ADDR(257))
151 #define RO_LINEAR_PT_VIRT_END (RO_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
152 /* Slot 258: linear page table (guest table). */
153 #define LINEAR_PT_VIRT_START (PML4_ADDR(258))
154 #define LINEAR_PT_VIRT_END (LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
155 /* Slot 259: linear page table (shadow table). */
156 #define SH_LINEAR_PT_VIRT_START (PML4_ADDR(259))
157 #define SH_LINEAR_PT_VIRT_END (SH_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
158 /* Slot 260: per-domain mappings. */
159 #define PERDOMAIN_VIRT_START (PML4_ADDR(260))
160 #define PERDOMAIN_VIRT_END (PERDOMAIN_VIRT_START + PML4_ENTRY_BYTES)
161 /* Slot 261: machine-to-phys conversion table (16GB). */
162 #define RDWR_MPT_VIRT_START (PML4_ADDR(261))
163 #define RDWR_MPT_VIRT_END (RDWR_MPT_VIRT_START + (16UL<<30))
164 /* Slot 261: page-frame information array (16GB). */
165 #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
166 #define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + (16UL<<30))
167 /* Slot 261: ioremap()/fixmap area (16GB). */
168 #define IOREMAP_VIRT_START (FRAMETABLE_VIRT_END)
169 #define IOREMAP_VIRT_END (IOREMAP_VIRT_START + (16UL<<30))
170 /* Slot 262-263: A direct 1:1 mapping of all of physical memory. */
171 #define DIRECTMAP_VIRT_START (PML4_ADDR(262))
172 #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + PML4_ENTRY_BYTES*2)
174 #define PGT_base_page_table PGT_l4_page_table
176 #define __HYPERVISOR_CS64 0x0810
177 #define __HYPERVISOR_CS32 0x0808
178 #define __HYPERVISOR_DS 0x0818
180 /* For generic assembly code: use macros to define operation/operand sizes. */
181 #define __OS "q" /* Operation Suffix */
182 #define __OP "r" /* Operand Prefix */
184 #elif defined(__i386__)
186 #define XENHEAP_DEFAULT_MB (12)
187 #define DIRECTMAP_PHYS_END (12*1024*1024)
189 /* Hypervisor owns top 64MB of virtual address space. */
190 #define __HYPERVISOR_VIRT_START 0xFC000000
191 #define HYPERVISOR_VIRT_START (0xFC000000UL)
193 /*
194 * First 4MB are mapped read-only for all. It's for the machine->physical
195 * mapping table (MPT table). The following are virtual addresses.
196 */
197 #define RO_MPT_VIRT_START (HYPERVISOR_VIRT_START)
198 #define RO_MPT_VIRT_END (RO_MPT_VIRT_START + (4*1024*1024))
199 /* Xen heap extends to end of 1:1 direct-mapped memory region. */
200 #define DIRECTMAP_VIRT_START (RO_MPT_VIRT_END)
201 #define DIRECTMAP_VIRT_END (DIRECTMAP_VIRT_START + DIRECTMAP_PHYS_END)
202 /* Machine-to-phys conversion table. */
203 #define RDWR_MPT_VIRT_START (DIRECTMAP_VIRT_END)
204 #define RDWR_MPT_VIRT_END (RDWR_MPT_VIRT_START + (4*1024*1024))
205 /* Variable-length page-frame information array. */
206 #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
207 #define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + (24*1024*1024))
208 /* Next 4MB of virtual address space is used as a linear p.t. mapping. */
209 #define LINEAR_PT_VIRT_START (FRAMETABLE_VIRT_END)
210 #define LINEAR_PT_VIRT_END (LINEAR_PT_VIRT_START + (4*1024*1024))
211 /* Next 4MB of virtual address space is used as a shadow linear p.t. map. */
212 #define SH_LINEAR_PT_VIRT_START (LINEAR_PT_VIRT_END)
213 #define SH_LINEAR_PT_VIRT_END (SH_LINEAR_PT_VIRT_START + (4*1024*1024))
214 /* Next 4MB of virtual address space used for per-domain mappings (eg. GDT). */
215 #define PERDOMAIN_VIRT_START (SH_LINEAR_PT_VIRT_END)
216 #define PERDOMAIN_VIRT_END (PERDOMAIN_VIRT_START + (4*1024*1024))
217 /* Penultimate 4MB of virtual address space used for domain page mappings. */
218 #define MAPCACHE_VIRT_START (PERDOMAIN_VIRT_END)
219 #define MAPCACHE_VIRT_END (MAPCACHE_VIRT_START + (4*1024*1024))
220 /* Final 4MB of virtual address space used for ioremap(). */
221 #define IOREMAP_VIRT_START (MAPCACHE_VIRT_END)
222 #define IOREMAP_VIRT_END (IOREMAP_VIRT_START + (4*1024*1024))
224 #define PGT_base_page_table PGT_l2_page_table
226 #define __HYPERVISOR_CS 0x0808
227 #define __HYPERVISOR_DS 0x0810
229 /* For generic assembly code: use macros to define operation/operand sizes. */
230 #define __OS "l" /* Operation Suffix */
231 #define __OP "e" /* Operand Prefix */
233 #endif /* __i386__ */
235 #ifndef __ASSEMBLY__
236 extern unsigned long xenheap_phys_end; /* user-configurable */
237 #endif
239 #define GDT_VIRT_START(ed) (PERDOMAIN_VIRT_START + ((ed)->eid << PDPT_VCPU_VA_SHIFT))
240 #define GDT_VIRT_END(ed) (GDT_VIRT_START(ed) + (64*1024))
241 #define LDT_VIRT_START(ed) (PERDOMAIN_VIRT_START + (64*1024) + ((ed)->eid << PDPT_VCPU_VA_SHIFT))
242 #define LDT_VIRT_END(ed) (LDT_VIRT_START(ed) + (64*1024))
244 #define PDPT_VCPU_SHIFT 5
245 #define PDPT_VCPU_VA_SHIFT (PDPT_VCPU_SHIFT + PAGE_SHIFT)
247 #if defined(__x86_64__)
248 #define ELFSIZE 64
249 #else
250 #define ELFSIZE 32
251 #endif
253 #endif /* __X86_CONFIG_H__ */