1.1 --- a/xen/arch/ia64/vmx/vmmu.c	Wed Feb 13 10:35:56 2008 -0700
     1.2 +++ b/xen/arch/ia64/vmx/vmmu.c	Wed Feb 13 10:37:18 2008 -0700
     1.3 @@ -51,37 +51,6 @@ static void __init parse_vhpt_size(char 
     1.4  custom_param("vti_vtlb_size", parse_vtlb_size);
     1.5  custom_param("vti_vhpt_size", parse_vhpt_size);
     1.6  
     1.7 -/*
     1.8 - * Get the machine page frame number in 16KB unit
     1.9 - * Input:
    1.10 - *  d: 
    1.11 - */
    1.12 -static u64 get_mfn(struct domain *d, u64 gpfn)
    1.13 -{
    1.14 -//    struct domain *d;
    1.15 -    u64    xen_gppn, xen_mppn, mpfn;
    1.16 -/*
    1.17 -    if ( domid == DOMID_SELF ) {
    1.18 -        d = current->domain;
    1.19 -    }
    1.20 -    else {
    1.21 -        d = get_domain_by_id(domid);
    1.22 -    }
    1.23 - */
    1.24 -    xen_gppn = arch_to_xen_ppn(gpfn);
    1.25 -    xen_mppn = gmfn_to_mfn(d, xen_gppn);
    1.26 -/*
    1.27 -    for (i=0; i<pages; i++) {
    1.28 -        if ( gmfn_to_mfn(d, gpfn+i) == INVALID_MFN ) {
    1.29 -            return INVALID_MFN;
    1.30 -        }
    1.31 -    }
    1.32 -*/
    1.33 -    mpfn= xen_to_arch_ppn(xen_mppn);
    1.34 -    mpfn = mpfn | (((1UL <<(PAGE_SHIFT-ARCH_PAGE_SHIFT))-1)&gpfn);
    1.35 -    return mpfn;
    1.36 -    
    1.37 -}
    1.38  
    1.39  static int init_domain_vhpt(struct vcpu *v)
    1.40  {
    1.41 @@ -131,51 +100,6 @@ void free_domain_tlb(struct vcpu *v)
    1.42      free_domain_vhpt(v);
    1.43  }
    1.44  
    1.45 -/*
    1.46 - * Insert guest TLB to machine TLB.
    1.47 - *  data:   In TLB format
    1.48 - */
    1.49 -void machine_tlb_insert(struct vcpu *v, thash_data_t *tlb)
    1.50 -{
    1.51 -    u64     psr;
    1.52 -    thash_data_t    mtlb;
    1.53 -    unsigned int    cl = tlb->cl;
    1.54 -    unsigned long mtlb_ppn;
    1.55 -    mtlb.ifa = tlb->vadr;
    1.56 -    mtlb.itir = tlb->itir & ~ITIR_RV_MASK;
    1.57 -    mtlb.page_flags = tlb->page_flags & ~PAGE_FLAGS_RV_MASK;
    1.58 -    mtlb.ppn = get_mfn(v->domain, tlb->ppn);
    1.59 -    mtlb_ppn=mtlb.ppn;
    1.60 -
    1.61 -#if 0
    1.62 -    if (mtlb_ppn == INVALID_MFN)
    1.63 -        panic_domain(vcpu_regs(v), "Machine tlb insert with invalid mfn number.\n");
    1.64 -#endif
    1.65 -
    1.66 -    psr = ia64_clear_ic();
    1.67 -    if ( cl == ISIDE_TLB ) {
    1.68 -        ia64_itc(1, mtlb.ifa, mtlb.page_flags, IA64_ITIR_PS_KEY(mtlb.ps, 0));
    1.69 -    }
    1.70 -    else {
    1.71 -        ia64_itc(2, mtlb.ifa, mtlb.page_flags, IA64_ITIR_PS_KEY(mtlb.ps, 0));
    1.72 -    }
    1.73 -    ia64_set_psr(psr);
    1.74 -    ia64_srlz_i();
    1.75 -    return;
    1.76 -}
    1.77 -
    1.78 -/*
    1.79 - *  Purge machine tlb.
    1.80 - *  INPUT
    1.81 - *      rr:     guest rr.
    1.82 - *      va:     only bits 0:60 is valid
    1.83 - *      size:   bits format (1<<size) for the address range to purge.
    1.84 - *
    1.85 - */
    1.86 -void machine_tlb_purge(u64 va, u64 ps)
    1.87 -{
    1.88 -    ia64_ptcl(va, ps << 2);
    1.89 -}
    1.90  
    1.91  int vhpt_enabled(VCPU *vcpu, uint64_t vadr, vhpt_ref_t ref)
    1.92  {

     2.1 --- a/xen/include/asm-ia64/vmmu.h	Wed Feb 13 10:35:56 2008 -0700
     2.2 +++ b/xen/include/asm-ia64/vmmu.h	Wed Feb 13 10:37:18 2008 -0700
     2.3 @@ -50,6 +50,10 @@ enum {
     2.4  #define VTLB_PTE_IO         (1UL<<VTLB_PTE_IO_BIT)
     2.5  #define VTLB_PTE_P         (1UL<<VTLB_PTE_P_BIT)
     2.6  
     2.7 +#define ITIR_RV_MASK            (((1UL<<32)-1)<<32 | 0x3)
     2.8 +#define PAGE_FLAGS_RV_MASK      (0x2 | (0x3UL<<50)|(((1UL<<11)-1)<<53))
     2.9 +#define PAGE_FLAGS_AR_PL_MASK   ((0x7UL<<9)|(0x3UL<<7))
    2.10 +
    2.11  #ifndef __ASSEMBLY__
    2.12  typedef struct thash_data {
    2.13      union {
    2.14 @@ -126,20 +130,6 @@ typedef struct thash_data {
    2.15  #define INVALID_ENTRY(hcb, hdata)       INVALID_VHPT(hdata)
    2.16  
    2.17  
    2.18 -/*
    2.19 - * Architecture ppn is in 4KB unit while XEN
    2.20 - * page may be different(1<<PAGE_SHIFT).
    2.21 - */
    2.22 -static inline u64 arch_to_xen_ppn(u64 appn)
    2.23 -{
    2.24 -    return (appn >>(PAGE_SHIFT-ARCH_PAGE_SHIFT));
    2.25 -}
    2.26 -
    2.27 -static inline u64 xen_to_arch_ppn(u64 xppn)
    2.28 -{
    2.29 -    return (xppn <<(PAGE_SHIFT- ARCH_PAGE_SHIFT));
    2.30 -}
    2.31 -
    2.32  typedef struct thash_cb {
    2.33      /* THASH base information */
    2.34      thash_data_t    *hash; // hash table pointer, aligned at thash_sz.
    2.35 @@ -202,17 +192,9 @@ extern void thash_purge_all(struct vcpu 
    2.36  extern thash_data_t *vtlb_lookup(struct vcpu *v,u64 va,int is_data);
    2.37  
    2.38  
    2.39 -#define   ITIR_RV_MASK      (((1UL<<32)-1)<<32 | 0x3)
    2.40 -#define   PAGE_FLAGS_RV_MASK    (0x2 | (0x3UL<<50)|(((1UL<<11)-1)<<53))
    2.41 -#define   PAGE_FLAGS_AR_PL_MASK ((0x7UL<<9)|(0x3UL<<7))
    2.42 -extern u64 machine_ttag(PTA pta, u64 va);
    2.43 -extern u64 machine_thash(PTA pta, u64 va);
    2.44 -extern void machine_tlb_insert(struct vcpu *v, thash_data_t *tlb);
    2.45 -extern ia64_rr vmmu_get_rr(struct vcpu *vcpu, u64 va);
    2.46  extern int init_domain_tlb(struct vcpu *v);
    2.47  extern void free_domain_tlb(struct vcpu *v);
    2.48  extern thash_data_t * vhpt_lookup(u64 va);
    2.49 -extern void machine_tlb_purge(u64 va, u64 ps);
    2.50  extern unsigned long fetch_code(struct vcpu *vcpu, u64 gip, IA64_BUNDLE *pbundle);
    2.51  extern void emulate_io_inst(struct vcpu *vcpu, u64 padr, u64 ma);
    2.52  extern int vhpt_enabled(struct vcpu *vcpu, uint64_t vadr, vhpt_ref_t ref);
    2.53 @@ -222,6 +204,19 @@ extern void thash_vhpt_insert(struct vcp
    2.54  extern u64 guest_vhpt_lookup(u64 iha, u64 *pte);
    2.55  extern int vhpt_access_rights_fixup(struct vcpu *v, u64 ifa, int is_data);
    2.56  
    2.57 +/*
    2.58 + *  Purge machine tlb.
    2.59 + *  INPUT
    2.60 + *      rr:     guest rr.
    2.61 + *      va:     only bits 0:60 is valid
    2.62 + *      size:   bits format (1<<size) for the address range to purge.
    2.63 + *
    2.64 + */
    2.65 +static inline void machine_tlb_purge(u64 va, u64 ps)
    2.66 +{
    2.67 +    ia64_ptcl(va, ps << 2);
    2.68 +}
    2.69 +
    2.70  static inline void vmx_vcpu_set_tr (thash_data_t *trp, u64 pte, u64 itir, u64 va, u64 rid)
    2.71  {
    2.72      trp->page_flags = pte;