debuggers.hg
changeset 18981:0af9fbf3f053
x86: Do not restrict 32-bit EPT to 4GB.
Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
author | Keir Fraser <keir.fraser@citrix.com> |
---|---|
date | Mon Dec 29 13:32:32 2008 +0000 (2008-12-29) |
parents | c54d6f871de8 |
children | 4035ea96ae2f |
files | xen/arch/x86/mm/p2m.c |
line diff
1.1 --- a/xen/arch/x86/mm/p2m.c Mon Dec 29 13:30:14 2008 +0000 1.2 +++ b/xen/arch/x86/mm/p2m.c Mon Dec 29 13:32:32 2008 +0000 1.3 @@ -935,11 +935,12 @@ guest_physmap_add_entry(struct domain *d 1.4 1.5 #if CONFIG_PAGING_LEVELS == 3 1.6 /* 1.7 - * 32bit PAE nested paging does not support over 4GB guest due to 1.8 + * 32bit AMD nested paging does not support over 4GB guest due to 1.9 * hardware translation limit. This limitation is checked by comparing 1.10 * gfn with 0xfffffUL. 1.11 */ 1.12 - if ( paging_mode_hap(d) && (gfn > 0xfffffUL) ) 1.13 + if ( paging_mode_hap(d) && (gfn > 0xfffffUL) && 1.14 + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) ) 1.15 { 1.16 if ( !test_and_set_bool(d->arch.hvm_domain.svm.npt_4gb_warning) ) 1.17 dprintk(XENLOG_WARNING, "Dom%d failed to populate memory beyond"