debuggers.hg

changeset 22279:1a3b8b84e58b

vmx: add missing VMCS definition

This patch add back some missing VMCS defintions as preparation for
nested VMX.

Signed-off-by: Qing He <qing.he@intel.com>
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
author Keir Fraser <keir@xen.org>
date Mon Oct 11 09:03:18 2010 +0100 (2010-10-11)
parents eb964c4b4f31
children fbce8e403470
files xen/include/asm-x86/hvm/vmx/vmcs.h xen/include/asm-x86/msr-index.h
line diff
     1.1 --- a/xen/include/asm-x86/hvm/vmx/vmcs.h	Mon Oct 11 09:02:36 2010 +0100
     1.2 +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h	Mon Oct 11 09:03:18 2010 +0100
     1.3 @@ -156,18 +156,23 @@ extern u32 vmx_cpu_based_exec_control;
     1.4  #define PIN_BASED_EXT_INTR_MASK         0x00000001
     1.5  #define PIN_BASED_NMI_EXITING           0x00000008
     1.6  #define PIN_BASED_VIRTUAL_NMIS          0x00000020
     1.7 +#define PIN_BASED_PREEMPT_TIMER         0x00000040
     1.8  extern u32 vmx_pin_based_exec_control;
     1.9  
    1.10  #define VM_EXIT_IA32E_MODE              0x00000200
    1.11  #define VM_EXIT_ACK_INTR_ON_EXIT        0x00008000
    1.12  #define VM_EXIT_SAVE_GUEST_PAT          0x00040000
    1.13  #define VM_EXIT_LOAD_HOST_PAT           0x00080000
    1.14 +#define VM_EXIT_SAVE_GUEST_EFER         0x00100000
    1.15 +#define VM_EXIT_LOAD_HOST_EFER          0x00200000
    1.16 +#define VM_EXIT_SAVE_PREEMPT_TIMER      0x00400000
    1.17  extern u32 vmx_vmexit_control;
    1.18  
    1.19  #define VM_ENTRY_IA32E_MODE             0x00000200
    1.20  #define VM_ENTRY_SMM                    0x00000400
    1.21  #define VM_ENTRY_DEACT_DUAL_MONITOR     0x00000800
    1.22  #define VM_ENTRY_LOAD_GUEST_PAT         0x00004000
    1.23 +#define VM_ENTRY_LOAD_GUEST_EFER        0x00008000
    1.24  extern u32 vmx_vmentry_control;
    1.25  
    1.26  #define SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001
     2.1 --- a/xen/include/asm-x86/msr-index.h	Mon Oct 11 09:02:36 2010 +0100
     2.2 +++ b/xen/include/asm-x86/msr-index.h	Mon Oct 11 09:03:18 2010 +0100
     2.3 @@ -172,6 +172,7 @@
     2.4  #define MSR_IA32_VMX_CR0_FIXED1                 0x487
     2.5  #define MSR_IA32_VMX_CR4_FIXED0                 0x488
     2.6  #define MSR_IA32_VMX_CR4_FIXED1                 0x489
     2.7 +#define MSR_IA32_VMX_VMCS_ENUM                  0x48a
     2.8  #define MSR_IA32_VMX_PROCBASED_CTLS2            0x48b
     2.9  #define MSR_IA32_VMX_EPT_VPID_CAP               0x48c
    2.10  #define MSR_IA32_VMX_TRUE_PINBASED_CTLS         0x48d