debuggers.hg
changeset 20999:220e4996f0e8
Mask AMD CPUID masks in software before writing them to the MSRs
Mask AMD CPUID masks in software before writing them to the MSRs.
Setting bits in the CPUID mask MSR that are not set in the unmasked
CPUID response can cause those bits to be set in the masked response.
Avoid that by explicitly masking in software.
Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
Mask AMD CPUID masks in software before writing them to the MSRs.
Setting bits in the CPUID mask MSR that are not set in the unmasked
CPUID response can cause those bits to be set in the masked response.
Avoid that by explicitly masking in software.
Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
| author | Keir Fraser <keir.fraser@citrix.com> |
|---|---|
| date | Wed Feb 17 12:05:45 2010 +0000 (2010-02-17) |
| parents | 50ea24db1f88 |
| children | b4041e7bbe1b |
| files | xen/arch/x86/cpu/amd.c |
line diff
1.1 --- a/xen/arch/x86/cpu/amd.c Wed Feb 17 12:04:50 2010 +0000 1.2 +++ b/xen/arch/x86/cpu/amd.c Wed Feb 17 12:05:45 2010 +0000 1.3 @@ -130,6 +130,14 @@ static void __devinit set_cpuidmask(stru 1.4 return; 1.5 } 1.6 1.7 + /* Setting bits in the CPUID mask MSR that are not set in the 1.8 + * unmasked CPUID response can cause those bits to be set in the 1.9 + * masked response. Avoid that by explicitly masking in software. */ 1.10 + feat_ecx &= cpuid_ecx(0x00000001); 1.11 + feat_edx &= cpuid_edx(0x00000001); 1.12 + extfeat_ecx &= cpuid_ecx(0x80000001); 1.13 + extfeat_edx &= cpuid_edx(0x80000001); 1.14 + 1.15 status = set_mask; 1.16 printk("Writing CPUID feature mask ECX:EDX -> %08Xh:%08Xh\n", 1.17 feat_ecx, feat_edx);