debuggers.hg

changeset 22861:4785c70c2b6d

x86: blacklist new AMD CPUID bits for PV domains

there are some new CPUID bits (and leaves) which Dom0 and PV domains
should not see to avoid trouble, since we don't emulate the features.
The most prominent one is a topology leaf, which contains information
specific to the physical CPU, not the virtual one. To avoid confusion
(and possibly crashes) due to a confused Dom0 scheduler simply disable
these bits.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Keir Fraser <keir@xen.org>
author Keir Fraser <keir@xen.org>
date Wed Jan 26 08:45:40 2011 +0000 (2011-01-26)
parents b9017fdaad4d
children e7f44fb4ecc3
files tools/libxc/xc_cpuid_x86.c xen/arch/x86/traps.c
line diff
     1.1 --- a/tools/libxc/xc_cpuid_x86.c	Wed Jan 26 08:35:24 2011 +0000
     1.2 +++ b/tools/libxc/xc_cpuid_x86.c	Wed Jan 26 08:45:40 2011 +0000
     1.3 @@ -427,12 +427,17 @@ static void xc_cpuid_pv_policy(
     1.4          clear_bit(X86_FEATURE_IBS, regs[2]);
     1.5          clear_bit(X86_FEATURE_SKINIT, regs[2]);
     1.6          clear_bit(X86_FEATURE_WDT, regs[2]);
     1.7 +        clear_bit(X86_FEATURE_LWP, regs[2]);
     1.8 +        clear_bit(X86_FEATURE_NODEID_MSR, regs[2]);
     1.9 +        clear_bit(X86_FEATURE_TOPOEXT, regs[2]);
    1.10          break;
    1.11      case 5: /* MONITOR/MWAIT */
    1.12      case 0xa: /* Architectural Performance Monitor Features */
    1.13      case 0xd: /* XSAVE */
    1.14      case 0x8000000a: /* SVM revision and features */
    1.15      case 0x8000001b: /* Instruction Based Sampling */
    1.16 +    case 0x8000001c: /* Light Weight Profiling */
    1.17 +    case 0x8000001e: /* Extended topology reporting */
    1.18          regs[0] = regs[1] = regs[2] = regs[3] = 0;
    1.19          break;
    1.20      }
     2.1 --- a/xen/arch/x86/traps.c	Wed Jan 26 08:35:24 2011 +0000
     2.2 +++ b/xen/arch/x86/traps.c	Wed Jan 26 08:45:40 2011 +0000
     2.3 @@ -802,11 +802,16 @@ static void pv_cpuid(struct cpu_user_reg
     2.4          __clear_bit(X86_FEATURE_IBS % 32, &c);
     2.5          __clear_bit(X86_FEATURE_SKINIT % 32, &c);
     2.6          __clear_bit(X86_FEATURE_WDT % 32, &c);
     2.7 +        __clear_bit(X86_FEATURE_LWP % 32, &c);
     2.8 +        __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
     2.9 +        __clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
    2.10          break;
    2.11      case 5: /* MONITOR/MWAIT */
    2.12      case 0xa: /* Architectural Performance Monitor Features */
    2.13      case 0x8000000a: /* SVM revision and features */
    2.14      case 0x8000001b: /* Instruction Based Sampling */
    2.15 +    case 0x8000001c: /* Light Weight Profiling */
    2.16 +    case 0x8000001e: /* Extended topology reporting */
    2.17          a = b = c = d = 0;
    2.18          break;
    2.19      default: