1.1 --- a/xen/arch/x86/acpi/cpu_idle.c	Thu Jun 12 17:01:31 2008 +0100
     1.2 +++ b/xen/arch/x86/acpi/cpu_idle.c	Thu Jun 12 17:17:44 2008 +0100
     1.3 @@ -724,8 +724,6 @@ static void acpi_processor_power_init_bm
     1.4  static int check_cx(struct acpi_processor_power *power, xen_processor_cx_t *cx)
     1.5  {
     1.6      static int bm_check_flag;
     1.7 -    if ( cx == NULL )
     1.8 -        return -EINVAL;
     1.9  
    1.10      switch ( cx->reg.space_id )
    1.11      {
    1.12 @@ -743,7 +741,7 @@ static int check_cx(struct acpi_processo
    1.13  
    1.14              /* assume all logical cpu has the same support for mwait */
    1.15              if ( acpi_processor_ffh_cstate_probe(cx) )
    1.16 -                return -EFAULT;
    1.17 +                return -EINVAL;
    1.18          }
    1.19          break;
    1.20  
    1.21 @@ -753,6 +751,10 @@ static int check_cx(struct acpi_processo
    1.22  
    1.23      if ( cx->type == ACPI_STATE_C3 )
    1.24      {
    1.25 +        /* We must be able to use HPET in place of LAPIC timers. */
    1.26 +        if ( !hpet_broadcast_is_available() )
    1.27 +            return -EINVAL;
    1.28 +
    1.29          /* All the logic here assumes flags.bm_check is same across all CPUs */
    1.30          if ( !bm_check_flag )
    1.31          {
    1.32 @@ -774,7 +776,7 @@ static int check_cx(struct acpi_processo
    1.33                      /* bus mastering control is necessary */
    1.34                      ACPI_DEBUG_PRINT((ACPI_DB_INFO,
    1.35                          "C3 support requires BM control\n"));
    1.36 -                    return -1;
    1.37 +                    return -EINVAL;
    1.38                  }
    1.39                  else
    1.40                  {
    1.41 @@ -795,7 +797,7 @@ static int check_cx(struct acpi_processo
    1.42                  ACPI_DEBUG_PRINT((ACPI_DB_INFO,
    1.43                            "Cache invalidation should work properly"
    1.44                            " for C3 to be enabled on SMP systems\n"));
    1.45 -                return -1;
    1.46 +                return -EINVAL;
    1.47              }
    1.48              acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
    1.49          }
    1.50 @@ -804,14 +806,14 @@ static int check_cx(struct acpi_processo
    1.51      return 0;
    1.52  }
    1.53  
    1.54 -static int set_cx(struct acpi_processor_power *acpi_power,
    1.55 -                  xen_processor_cx_t *xen_cx)
    1.56 +static void set_cx(
    1.57 +    struct acpi_processor_power *acpi_power,
    1.58 +    xen_processor_cx_t *xen_cx)
    1.59  {
    1.60      struct acpi_processor_cx *cx;
    1.61  
    1.62 -    /* skip unsupported acpi cstate */
    1.63 -    if ( check_cx(acpi_power, xen_cx) )
    1.64 -        return -EFAULT;
    1.65 +    if ( check_cx(acpi_power, xen_cx) != 0 )
    1.66 +        return;
    1.67  
    1.68      cx = &acpi_power->states[xen_cx->type];
    1.69      if ( !cx->valid )
    1.70 @@ -825,8 +827,6 @@ static int set_cx(struct acpi_processor_
    1.71      cx->power    = xen_cx->power;
    1.72      
    1.73      cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
    1.74 -
    1.75 -    return 0;   
    1.76  }
    1.77  
    1.78  int get_cpu_id(u8 acpi_id)

     2.1 --- a/xen/arch/x86/hpet.c	Thu Jun 12 17:01:31 2008 +0100
     2.2 +++ b/xen/arch/x86/hpet.c	Thu Jun 12 17:17:44 2008 +0100
     2.3 @@ -235,6 +235,11 @@ void hpet_broadcast_exit(void)
     2.4          reprogram_timer(per_cpu(timer_deadline, cpu));
     2.5  }
     2.6  
     2.7 +int hpet_broadcast_is_available(void)
     2.8 +{
     2.9 +    return (hpet_event.event_handler == handle_hpet_broadcast);
    2.10 +}
    2.11 +
    2.12  int hpet_legacy_irq_tick(void)
    2.13  {
    2.14      if ( !hpet_event.event_handler )

     3.1 --- a/xen/arch/x86/time.c	Thu Jun 12 17:01:31 2008 +0100
     3.2 +++ b/xen/arch/x86/time.c	Thu Jun 12 17:17:44 2008 +0100
     3.3 @@ -1012,7 +1012,7 @@ static int disable_pit_irq(void)
     3.4           * If we do not rely on PIT CH0 then we can use HPET for one-shot
     3.5           * timer emulation when entering deep C states.
     3.6           */
     3.7 -        hpet_broadcast_init();
     3.8 +        /*hpet_broadcast_init(); XXX dom0 may rely on RTC interrupt delivery */
     3.9      }
    3.10  
    3.11      return 0;

     4.1 --- a/xen/include/asm-x86/hpet.h	Thu Jun 12 17:01:31 2008 +0100
     4.2 +++ b/xen/include/asm-x86/hpet.h	Thu Jun 12 17:17:44 2008 +0100
     4.3 @@ -68,5 +68,6 @@ int hpet_legacy_irq_tick(void);
     4.4  void hpet_broadcast_init(void);
     4.5  void hpet_broadcast_enter(void);
     4.6  void hpet_broadcast_exit(void);
     4.7 +int hpet_broadcast_is_available(void);
     4.8  
     4.9  #endif /* __X86_HPET_H__ */