debuggers.hg

changeset 20869:89907dab1aef

x86: Clean up TSC_RELIABLE handling after 20705:a74aca4b9386

Set the feature by default and disable it if we can detect TSC warp,
rather than leaving the feature cleared and setting it if we happen
not to detect TSC warp.

This way round fixes dom0 kernel boot for Masaki Kanno.

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Jan 19 10:56:59 2010 +0000 (2010-01-19)
parents b684d9e57b8f
children 07f95839e431
files xen/arch/x86/cpu/amd.c xen/arch/x86/cpu/intel.c xen/arch/x86/time.c xen/include/asm-x86/cpufeature.h
line diff
     1.1 --- a/xen/arch/x86/cpu/amd.c	Tue Jan 19 09:40:30 2010 +0000
     1.2 +++ b/xen/arch/x86/cpu/amd.c	Tue Jan 19 10:56:59 2010 +0000
     1.3 @@ -465,6 +465,8 @@ static void __devinit init_amd(struct cp
     1.4  		if (c->x86_power & (1<<8)) {
     1.5  			set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
     1.6  			set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
     1.7 +			if (c->x86 != 0x11)
     1.8 +				set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
     1.9  		}
    1.10  	}
    1.11  
     2.1 --- a/xen/arch/x86/cpu/intel.c	Tue Jan 19 09:40:30 2010 +0000
     2.2 +++ b/xen/arch/x86/cpu/intel.c	Tue Jan 19 10:56:59 2010 +0000
     2.3 @@ -212,6 +212,7 @@ static void __devinit init_intel(struct 
     2.4  	if (cpuid_edx(0x80000007) & (1u<<8)) {
     2.5  		set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
     2.6  		set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability);
     2.7 +		set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability);
     2.8  	}
     2.9  	if ((c->cpuid_level >= 0x00000006) &&
    2.10  	    (cpuid_eax(0x00000006) & (1u<<2)))
     3.1 --- a/xen/arch/x86/time.c	Tue Jan 19 09:40:30 2010 +0000
     3.2 +++ b/xen/arch/x86/time.c	Tue Jan 19 10:56:59 2010 +0000
     3.3 @@ -1372,7 +1372,18 @@ void init_percpu_time(void)
     3.4  /* Late init function (after all CPUs are booted). */
     3.5  int __init init_xen_time(void)
     3.6  {
     3.7 -    extern unsigned int max_cstate;
     3.8 +    if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
     3.9 +    {
    3.10 +        /*
    3.11 +         * Sadly, despite processor vendors' best design guidance efforts, on
    3.12 +         * some systems, cpus may come out of reset improperly synchronized.
    3.13 +         * So we must verify there is no warp and we can't do that until all
    3.14 +         * CPUs are booted.
    3.15 +         */
    3.16 +        tsc_check_reliability();
    3.17 +        if ( tsc_max_warp )
    3.18 +            setup_clear_cpu_cap(X86_FEATURE_TSC_RELIABLE);
    3.19 +    }
    3.20  
    3.21      /* If we have constant-rate TSCs then scale factor can be shared. */
    3.22      if ( boot_cpu_has(X86_FEATURE_CONSTANT_TSC) )
    3.23 @@ -1380,22 +1391,10 @@ int __init init_xen_time(void)
    3.24          int cpu;
    3.25          for_each_possible_cpu ( cpu )
    3.26              per_cpu(cpu_time, cpu).tsc_scale = per_cpu(cpu_time, 0).tsc_scale;
    3.27 +        /* If TSCs are not marked as 'reliable', re-sync during rendezvous. */
    3.28 +        if ( !boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
    3.29 +            time_calibration_rendezvous_fn = time_calibration_tsc_rendezvous;
    3.30      }
    3.31 -    if ( (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && max_cstate <= 2) ||
    3.32 -         boot_cpu_has(X86_FEATURE_NONSTOP_TSC) )
    3.33 -    {
    3.34 -        /*
    3.35 -         * Sadly, despite processor vendors' best design guidance efforts,
    3.36 -         * on some systems, cpus may come out of reset improperly
    3.37 -         * synchronized.  So we must verify there is no warp and we
    3.38 -         * can't do that until all CPUs are booted
    3.39 -         */
    3.40 -        tsc_check_reliability();
    3.41 -        if ( tsc_max_warp == 0 )
    3.42 -            set_boot_cpu_bit(X86_FEATURE_TSC_RELIABLE);
    3.43 -    }
    3.44 -    if ( !boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
    3.45 -            time_calibration_rendezvous_fn = time_calibration_tsc_rendezvous;
    3.46  
    3.47      open_softirq(TIME_CALIBRATE_SOFTIRQ, local_time_calibration);
    3.48  
    3.49 @@ -1630,11 +1629,7 @@ void pv_soft_rdtsc(struct vcpu *v, struc
    3.50  
    3.51  int host_tsc_is_safe(void)
    3.52  {
    3.53 -    if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
    3.54 -        return 1;
    3.55 -    if ( num_online_cpus() == 1 )
    3.56 -        return 1;
    3.57 -    return 0;
    3.58 +    return boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || (num_online_cpus() == 1);
    3.59  }
    3.60  
    3.61  void cpuid_time_leaf(uint32_t sub_idx, uint32_t *eax, uint32_t *ebx,
     4.1 --- a/xen/include/asm-x86/cpufeature.h	Tue Jan 19 09:40:30 2010 +0000
     4.2 +++ b/xen/include/asm-x86/cpufeature.h	Tue Jan 19 10:56:59 2010 +0000
     4.3 @@ -132,7 +132,6 @@
     4.4  
     4.5  #define cpu_has(c, bit)		test_bit(bit, (c)->x86_capability)
     4.6  #define boot_cpu_has(bit)	test_bit(bit, boot_cpu_data.x86_capability)
     4.7 -#define set_boot_cpu_bit(bit)	set_bit(bit, boot_cpu_data.x86_capability)
     4.8  
     4.9  #ifdef __i386__
    4.10  #define cpu_has_vme		boot_cpu_has(X86_FEATURE_VME)