1.1 --- a/xen/arch/x86/acpi/boot.c	Thu May 01 10:40:58 2008 +0100
     1.2 +++ b/xen/arch/x86/acpi/boot.c	Thu May 01 10:41:51 2008 +0100
     1.3 @@ -462,6 +462,20 @@ bad:
     1.4  }
     1.5  #endif
     1.6  
     1.7 +static void __init
     1.8 +acpi_fadt_parse_reg(struct acpi_table_fadt *fadt)
     1.9 +{
    1.10 +	memcpy(&acpi_gbl_FADT, fadt, sizeof(acpi_gbl_FADT));
    1.11 +
    1.12 +	memcpy(&acpi_gbl_xpm1a_enable, &(fadt->xpm1a_event_block),
    1.13 +		sizeof(acpi_gbl_xpm1a_enable));
    1.14 +	memcpy(&acpi_gbl_xpm1b_enable, &(fadt->xpm1b_event_block),
    1.15 +		sizeof(acpi_gbl_xpm1b_enable));
    1.16 +
    1.17 +	acpi_gbl_xpm1a_enable.address += 2;
    1.18 +	acpi_gbl_xpm1b_enable.address += 2;
    1.19 +}
    1.20 +
    1.21  static int __init acpi_parse_fadt(unsigned long phys, unsigned long size)
    1.22  {
    1.23  	struct acpi_table_fadt *fadt = NULL;
    1.24 @@ -513,6 +527,8 @@ static int __init acpi_parse_fadt(unsign
    1.25  	acpi_fadt_parse_sleep_info(fadt);
    1.26  #endif
    1.27  
    1.28 +	acpi_fadt_parse_reg(fadt);
    1.29 +
    1.30  	return 0;
    1.31  }
    1.32  

     2.1 --- a/xen/drivers/acpi/Makefile	Thu May 01 10:40:58 2008 +0100
     2.2 +++ b/xen/drivers/acpi/Makefile	Thu May 01 10:41:51 2008 +0100
     2.3 @@ -3,3 +3,4 @@ obj-y += numa.o
     2.4  obj-y += osl.o
     2.5  
     2.6  obj-$(x86) += hwregs.o
     2.7 +obj-$(x86) += utglobal.o

     3.1 --- a/xen/drivers/acpi/hwregs.c	Thu May 01 10:40:58 2008 +0100
     3.2 +++ b/xen/drivers/acpi/hwregs.c	Thu May 01 10:41:51 2008 +0100
     3.3 @@ -53,6 +53,241 @@
     3.4  #define _COMPONENT          ACPI_HARDWARE
     3.5  ACPI_MODULE_NAME("hwregs")
     3.6  
     3.7 +/*******************************************************************************
     3.8 + *
     3.9 + * FUNCTION:    acpi_hw_get_register_bit_mask
    3.10 + *
    3.11 + * PARAMETERS:  register_id         - Index of ACPI Register to access
    3.12 + *
    3.13 + * RETURN:      The bitmask to be used when accessing the register
    3.14 + *
    3.15 + * DESCRIPTION: Map register_id into a register bitmask.
    3.16 + *
    3.17 + ******************************************************************************/
    3.18 +struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
    3.19 +{
    3.20 +	ACPI_FUNCTION_ENTRY();
    3.21 +
    3.22 +	if (register_id > ACPI_BITREG_MAX) {
    3.23 +		ACPI_DEBUG_PRINT((AE_INFO, "Invalid BitRegister ID: %X",
    3.24 +			    register_id));
    3.25 +		return (NULL);
    3.26 +	}
    3.27 +
    3.28 +	return (&acpi_gbl_bit_register_info[register_id]);
    3.29 +}
    3.30 +
    3.31 +/*******************************************************************************
    3.32 + *
    3.33 + * FUNCTION:    acpi_get_register
    3.34 + *
    3.35 + * PARAMETERS:  register_id     - ID of ACPI bit_register to access
    3.36 + *              return_value    - Value that was read from the register
    3.37 + *
    3.38 + * RETURN:      Status and the value read from specified Register. Value
    3.39 + *              returned is normalized to bit0 (is shifted all the way right)
    3.40 + *
    3.41 + * DESCRIPTION: ACPI bit_register read function.
    3.42 + *
    3.43 + ******************************************************************************/
    3.44 +
    3.45 +acpi_status acpi_get_register_unlocked(u32 register_id, u32 * return_value)
    3.46 +{
    3.47 +	u32 register_value = 0;
    3.48 +	struct acpi_bit_register_info *bit_reg_info;
    3.49 +	acpi_status status;
    3.50 +
    3.51 +	ACPI_FUNCTION_TRACE(acpi_get_register);
    3.52 +
    3.53 +	/* Get the info structure corresponding to the requested ACPI Register */
    3.54 +
    3.55 +	bit_reg_info = acpi_hw_get_bit_register_info(register_id);
    3.56 +	if (!bit_reg_info) {
    3.57 +		return_ACPI_STATUS(AE_BAD_PARAMETER);
    3.58 +	}
    3.59 +
    3.60 +	/* Read from the register */
    3.61 +
    3.62 +	status = acpi_hw_register_read(bit_reg_info->parent_register,
    3.63 +				       &register_value);
    3.64 +
    3.65 +	if (ACPI_SUCCESS(status)) {
    3.66 +
    3.67 +		/* Normalize the value that was read */
    3.68 +
    3.69 +		register_value =
    3.70 +		    ((register_value & bit_reg_info->access_bit_mask)
    3.71 +		     >> bit_reg_info->bit_position);
    3.72 +
    3.73 +		*return_value = register_value;
    3.74 +
    3.75 +		ACPI_DEBUG_PRINT((ACPI_DB_IO, "Read value %8.8X register %X\n",
    3.76 +				  register_value,
    3.77 +				  bit_reg_info->parent_register));
    3.78 +	}
    3.79 +
    3.80 +	return_ACPI_STATUS(status);
    3.81 +}
    3.82 +
    3.83 +acpi_status acpi_get_register(u32 register_id, u32 * return_value)
    3.84 +{
    3.85 +	acpi_status status;
    3.86 +	//acpi_cpu_flags flags;
    3.87 +	//flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
    3.88 +	status = acpi_get_register_unlocked(register_id, return_value);
    3.89 +	//acpi_os_release_lock(acpi_gbl_hardware_lock, flags);
    3.90 +	return status;
    3.91 +}
    3.92 +
    3.93 +/*******************************************************************************
    3.94 + *
    3.95 + * FUNCTION:    acpi_set_register
    3.96 + *
    3.97 + * PARAMETERS:  register_id     - ID of ACPI bit_register to access
    3.98 + *              Value           - (only used on write) value to write to the
    3.99 + *                                Register, NOT pre-normalized to the bit pos
   3.100 + *
   3.101 + * RETURN:      Status
   3.102 + *
   3.103 + * DESCRIPTION: ACPI Bit Register write function.
   3.104 + *
   3.105 + ******************************************************************************/
   3.106 +acpi_status acpi_set_register(u32 register_id, u32 value)
   3.107 +{
   3.108 +	u32 register_value = 0;
   3.109 +	struct acpi_bit_register_info *bit_reg_info;
   3.110 +	acpi_status status;
   3.111 +	//acpi_cpu_flags lock_flags;
   3.112 +
   3.113 +	ACPI_FUNCTION_TRACE_U32(acpi_set_register, register_id);
   3.114 +
   3.115 +	/* Get the info structure corresponding to the requested ACPI Register */
   3.116 +
   3.117 +	bit_reg_info = acpi_hw_get_bit_register_info(register_id);
   3.118 +	if (!bit_reg_info) {
   3.119 +		ACPI_DEBUG_PRINT((AE_INFO, "Bad ACPI HW RegisterId: %X",
   3.120 +			    register_id));
   3.121 +		return_ACPI_STATUS(AE_BAD_PARAMETER);
   3.122 +	}
   3.123 +
   3.124 +	//lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
   3.125 +
   3.126 +	/* Always do a register read first so we can insert the new bits  */
   3.127 +
   3.128 +	status = acpi_hw_register_read(bit_reg_info->parent_register,
   3.129 +				       &register_value);
   3.130 +	if (ACPI_FAILURE(status)) {
   3.131 +		goto unlock_and_exit;
   3.132 +	}
   3.133 +
   3.134 +	/*
   3.135 +	 * Decode the Register ID
   3.136 +	 * Register ID = [Register block ID] | [bit ID]
   3.137 +	 *
   3.138 +	 * Check bit ID to fine locate Register offset.
   3.139 +	 * Check Mask to determine Register offset, and then read-write.
   3.140 +	 */
   3.141 +	switch (bit_reg_info->parent_register) {
   3.142 +	case ACPI_REGISTER_PM1_STATUS:
   3.143 +
   3.144 +		/*
   3.145 +		 * Status Registers are different from the rest. Clear by
   3.146 +		 * writing 1, and writing 0 has no effect. So, the only relevant
   3.147 +		 * information is the single bit we're interested in, all others should
   3.148 +		 * be written as 0 so they will be left unchanged.
   3.149 +		 */
   3.150 +		value = ACPI_REGISTER_PREPARE_BITS(value,
   3.151 +						   bit_reg_info->bit_position,
   3.152 +						   bit_reg_info->
   3.153 +						   access_bit_mask);
   3.154 +		if (value) {
   3.155 +			status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
   3.156 +							(u16) value);
   3.157 +			register_value = 0;
   3.158 +		}
   3.159 +		break;
   3.160 +
   3.161 +	case ACPI_REGISTER_PM1_ENABLE:
   3.162 +
   3.163 +		ACPI_REGISTER_INSERT_VALUE(register_value,
   3.164 +					   bit_reg_info->bit_position,
   3.165 +					   bit_reg_info->access_bit_mask,
   3.166 +					   value);
   3.167 +
   3.168 +		status = acpi_hw_register_write(ACPI_REGISTER_PM1_ENABLE,
   3.169 +						(u16) register_value);
   3.170 +		break;
   3.171 +
   3.172 +	case ACPI_REGISTER_PM1_CONTROL:
   3.173 +
   3.174 +		/*
   3.175 +		 * Write the PM1 Control register.
   3.176 +		 * Note that at this level, the fact that there are actually TWO
   3.177 +		 * registers (A and B - and B may not exist) is abstracted.
   3.178 +		 */
   3.179 +		ACPI_DEBUG_PRINT((ACPI_DB_IO, "PM1 control: Read %X\n",
   3.180 +				  register_value));
   3.181 +
   3.182 +		ACPI_REGISTER_INSERT_VALUE(register_value,
   3.183 +					   bit_reg_info->bit_position,
   3.184 +					   bit_reg_info->access_bit_mask,
   3.185 +					   value);
   3.186 +
   3.187 +		status = acpi_hw_register_write(ACPI_REGISTER_PM1_CONTROL,
   3.188 +						(u16) register_value);
   3.189 +		break;
   3.190 +
   3.191 +	case ACPI_REGISTER_PM2_CONTROL:
   3.192 +
   3.193 +		status = acpi_hw_register_read(ACPI_REGISTER_PM2_CONTROL,
   3.194 +					       &register_value);
   3.195 +		if (ACPI_FAILURE(status)) {
   3.196 +			goto unlock_and_exit;
   3.197 +		}
   3.198 +
   3.199 +		ACPI_DEBUG_PRINT((ACPI_DB_IO,
   3.200 +				  "PM2 control: Read %X from %8.8X%8.8X\n",
   3.201 +				  register_value,
   3.202 +				  ACPI_FORMAT_UINT64(acpi_gbl_FADT.
   3.203 +						     xpm2_control_block.
   3.204 +						     address)));
   3.205 +
   3.206 +		ACPI_REGISTER_INSERT_VALUE(register_value,
   3.207 +					   bit_reg_info->bit_position,
   3.208 +					   bit_reg_info->access_bit_mask,
   3.209 +					   value);
   3.210 +
   3.211 +		ACPI_DEBUG_PRINT((ACPI_DB_IO,
   3.212 +				  "About to write %4.4X to %8.8X%8.8X\n",
   3.213 +				  register_value,
   3.214 +				  ACPI_FORMAT_UINT64(acpi_gbl_FADT.
   3.215 +						     xpm2_control_block.
   3.216 +						     address)));
   3.217 +
   3.218 +		status = acpi_hw_register_write(ACPI_REGISTER_PM2_CONTROL,
   3.219 +						(u8) (register_value));
   3.220 +		break;
   3.221 +
   3.222 +	default:
   3.223 +		break;
   3.224 +	}
   3.225 +
   3.226 +      unlock_and_exit:
   3.227 +
   3.228 +	//acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
   3.229 +
   3.230 +	/* Normalize the value that was read */
   3.231 +
   3.232 +	ACPI_DEBUG_EXEC(register_value =
   3.233 +			((register_value & bit_reg_info->access_bit_mask) >>
   3.234 +			 bit_reg_info->bit_position));
   3.235 +
   3.236 +	ACPI_DEBUG_PRINT((ACPI_DB_IO,
   3.237 +			  "Set bits: %8.8X actual %8.8X register %X\n", value,
   3.238 +			  register_value, bit_reg_info->parent_register));
   3.239 +	return_ACPI_STATUS(status);
   3.240 +}
   3.241 +
   3.242  /******************************************************************************
   3.243   *
   3.244   * FUNCTION:    acpi_hw_register_read
   3.245 @@ -79,7 +314,7 @@ acpi_hw_register_read(u32 register_id, u
   3.246  
   3.247  		status =
   3.248  		    acpi_hw_low_level_read(16, &value1,
   3.249 -					   &acpi_sinfo.pm1a_evt_blk);
   3.250 +					   &acpi_gbl_FADT.xpm1a_event_block);
   3.251  		if (ACPI_FAILURE(status)) {
   3.252  			goto exit;
   3.253  		}
   3.254 @@ -88,28 +323,62 @@ acpi_hw_register_read(u32 register_id, u
   3.255  
   3.256  		status =
   3.257  		    acpi_hw_low_level_read(16, &value2,
   3.258 -					   &acpi_sinfo.pm1b_evt_blk);
   3.259 +					   &acpi_gbl_FADT.xpm1b_event_block);
   3.260  		value1 |= value2;
   3.261  		break;
   3.262  
   3.263 +	case ACPI_REGISTER_PM1_ENABLE:	/* 16-bit access */
   3.264 +
   3.265 +		status =
   3.266 +		    acpi_hw_low_level_read(16, &value1, &acpi_gbl_xpm1a_enable);
   3.267 +		if (ACPI_FAILURE(status)) {
   3.268 +			goto exit;
   3.269 +		}
   3.270 +
   3.271 +		/* PM1B is optional */
   3.272 +
   3.273 +		status =
   3.274 +		    acpi_hw_low_level_read(16, &value2, &acpi_gbl_xpm1b_enable);
   3.275 +		value1 |= value2;
   3.276 +		break;
   3.277  
   3.278  	case ACPI_REGISTER_PM1_CONTROL:	/* 16-bit access */
   3.279  
   3.280  		status =
   3.281  		    acpi_hw_low_level_read(16, &value1,
   3.282 -					   &acpi_sinfo.pm1a_cnt_blk);
   3.283 +					   &acpi_gbl_FADT.xpm1a_control_block);
   3.284  		if (ACPI_FAILURE(status)) {
   3.285  			goto exit;
   3.286  		}
   3.287  
   3.288  		status =
   3.289  		    acpi_hw_low_level_read(16, &value2,
   3.290 -					   &acpi_sinfo.pm1b_cnt_blk);
   3.291 +					   &acpi_gbl_FADT.xpm1b_control_block);
   3.292  		value1 |= value2;
   3.293  		break;
   3.294  
   3.295 +	case ACPI_REGISTER_PM2_CONTROL:	/* 8-bit access */
   3.296 +
   3.297 +		status =
   3.298 +		    acpi_hw_low_level_read(8, &value1,
   3.299 +					   &acpi_gbl_FADT.xpm2_control_block);
   3.300 +		break;
   3.301 +
   3.302 +	case ACPI_REGISTER_PM_TIMER:	/* 32-bit access */
   3.303 +
   3.304 +		status =
   3.305 +		    acpi_hw_low_level_read(32, &value1,
   3.306 +					   &acpi_gbl_FADT.xpm_timer_block);
   3.307 +		break;
   3.308 +
   3.309 +	case ACPI_REGISTER_SMI_COMMAND_BLOCK:	/* 8-bit access */
   3.310 +
   3.311 +		status =
   3.312 +		    acpi_os_read_port(acpi_gbl_FADT.smi_command, &value1, 8);
   3.313 +		break;
   3.314  
   3.315  	default:
   3.316 +		ACPI_DEBUG_PRINT((AE_INFO, "Unknown Register ID: %X", register_id));
   3.317  		status = AE_BAD_PARAMETER;
   3.318  		break;
   3.319  	}
   3.320 @@ -127,7 +396,7 @@ acpi_hw_register_read(u32 register_id, u
   3.321   *
   3.322   * FUNCTION:    acpi_hw_register_write
   3.323   *
   3.324 - * PARAMETERS:  register_id         - ACPI Register ID 
   3.325 + * PARAMETERS:  register_id         - ACPI Register ID
   3.326   *              Value               - The value to write
   3.327   *
   3.328   * RETURN:      Status
   3.329 @@ -156,7 +425,7 @@ acpi_status acpi_hw_register_write(u32 r
   3.330  
   3.331  	ACPI_FUNCTION_TRACE(hw_register_write);
   3.332  
   3.333 -	switch (register_id) {   //By now we just need handle PM1 status/PM1 control
   3.334 +	switch (register_id) {
   3.335  	case ACPI_REGISTER_PM1_STATUS:	/* 16-bit access */
   3.336  
   3.337  		/* Perform a read first to preserve certain bits (per ACPI spec) */
   3.338 @@ -176,7 +445,7 @@ acpi_status acpi_hw_register_write(u32 r
   3.339  
   3.340  		status =
   3.341  		    acpi_hw_low_level_write(16, value,
   3.342 -					    &acpi_sinfo.pm1a_evt_blk);
   3.343 +					    &acpi_gbl_FADT.xpm1a_event_block);
   3.344  		if (ACPI_FAILURE(status)) {
   3.345  			goto exit;
   3.346  		}
   3.347 @@ -185,16 +454,27 @@ acpi_status acpi_hw_register_write(u32 r
   3.348  
   3.349  		status =
   3.350  		    acpi_hw_low_level_write(16, value,
   3.351 -					    &acpi_sinfo.pm1b_evt_blk);
   3.352 +					    &acpi_gbl_FADT.xpm1b_event_block);
   3.353  		break;
   3.354  
   3.355 +	case ACPI_REGISTER_PM1_ENABLE:	/* 16-bit access */
   3.356 +
   3.357 +		status =
   3.358 +		    acpi_hw_low_level_write(16, value, &acpi_gbl_xpm1a_enable);
   3.359 +		if (ACPI_FAILURE(status)) {
   3.360 +			goto exit;
   3.361 +		}
   3.362 +
   3.363 +		/* PM1B is optional */
   3.364 +
   3.365 +		status =
   3.366 +		    acpi_hw_low_level_write(16, value, &acpi_gbl_xpm1b_enable);
   3.367 +		break;
   3.368  
   3.369  	case ACPI_REGISTER_PM1_CONTROL:	/* 16-bit access */
   3.370  
   3.371  		/*
   3.372  		 * Perform a read first to preserve certain bits (per ACPI spec)
   3.373 -		 *
   3.374 -		 * Note: This includes SCI_EN, we never want to change this bit
   3.375  		 */
   3.376  		status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
   3.377  					       &read_value);
   3.378 @@ -211,30 +491,51 @@ acpi_status acpi_hw_register_write(u32 r
   3.379  
   3.380  		status =
   3.381  		    acpi_hw_low_level_write(16, value,
   3.382 -					    &acpi_sinfo.pm1a_cnt_blk);
   3.383 +					    &acpi_gbl_FADT.xpm1a_control_block);
   3.384  		if (ACPI_FAILURE(status)) {
   3.385  			goto exit;
   3.386  		}
   3.387  
   3.388  		status =
   3.389  		    acpi_hw_low_level_write(16, value,
   3.390 -					    &acpi_sinfo.pm1b_cnt_blk);
   3.391 +					    &acpi_gbl_FADT.xpm1b_control_block);
   3.392  		break;
   3.393  
   3.394  	case ACPI_REGISTER_PM1A_CONTROL:	/* 16-bit access */
   3.395  
   3.396  		status =
   3.397  		    acpi_hw_low_level_write(16, value,
   3.398 -					    &acpi_sinfo.pm1a_cnt_blk);
   3.399 +					    &acpi_gbl_FADT.xpm1a_control_block);
   3.400  		break;
   3.401  
   3.402  	case ACPI_REGISTER_PM1B_CONTROL:	/* 16-bit access */
   3.403  
   3.404  		status =
   3.405  		    acpi_hw_low_level_write(16, value,
   3.406 -					    &acpi_sinfo.pm1b_cnt_blk);
   3.407 +					    &acpi_gbl_FADT.xpm1b_control_block);
   3.408 +		break;
   3.409 +
   3.410 +	case ACPI_REGISTER_PM2_CONTROL:	/* 8-bit access */
   3.411 +
   3.412 +		status =
   3.413 +		    acpi_hw_low_level_write(8, value,
   3.414 +					    &acpi_gbl_FADT.xpm2_control_block);
   3.415  		break;
   3.416  
   3.417 +	case ACPI_REGISTER_PM_TIMER:	/* 32-bit access */
   3.418 +
   3.419 +		status =
   3.420 +		    acpi_hw_low_level_write(32, value,
   3.421 +					    &acpi_gbl_FADT.xpm_timer_block);
   3.422 +		break;
   3.423 +
   3.424 +	case ACPI_REGISTER_SMI_COMMAND_BLOCK:	/* 8-bit access */
   3.425 +
   3.426 +		/* SMI_CMD is currently always in IO space */
   3.427 +
   3.428 +		status =
   3.429 +		    acpi_os_write_port(acpi_gbl_FADT.smi_command, value, 8);
   3.430 +		break;
   3.431  
   3.432  	default:
   3.433  		status = AE_BAD_PARAMETER;
   3.434 @@ -242,7 +543,6 @@ acpi_status acpi_hw_register_write(u32 r
   3.435  	}
   3.436  
   3.437        exit:
   3.438 -
   3.439  	return_ACPI_STATUS(status);
   3.440  }
   3.441  
   3.442 @@ -383,3 +683,4 @@ acpi_hw_low_level_write(u32 width, u32 v
   3.443  
   3.444  	return (status);
   3.445  }
   3.446 +

     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/xen/drivers/acpi/utglobal.c	Thu May 01 10:41:51 2008 +0100
     4.3 @@ -0,0 +1,136 @@
     4.4 +/******************************************************************************
     4.5 + *
     4.6 + * Module Name: utglobal - Global variables for the ACPI subsystem
     4.7 + *
     4.8 + *****************************************************************************/
     4.9 +
    4.10 +/*
    4.11 + * Copyright (C) 2000 - 2007, R. Byron Moore
    4.12 + * All rights reserved.
    4.13 + *
    4.14 + * Redistribution and use in source and binary forms, with or without
    4.15 + * modification, are permitted provided that the following conditions
    4.16 + * are met:
    4.17 + * 1. Redistributions of source code must retain the above copyright
    4.18 + *    notice, this list of conditions, and the following disclaimer,
    4.19 + *    without modification.
    4.20 + * 2. Redistributions in binary form must reproduce at minimum a disclaimer
    4.21 + *    substantially similar to the "NO WARRANTY" disclaimer below
    4.22 + *    ("Disclaimer") and any redistribution must be conditioned upon
    4.23 + *    including a substantially similar Disclaimer requirement for further
    4.24 + *    binary redistribution.
    4.25 + * 3. Neither the names of the above-listed copyright holders nor the names
    4.26 + *    of any contributors may be used to endorse or promote products derived
    4.27 + *    from this software without specific prior written permission.
    4.28 + *
    4.29 + * Alternatively, this software may be distributed under the terms of the
    4.30 + * GNU General Public License ("GPL") version 2 as published by the Free
    4.31 + * Software Foundation.
    4.32 + *
    4.33 + * NO WARRANTY
    4.34 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    4.35 + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    4.36 + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
    4.37 + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    4.38 + * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    4.39 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    4.40 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    4.41 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
    4.42 + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
    4.43 + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    4.44 + * POSSIBILITY OF SUCH DAMAGES.
    4.45 + */
    4.46 +
    4.47 +//#define DEFINE_ACPI_GLOBALS
    4.48 +
    4.49 +#include <acpi/acpi.h>
    4.50 +//#include <acpi/acnamesp.h>
    4.51 +
    4.52 +#define _COMPONENT          ACPI_UTILITIES
    4.53 +    ACPI_MODULE_NAME("utglobal")
    4.54 +
    4.55 +struct acpi_table_fadt acpi_gbl_FADT;
    4.56 +
    4.57 +/* These addresses are calculated from FADT address values */
    4.58 +
    4.59 +struct acpi_generic_address acpi_gbl_xpm1a_enable;
    4.60 +struct acpi_generic_address acpi_gbl_xpm1b_enable;
    4.61 +
    4.62 +/******************************************************************************
    4.63 + *
    4.64 + * Event and Hardware globals
    4.65 + *
    4.66 + ******************************************************************************/
    4.67 +
    4.68 +struct acpi_bit_register_info acpi_gbl_bit_register_info[ACPI_NUM_BITREG] = {
    4.69 +	/* Name                                     Parent Register             Register Bit Position                   Register Bit Mask       */
    4.70 +
    4.71 +	/* ACPI_BITREG_TIMER_STATUS         */ {ACPI_REGISTER_PM1_STATUS,
    4.72 +						ACPI_BITPOSITION_TIMER_STATUS,
    4.73 +						ACPI_BITMASK_TIMER_STATUS},
    4.74 +	/* ACPI_BITREG_BUS_MASTER_STATUS    */ {ACPI_REGISTER_PM1_STATUS,
    4.75 +						ACPI_BITPOSITION_BUS_MASTER_STATUS,
    4.76 +						ACPI_BITMASK_BUS_MASTER_STATUS},
    4.77 +	/* ACPI_BITREG_GLOBAL_LOCK_STATUS   */ {ACPI_REGISTER_PM1_STATUS,
    4.78 +						ACPI_BITPOSITION_GLOBAL_LOCK_STATUS,
    4.79 +						ACPI_BITMASK_GLOBAL_LOCK_STATUS},
    4.80 +	/* ACPI_BITREG_POWER_BUTTON_STATUS  */ {ACPI_REGISTER_PM1_STATUS,
    4.81 +						ACPI_BITPOSITION_POWER_BUTTON_STATUS,
    4.82 +						ACPI_BITMASK_POWER_BUTTON_STATUS},
    4.83 +	/* ACPI_BITREG_SLEEP_BUTTON_STATUS  */ {ACPI_REGISTER_PM1_STATUS,
    4.84 +						ACPI_BITPOSITION_SLEEP_BUTTON_STATUS,
    4.85 +						ACPI_BITMASK_SLEEP_BUTTON_STATUS},
    4.86 +	/* ACPI_BITREG_RT_CLOCK_STATUS      */ {ACPI_REGISTER_PM1_STATUS,
    4.87 +						ACPI_BITPOSITION_RT_CLOCK_STATUS,
    4.88 +						ACPI_BITMASK_RT_CLOCK_STATUS},
    4.89 +	/* ACPI_BITREG_WAKE_STATUS          */ {ACPI_REGISTER_PM1_STATUS,
    4.90 +						ACPI_BITPOSITION_WAKE_STATUS,
    4.91 +						ACPI_BITMASK_WAKE_STATUS},
    4.92 +	/* ACPI_BITREG_PCIEXP_WAKE_STATUS   */ {ACPI_REGISTER_PM1_STATUS,
    4.93 +						ACPI_BITPOSITION_PCIEXP_WAKE_STATUS,
    4.94 +						ACPI_BITMASK_PCIEXP_WAKE_STATUS},
    4.95 +
    4.96 +	/* ACPI_BITREG_TIMER_ENABLE         */ {ACPI_REGISTER_PM1_ENABLE,
    4.97 +						ACPI_BITPOSITION_TIMER_ENABLE,
    4.98 +						ACPI_BITMASK_TIMER_ENABLE},
    4.99 +	/* ACPI_BITREG_GLOBAL_LOCK_ENABLE   */ {ACPI_REGISTER_PM1_ENABLE,
   4.100 +						ACPI_BITPOSITION_GLOBAL_LOCK_ENABLE,
   4.101 +						ACPI_BITMASK_GLOBAL_LOCK_ENABLE},
   4.102 +	/* ACPI_BITREG_POWER_BUTTON_ENABLE  */ {ACPI_REGISTER_PM1_ENABLE,
   4.103 +						ACPI_BITPOSITION_POWER_BUTTON_ENABLE,
   4.104 +						ACPI_BITMASK_POWER_BUTTON_ENABLE},
   4.105 +	/* ACPI_BITREG_SLEEP_BUTTON_ENABLE  */ {ACPI_REGISTER_PM1_ENABLE,
   4.106 +						ACPI_BITPOSITION_SLEEP_BUTTON_ENABLE,
   4.107 +						ACPI_BITMASK_SLEEP_BUTTON_ENABLE},
   4.108 +	/* ACPI_BITREG_RT_CLOCK_ENABLE      */ {ACPI_REGISTER_PM1_ENABLE,
   4.109 +						ACPI_BITPOSITION_RT_CLOCK_ENABLE,
   4.110 +						ACPI_BITMASK_RT_CLOCK_ENABLE},
   4.111 +	/* ACPI_BITREG_WAKE_ENABLE          */ {ACPI_REGISTER_PM1_ENABLE, 0, 0},
   4.112 +	/* ACPI_BITREG_PCIEXP_WAKE_DISABLE  */ {ACPI_REGISTER_PM1_ENABLE,
   4.113 +						ACPI_BITPOSITION_PCIEXP_WAKE_DISABLE,
   4.114 +						ACPI_BITMASK_PCIEXP_WAKE_DISABLE},
   4.115 +
   4.116 +	/* ACPI_BITREG_SCI_ENABLE           */ {ACPI_REGISTER_PM1_CONTROL,
   4.117 +						ACPI_BITPOSITION_SCI_ENABLE,
   4.118 +						ACPI_BITMASK_SCI_ENABLE},
   4.119 +	/* ACPI_BITREG_BUS_MASTER_RLD       */ {ACPI_REGISTER_PM1_CONTROL,
   4.120 +						ACPI_BITPOSITION_BUS_MASTER_RLD,
   4.121 +						ACPI_BITMASK_BUS_MASTER_RLD},
   4.122 +	/* ACPI_BITREG_GLOBAL_LOCK_RELEASE  */ {ACPI_REGISTER_PM1_CONTROL,
   4.123 +						ACPI_BITPOSITION_GLOBAL_LOCK_RELEASE,
   4.124 +						ACPI_BITMASK_GLOBAL_LOCK_RELEASE},
   4.125 +	/* ACPI_BITREG_SLEEP_TYPE_A         */ {ACPI_REGISTER_PM1_CONTROL,
   4.126 +						ACPI_BITPOSITION_SLEEP_TYPE_X,
   4.127 +						ACPI_BITMASK_SLEEP_TYPE_X},
   4.128 +	/* ACPI_BITREG_SLEEP_TYPE_B         */ {ACPI_REGISTER_PM1_CONTROL,
   4.129 +						ACPI_BITPOSITION_SLEEP_TYPE_X,
   4.130 +						ACPI_BITMASK_SLEEP_TYPE_X},
   4.131 +	/* ACPI_BITREG_SLEEP_ENABLE         */ {ACPI_REGISTER_PM1_CONTROL,
   4.132 +						ACPI_BITPOSITION_SLEEP_ENABLE,
   4.133 +						ACPI_BITMASK_SLEEP_ENABLE},
   4.134 +
   4.135 +	/* ACPI_BITREG_ARB_DIS              */ {ACPI_REGISTER_PM2_CONTROL,
   4.136 +						ACPI_BITPOSITION_ARB_DISABLE,
   4.137 +						ACPI_BITMASK_ARB_DISABLE}
   4.138 +};
   4.139 +