debuggers.hg
changeset 21282:9a1d7caa2024
x86, shadow: propagate pat caching on the shadow l1
PAT caching was only propagated if has_arch_pdevs(),
causing the hvm_get_mem_pinned_cacheattr() to be ignored
in the non passthrough case.
l1_disallow_mask() needs to be relaxed.
Signed-off-by: Jean Guyader <jean.guyader@citrix.com>
PAT caching was only propagated if has_arch_pdevs(),
causing the hvm_get_mem_pinned_cacheattr() to be ignored
in the non passthrough case.
l1_disallow_mask() needs to be relaxed.
Signed-off-by: Jean Guyader <jean.guyader@citrix.com>
author | Keir Fraser <keir.fraser@citrix.com> |
---|---|
date | Mon Apr 26 12:13:23 2010 +0100 (2010-04-26) |
parents | 3ce824963dc4 |
children | a167ea374f26 |
files | xen/arch/x86/mm.c xen/arch/x86/mm/shadow/multi.c |
line diff
1.1 --- a/xen/arch/x86/mm.c Mon Apr 26 12:12:12 2010 +0100 1.2 +++ b/xen/arch/x86/mm.c Mon Apr 26 12:13:23 2010 +0100 1.3 @@ -158,7 +158,8 @@ boolean_param("allowhugepage", opt_allow 1.4 ((d != dom_io) && \ 1.5 (rangeset_is_empty((d)->iomem_caps) && \ 1.6 rangeset_is_empty((d)->arch.ioport_caps) && \ 1.7 - !has_arch_pdevs(d)) ? \ 1.8 + !has_arch_pdevs(d) && \ 1.9 + !is_hvm_domain(d)) ? \ 1.10 L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS)) 1.11 1.12 #ifdef __x86_64__
2.1 --- a/xen/arch/x86/mm/shadow/multi.c Mon Apr 26 12:12:12 2010 +0100 2.2 +++ b/xen/arch/x86/mm/shadow/multi.c Mon Apr 26 12:13:23 2010 +0100 2.3 @@ -565,7 +565,6 @@ static always_inline void 2.4 * caching attributes in the shadows to match what was asked for. 2.5 */ 2.6 if ( (level == 1) && is_hvm_domain(d) && 2.7 - iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target_mfn) + 1) && 2.8 !is_xen_heap_mfn(mfn_x(target_mfn)) ) 2.9 { 2.10 unsigned int type; 2.11 @@ -581,20 +580,24 @@ static always_inline void 2.12 sflags |= pat_type_2_pte_flags(type); 2.13 else if ( d->arch.hvm_domain.is_in_uc_mode ) 2.14 sflags |= pat_type_2_pte_flags(PAT_TYPE_UNCACHABLE); 2.15 - else if ( p2mt == p2m_mmio_direct ) 2.16 - sflags |= get_pat_flags(v, 2.17 - gflags, 2.18 - gfn_to_paddr(target_gfn), 2.19 - ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, 2.20 - MTRR_TYPE_UNCACHABLE); 2.21 - else if ( iommu_snoop ) 2.22 - sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK); 2.23 else 2.24 - sflags |= get_pat_flags(v, 2.25 - gflags, 2.26 - gfn_to_paddr(target_gfn), 2.27 - ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, 2.28 - NO_HARDCODE_MEM_TYPE); 2.29 + if ( iomem_access_permitted(d, mfn_x(target_mfn), mfn_x(target_mfn) + 1) ) 2.30 + { 2.31 + if ( p2mt == p2m_mmio_direct ) 2.32 + sflags |= get_pat_flags(v, 2.33 + gflags, 2.34 + gfn_to_paddr(target_gfn), 2.35 + ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, 2.36 + MTRR_TYPE_UNCACHABLE); 2.37 + else if ( iommu_snoop ) 2.38 + sflags |= pat_type_2_pte_flags(PAT_TYPE_WRBACK); 2.39 + else 2.40 + sflags |= get_pat_flags(v, 2.41 + gflags, 2.42 + gfn_to_paddr(target_gfn), 2.43 + ((paddr_t)mfn_x(target_mfn)) << PAGE_SHIFT, 2.44 + NO_HARDCODE_MEM_TYPE); 2.45 + } 2.46 } 2.47 2.48 // Set the A&D bits for higher level shadows.