debuggers.hg
changeset 16413:a35586bd493b
vmx: Restore correct host SYSENTER parameters on vmexit.
Also simplify vmx_set_host_env().
HOST_GDT_BASE does not have to change when we shift CPU.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
Also simplify vmx_set_host_env().
HOST_GDT_BASE does not have to change when we shift CPU.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author | Keir Fraser <keir@xensource.com> |
---|---|
date | Tue Nov 13 19:05:27 2007 +0000 (2007-11-13) |
parents | ab516ca6e984 |
children | 6c544894b8b2 |
files | xen/arch/x86/hvm/vmx/vmcs.c xen/include/asm-x86/hvm/vmx/vmcs.h |
line diff
1.1 --- a/xen/arch/x86/hvm/vmx/vmcs.c Tue Nov 13 18:30:47 2007 +0000 1.2 +++ b/xen/arch/x86/hvm/vmx/vmcs.c Tue Nov 13 19:05:27 2007 +0000 1.3 @@ -399,20 +399,14 @@ struct xgt_desc { 1.4 1.5 static void vmx_set_host_env(struct vcpu *v) 1.6 { 1.7 - unsigned int tr, cpu; 1.8 - struct xgt_desc desc; 1.9 + unsigned int cpu = smp_processor_id(); 1.10 1.11 - cpu = smp_processor_id(); 1.12 + __vmwrite(HOST_IDTR_BASE, (unsigned long)idt_tables[cpu]); 1.13 1.14 - __asm__ __volatile__ ( "sidt (%0) \n" : : "a" (&desc) : "memory" ); 1.15 - __vmwrite(HOST_IDTR_BASE, desc.address); 1.16 + __vmwrite(HOST_TR_SELECTOR, __TSS(cpu) << 3); 1.17 + __vmwrite(HOST_TR_BASE, (unsigned long)&init_tss[cpu]); 1.18 1.19 - __asm__ __volatile__ ( "sgdt (%0) \n" : : "a" (&desc) : "memory" ); 1.20 - __vmwrite(HOST_GDTR_BASE, desc.address); 1.21 - 1.22 - __asm__ __volatile__ ( "str (%0) \n" : : "a" (&tr) : "memory" ); 1.23 - __vmwrite(HOST_TR_SELECTOR, tr); 1.24 - __vmwrite(HOST_TR_BASE, (unsigned long)&init_tss[cpu]); 1.25 + __vmwrite(HOST_SYSENTER_ESP, get_stack_bottom()); 1.26 1.27 /* 1.28 * Skip end of cpu_user_regs when entering the hypervisor because the 1.29 @@ -454,6 +448,8 @@ void vmx_disable_intercept_for_msr(struc 1.30 static int construct_vmcs(struct vcpu *v) 1.31 { 1.32 union vmcs_arbytes arbytes; 1.33 + uint16_t sysenter_cs; 1.34 + unsigned long sysenter_eip; 1.35 1.36 vmx_vmcs_enter(v); 1.37 1.38 @@ -489,6 +485,9 @@ static int construct_vmcs(struct vcpu *v 1.39 __vmwrite(IO_BITMAP_A, virt_to_maddr(hvm_io_bitmap)); 1.40 __vmwrite(IO_BITMAP_B, virt_to_maddr(hvm_io_bitmap + PAGE_SIZE)); 1.41 1.42 + /* Host GDTR base. */ 1.43 + __vmwrite(HOST_GDTR_BASE, GDT_VIRT_START(v)); 1.44 + 1.45 /* Host data selectors. */ 1.46 __vmwrite(HOST_SS_SELECTOR, __HYPERVISOR_DS); 1.47 __vmwrite(HOST_DS_SELECTOR, __HYPERVISOR_DS); 1.48 @@ -506,6 +505,12 @@ static int construct_vmcs(struct vcpu *v 1.49 __vmwrite(HOST_CS_SELECTOR, __HYPERVISOR_CS); 1.50 __vmwrite(HOST_RIP, (unsigned long)vmx_asm_vmexit_handler); 1.51 1.52 + /* Host SYSENTER CS:RIP. */ 1.53 + rdmsrl(MSR_IA32_SYSENTER_CS, sysenter_cs); 1.54 + __vmwrite(HOST_SYSENTER_CS, sysenter_cs); 1.55 + rdmsrl(MSR_IA32_SYSENTER_EIP, sysenter_eip); 1.56 + __vmwrite(HOST_SYSENTER_EIP, sysenter_eip); 1.57 + 1.58 /* MSR intercepts. */ 1.59 __vmwrite(VM_EXIT_MSR_LOAD_COUNT, 0); 1.60 __vmwrite(VM_EXIT_MSR_STORE_COUNT, 0); 1.61 @@ -903,9 +908,9 @@ void vmcs_dump_vcpu(void) 1.62 (unsigned long long)vmr(HOST_CR3), 1.63 (unsigned long long)vmr(HOST_CR4)); 1.64 printk("Sysenter RSP=%016llx CS:RIP=%04x:%016llx\n", 1.65 - (unsigned long long)vmr(HOST_IA32_SYSENTER_ESP), 1.66 - (int)vmr(HOST_IA32_SYSENTER_CS), 1.67 - (unsigned long long)vmr(HOST_IA32_SYSENTER_EIP)); 1.68 + (unsigned long long)vmr(HOST_SYSENTER_ESP), 1.69 + (int)vmr(HOST_SYSENTER_CS), 1.70 + (unsigned long long)vmr(HOST_SYSENTER_EIP)); 1.71 1.72 printk("*** Control State ***\n"); 1.73 printk("PinBased=%08x CPUBased=%08x SecondaryExec=%08x\n",
2.1 --- a/xen/include/asm-x86/hvm/vmx/vmcs.h Tue Nov 13 18:30:47 2007 +0000 2.2 +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h Tue Nov 13 19:05:27 2007 +0000 2.3 @@ -235,7 +235,7 @@ enum vmcs_field { 2.4 GUEST_INTERRUPTIBILITY_INFO = 0x00004824, 2.5 GUEST_ACTIVITY_STATE = 0x00004826, 2.6 GUEST_SYSENTER_CS = 0x0000482A, 2.7 - HOST_IA32_SYSENTER_CS = 0x00004c00, 2.8 + HOST_SYSENTER_CS = 0x00004c00, 2.9 CR0_GUEST_HOST_MASK = 0x00006000, 2.10 CR4_GUEST_HOST_MASK = 0x00006002, 2.11 CR0_READ_SHADOW = 0x00006004, 2.12 @@ -274,8 +274,8 @@ enum vmcs_field { 2.13 HOST_TR_BASE = 0x00006c0a, 2.14 HOST_GDTR_BASE = 0x00006c0c, 2.15 HOST_IDTR_BASE = 0x00006c0e, 2.16 - HOST_IA32_SYSENTER_ESP = 0x00006c10, 2.17 - HOST_IA32_SYSENTER_EIP = 0x00006c12, 2.18 + HOST_SYSENTER_ESP = 0x00006c10, 2.19 + HOST_SYSENTER_EIP = 0x00006c12, 2.20 HOST_RSP = 0x00006c14, 2.21 HOST_RIP = 0x00006c16, 2.22 };