1.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Thu Jul 10 10:02:15 2008 +0100
     1.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Thu Jul 10 10:07:32 2008 +0100
     1.3 @@ -1086,7 +1086,10 @@ void ept_sync_domain(struct domain *d)
     1.4  {
     1.5      /* Only if using EPT and this domain has some VCPUs to dirty. */
     1.6      if ( d->arch.hvm_domain.hap_enabled && d->vcpu[0] )
     1.7 +    {
     1.8 +        ASSERT(local_irq_is_enabled());
     1.9          on_each_cpu(__ept_sync_domain, d, 1, 1);
    1.10 +    }
    1.11  }
    1.12  
    1.13  static void __vmx_inject_exception(

     2.1 --- a/xen/drivers/passthrough/vtd/qinval.c	Thu Jul 10 10:02:15 2008 +0100
     2.2 +++ b/xen/drivers/passthrough/vtd/qinval.c	Thu Jul 10 10:07:32 2008 +0100
     2.3 @@ -190,13 +190,13 @@ static int queue_invalidate_wait(struct 
     2.4      struct qi_ctrl *qi_ctrl = iommu_qi_ctrl(iommu);
     2.5  
     2.6      spin_lock_irqsave(&qi_ctrl->qinval_poll_lock, flags);
     2.7 -    spin_lock_irqsave(&iommu->register_lock, flags);
     2.8 +    spin_lock(&iommu->register_lock);
     2.9      index = qinval_next_index(iommu);
    2.10      if ( *saddr == 1 )
    2.11          *saddr = 0;
    2.12      ret = gen_wait_dsc(iommu, index, iflag, sw, fn, sdata, saddr);
    2.13      ret |= qinval_update_qtail(iommu, index);
    2.14 -    spin_unlock_irqrestore(&iommu->register_lock, flags);
    2.15 +    spin_unlock(&iommu->register_lock);
    2.16  
    2.17      /* Now we don't support interrupt method */
    2.18      if ( sw )