debuggers.hg

changeset 16858:ac296153ea64

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[IA64] Rearrange IA64_TR_ definitions to use from lower value

SDM vol2 4.1.1.1 says that:
"software should allocate contiguous translation registers starting
at slot 0 and continuing upwards."

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Alex Williamson <alex.williamson@hp.com>
date Thu Jan 17 12:05:43 2008 -0700 (2008-01-17)
parents 64653720c9e4
children 36231eca00d9
files xen/include/asm-ia64/xenkregs.h
line diff
     1.1 --- a/xen/include/asm-ia64/xenkregs.h	Thu Jan 17 12:05:43 2008 -0700
     1.2 +++ b/xen/include/asm-ia64/xenkregs.h	Thu Jan 17 12:05:43 2008 -0700
     1.3 @@ -4,10 +4,11 @@
     1.4  /*
     1.5   * Translation registers:
     1.6   */
     1.7 -#define IA64_TR_SHARED_INFO	3	/* dtr3: page shared with domain */
     1.8 -#define	IA64_TR_VHPT		4	/* dtr4: vhpt */
     1.9 +#define IA64_TR_XEN_HEAP_REGS	3	/* dtr3: xen heap identity mapped regs */
    1.10 +#define IA64_TR_SHARED_INFO	4	/* dtr4: page shared with domain */
    1.11  #define IA64_TR_MAPPED_REGS	5	/* dtr5: vcpu mapped regs */
    1.12 -#define IA64_TR_XEN_HEAP_REGS	6	/* dtr6: xen heap identity mapped regs */
    1.13 +#define	IA64_TR_VHPT		6	/* dtr6: vhpt */
    1.14 +
    1.15  #define IA64_DTR_GUEST_KERNEL   7
    1.16  #define IA64_ITR_GUEST_KERNEL   2
    1.17  /* Processor status register bits: */