debuggers.hg

changeset 21979:add40eb47868

vt-d: Fix ioapic write order in io_apic_write_remap_rte

At the end of io_apic_write_remap_rte, it writes new entry (remapped
interrupt) to ioapic. But it writes low 32 bits before high 32 bits,
it unmasks interrupt before writing high 32 bits if 'mask' bit in low
32 bits is cleared. Thus it may result in issues. This patch fixes
this issue by writing high 32 bits before low 32 bits.

Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
Signed-off-by: Weidong Han <weidong.han@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Mon Aug 09 16:32:45 2010 +0100 (2010-08-09)
parents fe930e1b2ce8
children befd1814c0a2
files xen/drivers/passthrough/vtd/intremap.c
line diff
     1.1 --- a/xen/drivers/passthrough/vtd/intremap.c	Fri Aug 06 18:35:02 2010 +0100
     1.2 +++ b/xen/drivers/passthrough/vtd/intremap.c	Mon Aug 09 16:32:45 2010 +0100
     1.3 @@ -444,10 +444,10 @@ void io_apic_write_remap_rte(
     1.4      }
     1.5  
     1.6      /* write new entry to ioapic */
     1.7 +    *IO_APIC_BASE(apic) = reg + 1;
     1.8 +    *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+1);
     1.9      *IO_APIC_BASE(apic) = reg;
    1.10      *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+0);
    1.11 -    *IO_APIC_BASE(apic) = reg + 1;
    1.12 -    *(IO_APIC_BASE(apic)+4) = *(((u32 *)&old_rte)+1);
    1.13  }
    1.14  
    1.15  #if defined(__i386__) || defined(__x86_64__)