debuggers.hg

changeset 22732:aec06605e125

libxc: Update AMD CPU feature flags 0x80000001:ECX for Xen tools

This patch syncs-up AMD CPU feature flags 0x80000001:ECX in libxc with
the latest Linux kernel.

Signed-off-by: Wei Huang <wei.huang2@amd.com>
author Keir Fraser <keir@xen.org>
date Sat Jan 08 10:48:09 2011 +0000 (2011-01-08)
parents 1a64415c959f
children aa3242c34dda
files tools/libxc/xc_cpufeature.h tools/libxc/xc_cpuid_x86.c
line diff
     1.1 --- a/tools/libxc/xc_cpufeature.h	Sat Jan 08 10:43:01 2011 +0000
     1.2 +++ b/tools/libxc/xc_cpufeature.h	Sat Jan 08 10:48:09 2011 +0000
     1.3 @@ -119,19 +119,24 @@
     1.4  #define X86_FEATURE_PMM_EN	(5*32+ 13) /* PMM enabled */
     1.5  
     1.6  /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
     1.7 -#define X86_FEATURE_LAHF_LM	(6*32+ 0) /* LAHF/SAHF in long mode */
     1.8 -#define X86_FEATURE_CMP_LEGACY	(6*32+ 1) /* If yes HyperThreading not valid */
     1.9 -#define X86_FEATURE_SVME        (6*32+ 2) /* Secure Virtual Machine */
    1.10 -#define X86_FEATURE_EXTAPICSPACE (6*32+ 3) /* Extended APIC space */
    1.11 -#define X86_FEATURE_ALTMOVCR	(6*32+ 4) /* LOCK MOV CR accesses CR+8 */
    1.12 -#define X86_FEATURE_ABM		(6*32+ 5) /* Advanced Bit Manipulation */
    1.13 -#define X86_FEATURE_SSE4A	(6*32+ 6) /* AMD Streaming SIMD Extensions-4a */
    1.14 -#define X86_FEATURE_MISALIGNSSE	(6*32+ 7) /* Misaligned SSE Access */
    1.15 -#define X86_FEATURE_3DNOWPF	(6*32+ 8) /* 3DNow! Prefetch */
    1.16 -#define X86_FEATURE_OSVW	(6*32+ 9) /* OS Visible Workaround */
    1.17 -#define X86_FEATURE_IBS		(6*32+ 10) /* Instruction Based Sampling */
    1.18 -#define X86_FEATURE_SSE5	(6*32+ 11) /* AMD Streaming SIMD Extensions-5 */
    1.19 -#define X86_FEATURE_SKINIT	(6*32+ 12) /* SKINIT, STGI/CLGI, DEV */
    1.20 -#define X86_FEATURE_WDT		(6*32+ 13) /* Watchdog Timer */
    1.21 +#define X86_FEATURE_LAHF_LM     (6*32+ 0) /* LAHF/SAHF in long mode */
    1.22 +#define X86_FEATURE_CMP_LEGACY  (6*32+ 1) /* If yes HyperThreading not valid */
    1.23 +#define X86_FEATURE_SVM         (6*32+ 2) /* Secure virtual machine */
    1.24 +#define X86_FEATURE_EXTAPIC     (6*32+ 3) /* Extended APIC space */
    1.25 +#define X86_FEATURE_CR8_LEGACY  (6*32+ 4) /* CR8 in 32-bit mode */
    1.26 +#define X86_FEATURE_ABM         (6*32+ 5) /* Advanced bit manipulation */
    1.27 +#define X86_FEATURE_SSE4A       (6*32+ 6) /* SSE-4A */
    1.28 +#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE mode */
    1.29 +#define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
    1.30 +#define X86_FEATURE_OSVW        (6*32+ 9) /* OS Visible Workaround */
    1.31 +#define X86_FEATURE_IBS         (6*32+10) /* Instruction Based Sampling */
    1.32 +#define X86_FEATURE_XOP         (6*32+11) /* extended AVX instructions */
    1.33 +#define X86_FEATURE_SKINIT      (6*32+12) /* SKINIT/STGI instructions */
    1.34 +#define X86_FEATURE_WDT         (6*32+13) /* Watchdog timer */
    1.35 +#define X86_FEATURE_LWP         (6*32+15) /* Light Weight Profiling */
    1.36 +#define X86_FEATURE_FMA4        (6*32+16) /* 4 operands MAC instructions */
    1.37 +#define X86_FEATURE_NODEID_MSR  (6*32+19) /* NodeId MSR */
    1.38 +#define X86_FEATURE_TBM         (6*32+21) /* trailing bit manipulations */
    1.39 +#define X86_FEATURE_TOPOEXT     (6*32+22) /* topology extensions CPUID leafs */
    1.40  
    1.41  #endif /* __LIBXC_CPUFEATURE_H */
     2.1 --- a/tools/libxc/xc_cpuid_x86.c	Sat Jan 08 10:43:01 2011 +0000
     2.2 +++ b/tools/libxc/xc_cpuid_x86.c	Sat Jan 08 10:48:09 2011 +0000
     2.3 @@ -97,11 +97,11 @@ static void amd_xc_cpuid_policy(
     2.4          /* Filter all other features according to a whitelist. */
     2.5          regs[2] &= ((is_64bit ? bitmaskof(X86_FEATURE_LAHF_LM) : 0) |
     2.6                      bitmaskof(X86_FEATURE_CMP_LEGACY) |
     2.7 -                    bitmaskof(X86_FEATURE_ALTMOVCR) |
     2.8 +                    bitmaskof(X86_FEATURE_CR8_LEGACY) |
     2.9                      bitmaskof(X86_FEATURE_ABM) |
    2.10                      bitmaskof(X86_FEATURE_SSE4A) |
    2.11                      bitmaskof(X86_FEATURE_MISALIGNSSE) |
    2.12 -                    bitmaskof(X86_FEATURE_3DNOWPF));
    2.13 +                    bitmaskof(X86_FEATURE_3DNOWPREFETCH));
    2.14          regs[3] &= (0x0183f3ff | /* features shared with 0x00000001:EDX */
    2.15                      (is_pae ? bitmaskof(X86_FEATURE_NX) : 0) |
    2.16                      (is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) |
    2.17 @@ -422,7 +422,7 @@ static void xc_cpuid_pv_policy(
    2.18          clear_bit(X86_FEATURE_PAGE1GB, regs[3]);
    2.19          clear_bit(X86_FEATURE_RDTSCP, regs[3]);
    2.20  
    2.21 -        clear_bit(X86_FEATURE_SVME, regs[2]);
    2.22 +        clear_bit(X86_FEATURE_SVM, regs[2]);
    2.23          clear_bit(X86_FEATURE_OSVW, regs[2]);
    2.24          clear_bit(X86_FEATURE_IBS, regs[2]);
    2.25          clear_bit(X86_FEATURE_SKINIT, regs[2]);