debuggers.hg
changeset 16516:f173cd885ffb
vt-d: Some fixes and cleanup of Intel iommu
This patch modifies domain id in __iommu_flush_context() and
__iommu_flush_iotlb() to be consistent consist with domain id set by
context_set_domain_id(), avoids setting NULL to address space root
and corrects macro cap_ndoms.
Signed-off-by: Weidong Han <weidong.han@intel.com>
This patch modifies domain id in __iommu_flush_context() and
__iommu_flush_iotlb() to be consistent consist with domain id set by
context_set_domain_id(), avoids setting NULL to address space root
and corrects macro cap_ndoms.
Signed-off-by: Weidong Han <weidong.han@intel.com>
author | Keir Fraser <keir.fraser@citrix.com> |
---|---|
date | Wed Nov 28 12:34:11 2007 +0000 (2007-11-28) |
parents | 6fd17d0dcbcd |
children | 8d406e2813c8 |
files | xen/arch/x86/hvm/vmx/vtd/intel-iommu.c xen/include/asm-x86/hvm/vmx/intel-iommu.h |
line diff
1.1 --- a/xen/arch/x86/hvm/vmx/vtd/intel-iommu.c Tue Nov 27 12:49:16 2007 +0000 1.2 +++ b/xen/arch/x86/hvm/vmx/vtd/intel-iommu.c Wed Nov 28 12:34:11 2007 +0000 1.3 @@ -276,6 +276,9 @@ static int __iommu_flush_context( 1.4 unsigned long flag; 1.5 unsigned long start_time; 1.6 1.7 + /* Domain id in context is 1 based */ 1.8 + did++; 1.9 + 1.10 /* 1.11 * In the non-present entry flush case, if hardware doesn't cache 1.12 * non-present entry we do nothing and if hardware cache non-present 1.13 @@ -360,6 +363,9 @@ static int __iommu_flush_iotlb(struct io 1.14 unsigned long flag; 1.15 unsigned long start_time; 1.16 1.17 + /* Domain id in context is 1 based */ 1.18 + did++; 1.19 + 1.20 /* 1.21 * In the non-present entry flush case, if hardware doesn't cache 1.22 * non-present entry we do nothing and if hardware cache non-present 1.23 @@ -1037,6 +1043,18 @@ static int domain_context_mapping_one( 1.24 context_set_translation_type(*context, CONTEXT_TT_PASS_THRU); 1.25 else 1.26 { 1.27 + if ( !hd->pgd ) 1.28 + { 1.29 + struct dma_pte *pgd = (struct dma_pte *)alloc_xenheap_page(); 1.30 + if ( !pgd ) 1.31 + { 1.32 + spin_unlock_irqrestore(&hd->mapping_lock, flags); 1.33 + return -ENOMEM; 1.34 + } 1.35 + memset(pgd, 0, PAGE_SIZE); 1.36 + hd->pgd = pgd; 1.37 + } 1.38 + 1.39 context_set_address_root(*context, virt_to_maddr(hd->pgd)); 1.40 context_set_translation_type(*context, CONTEXT_TT_MULTI_LEVEL); 1.41 } 1.42 @@ -1429,7 +1447,7 @@ void iommu_domain_teardown(struct domain 1.43 return_devices_to_dom0(d); 1.44 } 1.45 1.46 -static int domain_context_mapped(struct domain *domain, struct pci_dev *pdev) 1.47 +static int domain_context_mapped(struct pci_dev *pdev) 1.48 { 1.49 struct acpi_drhd_unit *drhd; 1.50 struct iommu *iommu; 1.51 @@ -1589,7 +1607,7 @@ static int iommu_prepare_rmrr_dev( 1.52 if ( ret ) 1.53 return ret; 1.54 1.55 - if ( domain_context_mapped(d, pdev) == 0 ) 1.56 + if ( domain_context_mapped(pdev) == 0 ) 1.57 { 1.58 drhd = acpi_find_matched_drhd_unit(pdev); 1.59 ret = domain_context_mapping(d, drhd->iommu, pdev);
2.1 --- a/xen/include/asm-x86/hvm/vmx/intel-iommu.h Tue Nov 27 12:49:16 2007 +0000 2.2 +++ b/xen/include/asm-x86/hvm/vmx/intel-iommu.h Wed Nov 28 12:34:11 2007 +0000 2.3 @@ -89,7 +89,8 @@ 2.4 #define cap_plmr(c) (((c) >> 5) & 1) 2.5 #define cap_rwbf(c) (((c) >> 4) & 1) 2.6 #define cap_afl(c) (((c) >> 3) & 1) 2.7 -#define cap_ndoms(c) (2 ^ (4 + 2 * ((c) & 0x7))) 2.8 +#define cap_ndoms(c) (1 << (4 + 2 * ((c) & 0x7))) 2.9 + 2.10 /* 2.11 * Extended Capability Register 2.12 */