1.1 --- a/xen/drivers/passthrough/amd/iommu_acpi.c	Tue Jan 25 18:27:43 2011 +0000
     1.2 +++ b/xen/drivers/passthrough/amd/iommu_acpi.c	Wed Jan 26 08:17:14 2011 +0000
     1.3 @@ -289,16 +289,16 @@ static int __init parse_ivmd_device_rang
     1.4      first_bdf = ivmd_block->header.dev_id;
     1.5      if ( first_bdf >= ivrs_bdf_entries )
     1.6      {
     1.7 -        AMD_IOMMU_DEBUG(
     1.8 -            "IVMD Error: Invalid Range_First Dev_Id 0x%x\n", first_bdf);
     1.9 +        AMD_IOMMU_DEBUG("IVMD Error: "
    1.10 +                        "Invalid Range_First Dev_Id 0x%x\n", first_bdf);
    1.11          return -ENODEV;
    1.12      }
    1.13  
    1.14      last_bdf = ivmd_block->last_dev_id;
    1.15      if ( (last_bdf >= ivrs_bdf_entries) || (last_bdf <= first_bdf) )
    1.16      {
    1.17 -        AMD_IOMMU_DEBUG(
    1.18 -            "IVMD Error: Invalid Range_Last Dev_Id 0x%x\n", last_bdf);
    1.19 +        AMD_IOMMU_DEBUG("IVMD Error: "
    1.20 +                        "Invalid Range_Last Dev_Id 0x%x\n", last_bdf);
    1.21          return -ENODEV;
    1.22      }
    1.23  
    1.24 @@ -321,7 +321,7 @@ static int __init parse_ivmd_device_iomm
    1.25      if ( !iommu )
    1.26      {
    1.27          AMD_IOMMU_DEBUG("IVMD Error: No IOMMU for Dev_Id 0x%x  Cap 0x%x\n",
    1.28 -                ivmd_block->header.dev_id, ivmd_block->cap_offset);
    1.29 +                        ivmd_block->header.dev_id, ivmd_block->cap_offset);
    1.30          return -ENODEV;
    1.31      }
    1.32  
    1.33 @@ -441,24 +441,24 @@ static u16 __init parse_ivhd_device_rang
    1.34           AMD_IOMMU_ACPI_IVHD_DEV_RANGE_END )
    1.35      {
    1.36          AMD_IOMMU_DEBUG("IVHD Error: "
    1.37 -                "Invalid Range: End_Type 0x%x\n",
    1.38 -                ivhd_device->range.trailer.type);
    1.39 +                        "Invalid Range: End_Type 0x%x\n",
    1.40 +                        ivhd_device->range.trailer.type);
    1.41          return 0;
    1.42      }
    1.43  
    1.44      first_bdf = ivhd_device->header.dev_id;
    1.45      if ( first_bdf >= ivrs_bdf_entries )
    1.46      {
    1.47 -        AMD_IOMMU_DEBUG(
    1.48 -            "IVHD Error: Invalid Range: First Dev_Id 0x%x\n", first_bdf);
    1.49 +        AMD_IOMMU_DEBUG("IVHD Error: "
    1.50 +                        "Invalid Range: First Dev_Id 0x%x\n", first_bdf);
    1.51          return 0;
    1.52      }
    1.53  
    1.54      last_bdf = ivhd_device->range.trailer.dev_id;
    1.55      if ( (last_bdf >= ivrs_bdf_entries) || (last_bdf <= first_bdf) )
    1.56      {
    1.57 -        AMD_IOMMU_DEBUG(
    1.58 -            "IVHD Error: Invalid Range: Last Dev_Id 0x%x\n", last_bdf);
    1.59 +        AMD_IOMMU_DEBUG("IVHD Error: "
    1.60 +                        "Invalid Range: Last Dev_Id 0x%x\n", last_bdf);
    1.61          return 0;
    1.62      }
    1.63  
    1.64 @@ -522,16 +522,16 @@ static u16 __init parse_ivhd_device_alia
    1.65           AMD_IOMMU_ACPI_IVHD_DEV_RANGE_END )
    1.66      {
    1.67          AMD_IOMMU_DEBUG("IVHD Error: "
    1.68 -                "Invalid Range: End_Type 0x%x\n",
    1.69 -                ivhd_device->alias_range.trailer.type);
    1.70 +                        "Invalid Range: End_Type 0x%x\n",
    1.71 +                        ivhd_device->alias_range.trailer.type);
    1.72          return 0;
    1.73      }
    1.74  
    1.75      first_bdf = ivhd_device->header.dev_id;
    1.76      if ( first_bdf >= ivrs_bdf_entries )
    1.77      {
    1.78 -        AMD_IOMMU_DEBUG(
    1.79 -            "IVHD Error: Invalid Range: First Dev_Id 0x%x\n", first_bdf);
    1.80 +        AMD_IOMMU_DEBUG("IVHD Error: "
    1.81 +                        "Invalid Range: First Dev_Id 0x%x\n", first_bdf);
    1.82          return 0;
    1.83      }
    1.84  
    1.85 @@ -601,29 +601,29 @@ static u16 __init parse_ivhd_device_exte
    1.86           AMD_IOMMU_ACPI_IVHD_DEV_RANGE_END )
    1.87      {
    1.88          AMD_IOMMU_DEBUG("IVHD Error: "
    1.89 -                "Invalid Range: End_Type 0x%x\n",
    1.90 -                ivhd_device->extended_range.trailer.type);
    1.91 +                        "Invalid Range: End_Type 0x%x\n",
    1.92 +                        ivhd_device->extended_range.trailer.type);
    1.93          return 0;
    1.94      }
    1.95  
    1.96      first_bdf = ivhd_device->header.dev_id;
    1.97      if ( first_bdf >= ivrs_bdf_entries )
    1.98      {
    1.99 -        AMD_IOMMU_DEBUG(
   1.100 -            "IVHD Error: Invalid Range: First Dev_Id 0x%x\n", first_bdf);
   1.101 +        AMD_IOMMU_DEBUG("IVHD Error: "
   1.102 +                        "Invalid Range: First Dev_Id 0x%x\n", first_bdf);
   1.103          return 0;
   1.104      }
   1.105  
   1.106      last_bdf = ivhd_device->extended_range.trailer.dev_id;
   1.107      if ( (last_bdf >= ivrs_bdf_entries) || (last_bdf <= first_bdf) )
   1.108      {
   1.109 -        AMD_IOMMU_DEBUG(
   1.110 -            "IVHD Error: Invalid Range: Last Dev_Id 0x%x\n", last_bdf);
   1.111 +        AMD_IOMMU_DEBUG("IVHD Error: "
   1.112 +                        "Invalid Range: Last Dev_Id 0x%x\n", last_bdf);
   1.113          return 0;
   1.114      }
   1.115  
   1.116      AMD_IOMMU_DEBUG(" Dev_Id Range: 0x%x -> 0x%x\n",
   1.117 -            first_bdf, last_bdf);
   1.118 +                    first_bdf, last_bdf);
   1.119  
   1.120      for ( bdf = first_bdf; bdf <= last_bdf; bdf++ )
   1.121          add_ivrs_mapping_entry(bdf, bdf, ivhd_device->header.flags, iommu);
   1.122 @@ -675,7 +675,7 @@ static int __init parse_ivhd_block(struc
   1.123      if ( !iommu )
   1.124      {
   1.125          AMD_IOMMU_DEBUG("IVHD Error: No IOMMU for Dev_Id 0x%x  Cap 0x%x\n",
   1.126 -                ivhd_block->header.dev_id, ivhd_block->cap_offset);
   1.127 +                        ivhd_block->header.dev_id, ivhd_block->cap_offset);
   1.128          return -ENODEV;
   1.129      }
   1.130  
   1.131 @@ -809,7 +809,7 @@ static void __init dump_acpi_table_heade
   1.132      printk("\n");
   1.133  
   1.134      AMD_IOMMU_DEBUG(" Creator_Revision 0x%x\n",
   1.135 -           table->asl_compiler_revision);
   1.136 +                    table->asl_compiler_revision);
   1.137  
   1.138  }
   1.139  
   1.140 @@ -841,9 +841,9 @@ static int __init parse_ivrs_table(struc
   1.141          if ( table->length < (length + ivrs_block->length) )
   1.142          {
   1.143              AMD_IOMMU_DEBUG("IVRS Error: "
   1.144 -                    "Table Length Exceeded: 0x%x -> 0x%lx\n",
   1.145 -                    table->length,
   1.146 -                    (length + ivrs_block->length));
   1.147 +                            "Table Length Exceeded: 0x%x -> 0x%lx\n",
   1.148 +                            table->length,
   1.149 +                            (length + ivrs_block->length));
   1.150              return -ENODEV;
   1.151          }
   1.152  
   1.153 @@ -869,8 +869,7 @@ static int __init detect_iommu_acpi(stru
   1.154          checksum += raw_table[i];
   1.155      if ( checksum )
   1.156      {
   1.157 -        AMD_IOMMU_DEBUG("IVRS Error: "
   1.158 -                "Invalid Checksum 0x%x\n", checksum);
   1.159 +        AMD_IOMMU_DEBUG("IVRS Error: Invalid Checksum 0x%x\n", checksum);
   1.160          return -ENODEV;
   1.161      }
   1.162  

     2.1 --- a/xen/drivers/passthrough/amd/iommu_init.c	Tue Jan 25 18:27:43 2011 +0000
     2.2 +++ b/xen/drivers/passthrough/amd/iommu_init.c	Wed Jan 26 08:17:14 2011 +0000
     2.3 @@ -324,7 +324,7 @@ static void amd_iommu_reset_event_log(st
     2.4      if ( log_run )
     2.5      {
     2.6          AMD_IOMMU_DEBUG("Warning: EventLogRun bit is not cleared"
     2.7 -                       "before reset!\n");
     2.8 +                        "before reset!\n");
     2.9          return;
    2.10      }
    2.11  
    2.12 @@ -357,7 +357,9 @@ static void iommu_msi_set_affinity(unsig
    2.13      u8 func = PCI_FUNC(iommu->bdf & 0xff);
    2.14  
    2.15      dest = set_desc_affinity(desc, &mask);
    2.16 -    if (dest == BAD_APICID){
    2.17 +
    2.18 +    if ( dest == BAD_APICID )
    2.19 +    {
    2.20          dprintk(XENLOG_ERR, "Set iommu interrupt affinity error!\n");
    2.21          return;
    2.22      }
    2.23 @@ -448,7 +450,7 @@ static void iommu_msi_end(unsigned int i
    2.24  
    2.25  
    2.26  static hw_irq_controller iommu_msi_type = {
    2.27 -    .typename = "AMD_IOV_MSI",
    2.28 +    .typename = "AMD-IOMMU-MSI",
    2.29      .startup = iommu_msi_startup,
    2.30      .shutdown = iommu_msi_mask,
    2.31      .enable = iommu_msi_unmask,
    2.32 @@ -464,7 +466,7 @@ static void parse_event_log_entry(u32 en
    2.33      u32 code;
    2.34      u64 *addr;
    2.35      char * event_str[] = {"ILLEGAL_DEV_TABLE_ENTRY",
    2.36 -                          "IO_PAGE_FALT",
    2.37 +                          "IO_PAGE_FAULT",
    2.38                            "DEV_TABLE_HW_ERROR",
    2.39                            "PAGE_TABLE_HW_ERROR",
    2.40                            "ILLEGAL_COMMAND_ERROR",
    2.41 @@ -482,7 +484,7 @@ static void parse_event_log_entry(u32 en
    2.42          return;
    2.43      }
    2.44  
    2.45 -    if ( code == IOMMU_EVENT_IO_PAGE_FALT )
    2.46 +    if ( code == IOMMU_EVENT_IO_PAGE_FAULT )
    2.47      {
    2.48          device_id = get_field_from_reg_u32(entry[0],
    2.49                                             IOMMU_EVENT_DEVICE_ID_MASK,
    2.50 @@ -491,9 +493,10 @@ static void parse_event_log_entry(u32 en
    2.51                                             IOMMU_EVENT_DOMAIN_ID_MASK,
    2.52                                             IOMMU_EVENT_DOMAIN_ID_SHIFT);
    2.53          addr= (u64*) (entry + 2);
    2.54 -        printk(XENLOG_ERR "AMD_IOV: "
    2.55 -            "%s: domain:%d, device id:0x%x, fault address:0x%"PRIx64"\n",
    2.56 -            event_str[code-1], domain_id, device_id, *addr);
    2.57 +        printk(XENLOG_ERR "AMD-Vi: "
    2.58 +               "%s: domain = %d, device id = 0x%04x, "
    2.59 +               "fault address = 0x%"PRIx64"\n",
    2.60 +               event_str[code-1], domain_id, device_id, *addr);
    2.61      }
    2.62      else
    2.63      {
    2.64 @@ -810,9 +813,9 @@ static int __init amd_iommu_setup_device
    2.65              amd_iommu_set_intremap_table(
    2.66                  dte, (u64)virt_to_maddr(intr_tb), iommu_intremap);
    2.67  
    2.68 -            AMD_IOMMU_DEBUG("Add device table entry at DTE:0x%x, "
    2.69 -                "intremap_table:%"PRIx64"\n", bdf,
    2.70 -                (u64)virt_to_maddr(intr_tb));
    2.71 +            AMD_IOMMU_DEBUG("Add device table entry: device id = 0x%04x, "
    2.72 +                            "interupt table = 0x%"PRIx64"\n", bdf,
    2.73 +                            (u64)virt_to_maddr(intr_tb));
    2.74          }
    2.75      }
    2.76  

     3.1 --- a/xen/drivers/passthrough/amd/iommu_intr.c	Tue Jan 25 18:27:43 2011 +0000
     3.2 +++ b/xen/drivers/passthrough/amd/iommu_intr.c	Wed Jan 26 08:17:14 2011 +0000
     3.3 @@ -183,8 +183,8 @@ int __init amd_iommu_setup_ioapic_remapp
     3.4              iommu = find_iommu_for_device(bdf);
     3.5              if ( !iommu )
     3.6              {
     3.7 -                AMD_IOMMU_DEBUG(
     3.8 -                "Fail to find iommu for ioapic device id = 0x%x\n", bdf);
     3.9 +                AMD_IOMMU_DEBUG("Fail to find iommu for ioapic "
    3.10 +                                "device id = 0x%x\n", bdf);
    3.11                  continue;
    3.12              }
    3.13  
    3.14 @@ -233,8 +233,8 @@ void amd_iommu_ioapic_update_ire(
    3.15      iommu = find_iommu_for_device(bdf);
    3.16      if ( !iommu )
    3.17      {
    3.18 -        AMD_IOMMU_DEBUG(
    3.19 -            "Fail to find iommu for ioapic device id = 0x%x\n", bdf);
    3.20 +        AMD_IOMMU_DEBUG("Fail to find iommu for ioapic device id = 0x%x\n",
    3.21 +                        bdf);
    3.22          return;
    3.23      }
    3.24      if ( rte_upper )
    3.25 @@ -350,9 +350,8 @@ void amd_iommu_msi_msg_update_ire(
    3.26  
    3.27      if ( !iommu )
    3.28      {
    3.29 -        AMD_IOMMU_DEBUG(
    3.30 -            "Fail to find iommu for MSI device id = 0x%x\n",
    3.31 -            (pdev->bus << 8) | pdev->devfn);
    3.32 +        AMD_IOMMU_DEBUG("Fail to find iommu for MSI device id = 0x%x\n",
    3.33 +                       (pdev->bus << 8) | pdev->devfn);
    3.34          return;
    3.35      }
    3.36  

     4.1 --- a/xen/drivers/passthrough/amd/iommu_map.c	Tue Jan 25 18:27:43 2011 +0000
     4.2 +++ b/xen/drivers/passthrough/amd/iommu_map.c	Wed Jan 26 08:17:14 2011 +0000
     4.3 @@ -535,7 +535,7 @@ int amd_iommu_reserve_domain_unity_map(
     4.4          {
     4.5              spin_unlock(&hd->mapping_lock);
     4.6              AMD_IOMMU_DEBUG("Invalid IO pagetable entry phys_addr = %lx\n",
     4.7 -                          phys_addr);
     4.8 +                            phys_addr);
     4.9              domain_crash(domain);
    4.10              return -EFAULT;
    4.11          }

     5.1 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c	Tue Jan 25 18:27:43 2011 +0000
     5.2 +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c	Wed Jan 26 08:17:14 2011 +0000
     5.3 @@ -109,9 +109,11 @@ static void amd_iommu_setup_domain_devic
     5.4          invalidate_dev_table_entry(iommu, req_id);
     5.5          flush_command_buffer(iommu);
     5.6  
     5.7 -        AMD_IOMMU_DEBUG("Setup I/O page table at DTE:0x%x, root_table:%"PRIx64","
     5.8 -        "domain_id:%d, paging_mode:%d\n", req_id,
     5.9 -        page_to_maddr(hd->root_table), hd->domain_id, hd->paging_mode);
    5.10 +        AMD_IOMMU_DEBUG("Setup I/O page table: device id = 0x%04x, "
    5.11 +                        "root table = 0x%"PRIx64", "
    5.12 +                        "domain = %d, paging mode = %d\n", req_id,
    5.13 +                        page_to_maddr(hd->root_table),
    5.14 +                        hd->domain_id, hd->paging_mode);
    5.15      }
    5.16  
    5.17      spin_unlock_irqrestore(&iommu->lock, flags);
    5.18 @@ -160,7 +162,7 @@ int __init amd_iov_detect(void)
    5.19  
    5.20      if ( amd_iommu_init() != 0 )
    5.21      {
    5.22 -        printk("Error initialization\n");
    5.23 +        printk("AMD-Vi: Error initialization\n");
    5.24          return -ENODEV;
    5.25      }
    5.26  
    5.27 @@ -262,10 +264,10 @@ static void amd_iommu_disable_domain_dev
    5.28          disable_translation((u32 *)dte);
    5.29          invalidate_dev_table_entry(iommu, req_id);
    5.30          flush_command_buffer(iommu);
    5.31 -        AMD_IOMMU_DEBUG("Disable DTE:0x%x,"
    5.32 -                " domain_id:%d, paging_mode:%d\n",
    5.33 -                req_id,  domain_hvm_iommu(domain)->domain_id,
    5.34 -                domain_hvm_iommu(domain)->paging_mode);
    5.35 +        AMD_IOMMU_DEBUG("Disable: device id = 0x%04x, "
    5.36 +                        "domain = %d, paging mode = %d\n",
    5.37 +                        req_id,  domain_hvm_iommu(domain)->domain_id,
    5.38 +                        domain_hvm_iommu(domain)->paging_mode);
    5.39      }
    5.40      spin_unlock_irqrestore(&iommu->lock, flags);
    5.41  }
    5.42 @@ -287,8 +289,9 @@ static int reassign_device( struct domai
    5.43      if ( !iommu )
    5.44      {
    5.45          AMD_IOMMU_DEBUG("Fail to find iommu."
    5.46 -            " %x:%x.%x cannot be assigned to domain %d\n", 
    5.47 -            bus, PCI_SLOT(devfn), PCI_FUNC(devfn), target->domain_id);
    5.48 +                        " %02x:%x02.%x cannot be assigned to domain %d\n", 
    5.49 +                        bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
    5.50 +                        target->domain_id);
    5.51          return -ENODEV;
    5.52      }
    5.53  
    5.54 @@ -298,9 +301,9 @@ static int reassign_device( struct domai
    5.55      pdev->domain = target;
    5.56  
    5.57      amd_iommu_setup_domain_device(target, iommu, bdf);
    5.58 -    AMD_IOMMU_DEBUG("reassign %x:%x.%x domain %d -> domain %d\n",
    5.59 -                 bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
    5.60 -                 source->domain_id, target->domain_id);
    5.61 +    AMD_IOMMU_DEBUG("Re-assign %02x:%02x.%x from domain %d to domain %d\n",
    5.62 +                    bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
    5.63 +                    source->domain_id, target->domain_id);
    5.64  
    5.65      return 0;
    5.66  }
    5.67 @@ -387,9 +390,9 @@ static int amd_iommu_add_device(struct p
    5.68      if ( !iommu )
    5.69      {
    5.70          AMD_IOMMU_DEBUG("Fail to find iommu."
    5.71 -            " %x:%x.%x cannot be assigned to domain %d\n", 
    5.72 -            pdev->bus, PCI_SLOT(pdev->devfn),
    5.73 -            PCI_FUNC(pdev->devfn), pdev->domain->domain_id);
    5.74 +                        " %02x:%02x.%x cannot be assigned to domain %d\n", 
    5.75 +                        pdev->bus, PCI_SLOT(pdev->devfn),
    5.76 +                        PCI_FUNC(pdev->devfn), pdev->domain->domain_id);
    5.77          return -ENODEV;
    5.78      }
    5.79  
    5.80 @@ -409,9 +412,9 @@ static int amd_iommu_remove_device(struc
    5.81      if ( !iommu )
    5.82      {
    5.83          AMD_IOMMU_DEBUG("Fail to find iommu."
    5.84 -            " %x:%x.%x cannot be removed from domain %d\n", 
    5.85 -            pdev->bus, PCI_SLOT(pdev->devfn),
    5.86 -            PCI_FUNC(pdev->devfn), pdev->domain->domain_id);
    5.87 +                        " %02x:%02x.%x cannot be removed from domain %d\n", 
    5.88 +                        pdev->bus, PCI_SLOT(pdev->devfn),
    5.89 +                        PCI_FUNC(pdev->devfn), pdev->domain->domain_id);
    5.90          return -ENODEV;
    5.91      }
    5.92  

     6.1 --- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h	Tue Jan 25 18:27:43 2011 +0000
     6.2 +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h	Wed Jan 26 08:17:14 2011 +0000
     6.3 @@ -256,7 +256,7 @@
     6.4  #define IOMMU_EVENT_CODE_MASK			0xF0000000
     6.5  #define IOMMU_EVENT_CODE_SHIFT			28
     6.6  #define IOMMU_EVENT_ILLEGAL_DEV_TABLE_ENTRY	0x1
     6.7 -#define IOMMU_EVENT_IO_PAGE_FALT		0x2
     6.8 +#define IOMMU_EVENT_IO_PAGE_FAULT		0x2
     6.9  #define IOMMU_EVENT_DEV_TABLE_HW_ERROR		0x3
    6.10  #define IOMMU_EVENT_PAGE_TABLE_HW_ERROR		0x4
    6.11  #define IOMMU_EVENT_ILLEGAL_COMMAND_ERROR	0x5