debuggers.hg

changeset 20907:f85120520509

x86 mca: Handle the vMCA bank correctly

Currently the virtual MCE MSR assume all MSRs range from 0 to
MAX_NR_BANKS are always MCE MSR, this is not always correct. With this
patch, the mce_rdmsr/mce_wrmsr will only handle vMCE MSR range from 0
to the MCA banks in the host platform.
Please notice that some MSR beyond current MCA banks in the host
platform are really MCA MSRs, that should be handled by general MSR
handler.

Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jan 29 06:47:24 2010 +0000 (2010-01-29)
parents b4244eff4384
children 7310235f74f8
files xen/arch/x86/cpu/mcheck/mce.c
line diff
     1.1 --- a/xen/arch/x86/cpu/mcheck/mce.c	Fri Jan 29 06:45:45 2010 +0000
     1.2 +++ b/xen/arch/x86/cpu/mcheck/mce.c	Fri Jan 29 06:47:24 2010 +0000
     1.3 @@ -716,8 +716,8 @@ int mce_rdmsr(uint32_t msr, uint64_t *va
     1.4          bank = (msr - MSR_IA32_MC0_CTL) / 4;
     1.5          if ( bank >= (d->arch.vmca_msrs.mcg_cap & MCG_CAP_COUNT) )
     1.6          {
     1.7 -            mce_printk(MCE_QUIET, "MCE: bank %u does not exist\n", bank);
     1.8 -            ret = -1;
     1.9 +            mce_printk(MCE_QUIET, "MCE: MSR %x is not MCA MSR\n", msr);
    1.10 +            ret = 0;
    1.11              break;
    1.12          }
    1.13          switch (msr & (MSR_IA32_MC0_CTL | 3))
    1.14 @@ -848,8 +848,8 @@ int mce_wrmsr(u32 msr, u64 val)
    1.15          bank = (msr - MSR_IA32_MC0_CTL) / 4;
    1.16          if ( bank >= (d->arch.vmca_msrs.mcg_cap & MCG_CAP_COUNT) )
    1.17          {
    1.18 -            mce_printk(MCE_QUIET, "MCE: bank %u does not exist\n", bank);
    1.19 -            ret = -1;
    1.20 +            mce_printk(MCE_QUIET, "MCE: MSR %x is not MCA MSR\n", msr);
    1.21 +            ret = 0;
    1.22              break;
    1.23          }
    1.24          switch ( msr & (MSR_IA32_MC0_CTL | 3) )