xen-vtx-unstable

annotate xen/include/asm-x86/vmx.h @ 5775:9b77ba29108d

The VMCS control bits in the current tree are not optimal. Attached is
a patch to improve the VMCS control bits setting. It also adds checks to
detect any non-optimal or incompatible settings for the VMCS control
bits based on MSRs, and fixes a bug associated with vmcs region freeing.

Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Thu Jul 14 08:00:55 2005 +0000 (2005-07-14)
parents 71d000e59b13
children a83ac0806d6b
rev   line source
iap10@3290 1 /*
iap10@3290 2 * vmx.h: VMX Architecture related definitions
iap10@3290 3 * Copyright (c) 2004, Intel Corporation.
iap10@3290 4 *
iap10@3290 5 * This program is free software; you can redistribute it and/or modify it
iap10@3290 6 * under the terms and conditions of the GNU General Public License,
iap10@3290 7 * version 2, as published by the Free Software Foundation.
iap10@3290 8 *
iap10@3290 9 * This program is distributed in the hope it will be useful, but WITHOUT
iap10@3290 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
iap10@3290 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
iap10@3290 12 * more details.
iap10@3290 13 *
iap10@3290 14 * You should have received a copy of the GNU General Public License along with
iap10@3290 15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
iap10@3290 16 * Place - Suite 330, Boston, MA 02111-1307 USA.
iap10@3290 17 *
iap10@3290 18 */
iap10@3290 19 #ifndef __ASM_X86_VMX_H__
iap10@3290 20 #define __ASM_X86_VMX_H__
iap10@3290 21
iap10@3290 22 #include <xen/sched.h>
iap10@3290 23 #include <asm/types.h>
iap10@3290 24 #include <asm/regs.h>
iap10@3290 25 #include <asm/processor.h>
iap10@3290 26 #include <asm/vmx_vmcs.h>
cl349@4856 27 #include <asm/i387.h>
iap10@3290 28
arun@5608 29 #include <public/io/ioreq.h>
arun@5608 30
kaf24@4683 31 extern void vmx_asm_vmexit_handler(struct cpu_user_regs);
iap10@3290 32 extern void vmx_asm_do_resume(void);
iap10@3290 33 extern void vmx_asm_do_launch(void);
kaf24@5289 34 extern void vmx_intr_assist(struct vcpu *d);
iap10@3290 35
kaf24@5289 36 extern void arch_vmx_do_launch(struct vcpu *);
kaf24@5289 37 extern void arch_vmx_do_resume(struct vcpu *);
iap10@3290 38
iap10@3290 39 extern int vmcs_size;
iap10@3290 40 extern unsigned int cpu_rev;
iap10@3290 41
iap10@3290 42 /*
iap10@3290 43 * Need fill bits for SENTER
iap10@3290 44 */
iap10@3290 45
kaf24@5414 46 #define MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE 0x00000016
kaf24@5414 47
kaf24@5414 48 #define MONITOR_PIN_BASED_EXEC_CONTROLS \
kaf24@5775 49 ( \
kaf24@5414 50 MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE | \
kaf24@5414 51 PIN_BASED_EXT_INTR_MASK | \
kaf24@5775 52 PIN_BASED_NMI_EXITING \
kaf24@5775 53 )
kaf24@5414 54
kaf24@5414 55 #define MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE 0x0401e172
iap10@3290 56
kaf24@5775 57 #define _MONITOR_CPU_BASED_EXEC_CONTROLS \
kaf24@5775 58 ( \
kaf24@5414 59 MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE | \
kaf24@5414 60 CPU_BASED_HLT_EXITING | \
kaf24@5414 61 CPU_BASED_INVDPG_EXITING | \
kaf24@5414 62 CPU_BASED_MWAIT_EXITING | \
kaf24@5414 63 CPU_BASED_MOV_DR_EXITING | \
kaf24@5775 64 CPU_BASED_UNCOND_IO_EXITING \
kaf24@5775 65 )
kaf24@5775 66
kaf24@5775 67 #define MONITOR_CPU_BASED_EXEC_CONTROLS_IA32E_MODE \
kaf24@5775 68 ( \
kaf24@5414 69 CPU_BASED_CR8_LOAD_EXITING | \
kaf24@5775 70 CPU_BASED_CR8_STORE_EXITING \
kaf24@5775 71 )
kaf24@5775 72
kaf24@5775 73 #define MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE 0x0003edff
kaf24@5414 74
kaf24@5775 75 #define MONITOR_VM_EXIT_CONTROLS_IA32E_MODE 0x00000200
kaf24@5775 76
kaf24@5775 77 #define _MONITOR_VM_EXIT_CONTROLS \
kaf24@5775 78 ( \
kaf24@5775 79 MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE |\
kaf24@5775 80 VM_EXIT_ACK_INTR_ON_EXIT \
kaf24@5775 81 )
kaf24@5414 82
kaf24@5775 83 #if defined (__x86_64__)
kaf24@5775 84 #define MONITOR_CPU_BASED_EXEC_CONTROLS \
kaf24@5775 85 ( \
kaf24@5775 86 _MONITOR_CPU_BASED_EXEC_CONTROLS | \
kaf24@5775 87 MONITOR_CPU_BASED_EXEC_CONTROLS_IA32E_MODE \
kaf24@5775 88 )
kaf24@5775 89 #define MONITOR_VM_EXIT_CONTROLS \
kaf24@5775 90 ( \
kaf24@5775 91 _MONITOR_VM_EXIT_CONTROLS | \
kaf24@5775 92 MONITOR_VM_EXIT_CONTROLS_IA32E_MODE \
kaf24@5775 93 )
kaf24@5775 94 #else
kaf24@5775 95 #define MONITOR_CPU_BASED_EXEC_CONTROLS \
kaf24@5775 96 _MONITOR_CPU_BASED_EXEC_CONTROLS
kaf24@5414 97
kaf24@5775 98 #define MONITOR_VM_EXIT_CONTROLS \
kaf24@5775 99 _MONITOR_VM_EXIT_CONTROLS
kaf24@5775 100 #endif
kaf24@5414 101
kaf24@5414 102 #define VM_ENTRY_CONTROLS_RESERVED_VALUE 0x000011ff
kaf24@5775 103 #define VM_ENTRY_CONTROLS_IA32E_MODE 0x00000200
kaf24@5414 104 #define MONITOR_VM_ENTRY_CONTROLS VM_ENTRY_CONTROLS_RESERVED_VALUE
iap10@3290 105 /*
iap10@3290 106 * Exit Reasons
iap10@3290 107 */
iap10@3290 108 #define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000
iap10@3290 109
iap10@3290 110 #define EXIT_REASON_EXCEPTION_NMI 0
iap10@3290 111 #define EXIT_REASON_EXTERNAL_INTERRUPT 1
iap10@3290 112
iap10@3290 113 #define EXIT_REASON_PENDING_INTERRUPT 7
iap10@3290 114
iap10@3290 115 #define EXIT_REASON_TASK_SWITCH 9
iap10@3290 116 #define EXIT_REASON_CPUID 10
iap10@3290 117 #define EXIT_REASON_HLT 12
iap10@3290 118 #define EXIT_REASON_INVLPG 14
iap10@3290 119 #define EXIT_REASON_RDPMC 15
iap10@3290 120 #define EXIT_REASON_RDTSC 16
iap10@3290 121 #define EXIT_REASON_VMCALL 18
iap10@3290 122
iap10@3290 123 #define EXIT_REASON_CR_ACCESS 28
iap10@3290 124 #define EXIT_REASON_DR_ACCESS 29
iap10@3290 125 #define EXIT_REASON_IO_INSTRUCTION 30
iap10@3290 126 #define EXIT_REASON_MSR_READ 31
iap10@3290 127 #define EXIT_REASON_MSR_WRITE 32
iap10@3290 128 #define EXIT_REASON_MWAIT_INSTRUCTION 36
iap10@3290 129
iap10@3290 130 /*
iap10@3290 131 * Interruption-information format
iap10@3290 132 */
iap10@3290 133 #define INTR_INFO_VECTOR_MASK 0xff /* 7:0 */
iap10@3290 134 #define INTR_INFO_INTR_TYPE_MASK 0x700 /* 10:8 */
iap10@3290 135 #define INTR_INFO_DELIEVER_CODE_MASK 0x800 /* 11 */
iap10@3290 136 #define INTR_INFO_VALID_MASK 0x80000000 /* 31 */
iap10@3290 137
iap10@3290 138 #define INTR_TYPE_EXT_INTR (0 << 8) /* external interrupt */
iap10@3290 139 #define INTR_TYPE_EXCEPTION (3 << 8) /* processor exception */
iap10@3290 140
iap10@3290 141 /*
iap10@3290 142 * Exit Qualifications for MOV for Control Register Access
iap10@3290 143 */
iap10@3290 144 #define CONTROL_REG_ACCESS_NUM 0x7 /* 2:0, number of control register */
iap10@3290 145 #define CONTROL_REG_ACCESS_TYPE 0x30 /* 5:4, access type */
iap10@3290 146 #define TYPE_MOV_TO_CR (0 << 4)
iap10@3290 147 #define TYPE_MOV_FROM_CR (1 << 4)
iap10@3290 148 #define TYPE_CLTS (2 << 4)
leendert@4652 149 #define TYPE_LMSW (3 << 4)
kaf24@5414 150 #define CONTROL_REG_ACCESS_REG 0xf00 /* 10:8, general purpose register */
kaf24@5414 151 #define LMSW_SOURCE_DATA (0xFFFF << 16) /* 16:31 lmsw source */
iap10@3290 152 #define REG_EAX (0 << 8)
iap10@3290 153 #define REG_ECX (1 << 8)
iap10@3290 154 #define REG_EDX (2 << 8)
iap10@3290 155 #define REG_EBX (3 << 8)
iap10@3290 156 #define REG_ESP (4 << 8)
iap10@3290 157 #define REG_EBP (5 << 8)
iap10@3290 158 #define REG_ESI (6 << 8)
iap10@3290 159 #define REG_EDI (7 << 8)
kaf24@5414 160 #define REG_R8 (8 << 8)
kaf24@5414 161 #define REG_R9 (9 << 8)
kaf24@5414 162 #define REG_R10 (10 << 8)
kaf24@5414 163 #define REG_R11 (11 << 8)
kaf24@5414 164 #define REG_R12 (12 << 8)
kaf24@5414 165 #define REG_R13 (13 << 8)
kaf24@5414 166 #define REG_R14 (14 << 8)
kaf24@5414 167 #define REG_R15 (15 << 8)
iap10@3290 168
iap10@3290 169 /*
iap10@3290 170 * Exit Qualifications for MOV for Debug Register Access
iap10@3290 171 */
iap10@3290 172 #define DEBUG_REG_ACCESS_NUM 0x7 /* 2:0, number of debug register */
iap10@3290 173 #define DEBUG_REG_ACCESS_TYPE 0x10 /* 4, direction of access */
iap10@3290 174 #define TYPE_MOV_TO_DR (0 << 4)
iap10@3290 175 #define TYPE_MOV_FROM_DR (1 << 4)
kaf24@5414 176 #define DEBUG_REG_ACCESS_REG 0xf00 /* 11:8, general purpose register */
iap10@3290 177
iap10@3290 178 #define EXCEPTION_BITMAP_DE (1 << 0) /* Divide Error */
iap10@3290 179 #define EXCEPTION_BITMAP_DB (1 << 1) /* Debug */
iap10@3290 180 #define EXCEPTION_BITMAP_NMI (1 << 2) /* NMI */
iap10@3290 181 #define EXCEPTION_BITMAP_BP (1 << 3) /* Breakpoint */
iap10@3290 182 #define EXCEPTION_BITMAP_OF (1 << 4) /* Overflow */
iap10@3290 183 #define EXCEPTION_BITMAP_BR (1 << 5) /* BOUND Range Exceeded */
iap10@3290 184 #define EXCEPTION_BITMAP_UD (1 << 6) /* Invalid Opcode */
iap10@3290 185 #define EXCEPTION_BITMAP_NM (1 << 7) /* Device Not Available */
iap10@3290 186 #define EXCEPTION_BITMAP_DF (1 << 8) /* Double Fault */
iap10@3290 187 /* reserved */
iap10@3290 188 #define EXCEPTION_BITMAP_TS (1 << 10) /* Invalid TSS */
iap10@3290 189 #define EXCEPTION_BITMAP_NP (1 << 11) /* Segment Not Present */
iap10@3290 190 #define EXCEPTION_BITMAP_SS (1 << 12) /* Stack-Segment Fault */
iap10@3290 191 #define EXCEPTION_BITMAP_GP (1 << 13) /* General Protection */
iap10@3290 192 #define EXCEPTION_BITMAP_PG (1 << 14) /* Page Fault */
iap10@3290 193 #define EXCEPTION_BITMAP_MF (1 << 16) /* x87 FPU Floating-Point Error (Math Fault) */
iap10@3290 194 #define EXCEPTION_BITMAP_AC (1 << 17) /* Alignment Check */
iap10@3290 195 #define EXCEPTION_BITMAP_MC (1 << 18) /* Machine Check */
iap10@3290 196 #define EXCEPTION_BITMAP_XF (1 << 19) /* SIMD Floating-Point Exception */
iap10@3290 197
arun@4999 198 /* Pending Debug exceptions */
arun@4999 199
arun@4999 200 #define PENDING_DEBUG_EXC_BP (1 << 12) /* break point */
arun@4999 201 #define PENDING_DEBUG_EXC_BS (1 << 14) /* Single step */
arun@4999 202
iap10@3290 203 #ifdef XEN_DEBUGGER
iap10@3290 204 #define MONITOR_DEFAULT_EXCEPTION_BITMAP \
iap10@3290 205 ( EXCEPTION_BITMAP_PG | \
iap10@3290 206 EXCEPTION_BITMAP_DB | \
iap10@3290 207 EXCEPTION_BITMAP_BP | \
iap10@3290 208 EXCEPTION_BITMAP_GP )
iap10@3290 209 #else
iap10@3290 210 #define MONITOR_DEFAULT_EXCEPTION_BITMAP \
iap10@3290 211 ( EXCEPTION_BITMAP_PG | \
iap10@3290 212 EXCEPTION_BITMAP_GP )
iap10@3290 213 #endif
iap10@3290 214
kaf24@5774 215 /* These bits in the CR4 are owned by the host */
kaf24@5774 216 #ifdef __i386__
kaf24@5774 217 #define VMX_CR4_HOST_MASK (X86_CR4_VMXE)
kaf24@5774 218 #else
kaf24@5774 219 #define VMX_CR4_HOST_MASK (X86_CR4_VMXE | X86_CR4_PAE)
kaf24@5774 220 #endif
kaf24@5774 221
iap10@3290 222 #define VMCALL_OPCODE ".byte 0x0f,0x01,0xc1\n"
iap10@3290 223 #define VMCLEAR_OPCODE ".byte 0x66,0x0f,0xc7\n" /* reg/opcode: /6 */
iap10@3290 224 #define VMLAUNCH_OPCODE ".byte 0x0f,0x01,0xc2\n"
iap10@3290 225 #define VMPTRLD_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /6 */
iap10@3290 226 #define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 */
iap10@3290 227 #define VMREAD_OPCODE ".byte 0x0f,0x78\n"
iap10@3290 228 #define VMRESUME_OPCODE ".byte 0x0f,0x01,0xc3\n"
iap10@3290 229 #define VMWRITE_OPCODE ".byte 0x0f,0x79\n"
iap10@3290 230 #define VMXOFF_OPCODE ".byte 0x0f,0x01,0xc4\n"
iap10@3290 231 #define VMXON_OPCODE ".byte 0xf3,0x0f,0xc7\n"
iap10@3290 232
iap10@3290 233 #define MODRM_EAX_06 ".byte 0x30\n" /* [EAX], with reg/opcode: /6 */
iap10@3290 234 #define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */
iap10@3290 235 #define MODRM_EAX_ECX ".byte 0xc1\n" /* [EAX], [ECX] */
iap10@3290 236
iap10@3290 237 static inline int __vmptrld (u64 addr)
iap10@3290 238 {
iap10@3290 239 unsigned long eflags;
iap10@3290 240 __asm__ __volatile__ ( VMPTRLD_OPCODE
iap10@3290 241 MODRM_EAX_06
iap10@3290 242 :
iap10@3290 243 : "a" (&addr)
iap10@3290 244 : "memory");
iap10@3290 245
iap10@3290 246 __save_flags(eflags);
iap10@3290 247 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
iap10@3290 248 return -1;
iap10@3290 249 return 0;
iap10@3290 250 }
iap10@3290 251
iap10@3290 252 static inline void __vmptrst (u64 addr)
iap10@3290 253 {
iap10@3290 254 __asm__ __volatile__ ( VMPTRST_OPCODE
iap10@3290 255 MODRM_EAX_07
iap10@3290 256 :
iap10@3290 257 : "a" (&addr)
iap10@3290 258 : "memory");
iap10@3290 259 }
iap10@3290 260
iap10@3290 261 static inline int __vmpclear (u64 addr)
iap10@3290 262 {
iap10@3290 263 unsigned long eflags;
iap10@3290 264
iap10@3290 265 __asm__ __volatile__ ( VMCLEAR_OPCODE
iap10@3290 266 MODRM_EAX_06
iap10@3290 267 :
iap10@3290 268 : "a" (&addr)
iap10@3290 269 : "memory");
iap10@3290 270 __save_flags(eflags);
iap10@3290 271 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
iap10@3290 272 return -1;
iap10@3290 273 return 0;
iap10@3290 274 }
iap10@3290 275
arun@4586 276 static inline int __vmread (unsigned long field, void *value)
iap10@3290 277 {
iap10@3290 278 unsigned long eflags;
iap10@3290 279 unsigned long ecx = 0;
iap10@3290 280
iap10@3290 281 __asm__ __volatile__ ( VMREAD_OPCODE
iap10@3290 282 MODRM_EAX_ECX
iap10@3290 283 : "=c" (ecx)
iap10@3290 284 : "a" (field)
iap10@3290 285 : "memory");
iap10@3290 286
iap10@3290 287 *((long *) value) = ecx;
iap10@3290 288
iap10@3290 289 __save_flags(eflags);
iap10@3290 290 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
iap10@3290 291 return -1;
iap10@3290 292 return 0;
iap10@3290 293 }
iap10@3290 294
arun@4586 295 static inline int __vmwrite (unsigned long field, unsigned long value)
iap10@3290 296 {
iap10@3290 297 unsigned long eflags;
iap10@3290 298
iap10@3290 299 __asm__ __volatile__ ( VMWRITE_OPCODE
iap10@3290 300 MODRM_EAX_ECX
iap10@3290 301 :
iap10@3290 302 : "a" (field) , "c" (value)
iap10@3290 303 : "memory");
iap10@3290 304 __save_flags(eflags);
iap10@3290 305 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
iap10@3290 306 return -1;
iap10@3290 307 return 0;
iap10@3290 308 }
iap10@3290 309
arun@4999 310 static inline int __vm_set_bit(unsigned long field, unsigned long mask)
arun@4999 311 {
arun@4999 312 unsigned long tmp;
arun@4999 313 int err = 0;
arun@4999 314
arun@4999 315 err |= __vmread(field, &tmp);
arun@4999 316 tmp |= mask;
arun@4999 317 err |= __vmwrite(field, tmp);
arun@4999 318
arun@4999 319 return err;
arun@4999 320 }
arun@4999 321
arun@4999 322 static inline int __vm_clear_bit(unsigned long field, unsigned long mask)
arun@4999 323 {
arun@4999 324 unsigned long tmp;
arun@4999 325 int err = 0;
arun@4999 326
arun@4999 327 err |= __vmread(field, &tmp);
arun@4999 328 tmp &= ~mask;
arun@4999 329 err |= __vmwrite(field, tmp);
arun@4999 330
arun@4999 331 return err;
arun@4999 332 }
arun@4999 333
iap10@3290 334 static inline void __vmxoff (void)
iap10@3290 335 {
iap10@3290 336 __asm__ __volatile__ ( VMXOFF_OPCODE
iap10@3290 337 ::: "memory");
iap10@3290 338 }
iap10@3290 339
iap10@3290 340 static inline int __vmxon (u64 addr)
iap10@3290 341 {
iap10@3290 342 unsigned long eflags;
iap10@3290 343
iap10@3290 344 __asm__ __volatile__ ( VMXON_OPCODE
iap10@3290 345 MODRM_EAX_06
iap10@3290 346 :
iap10@3290 347 : "a" (&addr)
iap10@3290 348 : "memory");
iap10@3290 349 __save_flags(eflags);
iap10@3290 350 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
iap10@3290 351 return -1;
iap10@3290 352 return 0;
iap10@3290 353 }
arun@3910 354
cl349@4856 355 /* Make sure that xen intercepts any FP accesses from current */
cl349@4856 356 static inline void vmx_stts()
cl349@4856 357 {
cl349@4856 358 unsigned long cr0;
cl349@4856 359
cl349@4856 360 __vmread(GUEST_CR0, &cr0);
cl349@4856 361 if (!(cr0 & X86_CR0_TS))
cl349@4856 362 __vmwrite(GUEST_CR0, cr0 | X86_CR0_TS);
cl349@4856 363
cl349@4856 364 __vmread(CR0_READ_SHADOW, &cr0);
cl349@4856 365 if (!(cr0 & X86_CR0_TS))
arun@4999 366 __vm_set_bit(EXCEPTION_BITMAP, EXCEPTION_BITMAP_NM);
cl349@4856 367 }
arun@5186 368
arun@5186 369 /* Works only for ed == current */
kaf24@5289 370 static inline int vmx_paging_enabled(struct vcpu *v)
arun@5186 371 {
arun@5186 372 unsigned long cr0;
arun@5186 373
arun@5186 374 __vmread(CR0_READ_SHADOW, &cr0);
arun@5186 375 return (cr0 & X86_CR0_PE) && (cr0 & X86_CR0_PG);
arun@5186 376 }
arun@5186 377
kaf24@5646 378 #define VMX_INVALID_ERROR_CODE -1
kaf24@5646 379
kaf24@5646 380 static inline int __vmx_inject_exception(struct vcpu *v, int trap, int type,
kaf24@5646 381 int error_code)
kaf24@5646 382 {
kaf24@5646 383 unsigned long intr_fields;
kaf24@5646 384
kaf24@5646 385 /* Reflect it back into the guest */
kaf24@5646 386 intr_fields = (INTR_INFO_VALID_MASK | type | trap);
kaf24@5646 387 if (error_code != VMX_INVALID_ERROR_CODE) {
kaf24@5646 388 __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
kaf24@5646 389 intr_fields |= INTR_INFO_DELIEVER_CODE_MASK;
kaf24@5646 390 }
kaf24@5646 391
kaf24@5646 392 __vmwrite(VM_ENTRY_INTR_INFO_FIELD, intr_fields);
kaf24@5646 393 return 0;
kaf24@5646 394 }
kaf24@5646 395
kaf24@5646 396 static inline int vmx_inject_exception(struct vcpu *v, int trap, int error_code)
kaf24@5646 397 {
kaf24@5646 398 return __vmx_inject_exception(v, trap, INTR_TYPE_EXCEPTION, error_code);
kaf24@5646 399 }
kaf24@5646 400
kaf24@5646 401 static inline int vmx_inject_extint(struct vcpu *v, int trap, int error_code)
kaf24@5646 402 {
kaf24@5646 403 __vmx_inject_exception(v, trap, INTR_TYPE_EXT_INTR, error_code);
kaf24@5646 404 __vmwrite(GUEST_INTERRUPTIBILITY_INFO, 0);
kaf24@5646 405
kaf24@5646 406 return 0;
kaf24@5646 407 }
kaf24@5646 408
kaf24@5646 409 static inline int vmx_reflect_exception(struct vcpu *v)
kaf24@5646 410 {
kaf24@5646 411 int error_code, vector;
kaf24@5646 412
kaf24@5646 413 __vmread(VM_EXIT_INTR_INFO, &vector);
kaf24@5646 414 if (vector & INTR_INFO_DELIEVER_CODE_MASK)
kaf24@5646 415 __vmread(VM_EXIT_INTR_ERROR_CODE, &error_code);
kaf24@5646 416 else
kaf24@5646 417 error_code = VMX_INVALID_ERROR_CODE;
kaf24@5646 418 vector &= 0xff;
kaf24@5646 419
kaf24@5646 420 #ifndef NDEBUG
kaf24@5646 421 {
kaf24@5646 422 unsigned long eip;
kaf24@5646 423
kaf24@5646 424 __vmread(GUEST_RIP, &eip);
kaf24@5646 425 VMX_DBG_LOG(DBG_LEVEL_1,
kaf24@5646 426 "vmx_reflect_exception: eip = %lx, error_code = %x",
kaf24@5646 427 eip, error_code);
kaf24@5646 428 }
kaf24@5646 429 #endif /* NDEBUG */
kaf24@5646 430
kaf24@5646 431 vmx_inject_exception(v, vector, error_code);
kaf24@5646 432 return 0;
kaf24@5646 433 }
kaf24@5646 434
arun@5615 435 static inline shared_iopage_t *get_sp(struct domain *d)
arun@5615 436 {
arun@5615 437 return (shared_iopage_t *) d->arch.vmx_platform.shared_page_va;
arun@5615 438 }
arun@5615 439
arun@5608 440 static inline vcpu_iodata_t *get_vio(struct domain *d, unsigned long cpu)
arun@5608 441 {
arun@5615 442 return &get_sp(d)->vcpu_iodata[cpu];
arun@5608 443 }
arun@5608 444
arun@5608 445 static inline int iopacket_port(struct domain *d)
arun@5608 446 {
arun@5615 447 return get_sp(d)->sp_global.eport;
arun@5608 448 }
arun@5608 449
iap10@3290 450 #endif /* __ASM_X86_VMX_H__ */