xen-vtx-unstable

view xen/include/asm-x86/vmx.h @ 6774:4d899a738d59

merge?
author cl349@firebug.cl.cam.ac.uk
date Tue Sep 13 15:05:49 2005 +0000 (2005-09-13)
parents 3feb7fa331ed 813c37b68376
children e7c7196fa329 8ca0f98ba8e2
line source
1 /*
2 * vmx.h: VMX Architecture related definitions
3 * Copyright (c) 2004, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19 #ifndef __ASM_X86_VMX_H__
20 #define __ASM_X86_VMX_H__
22 #include <xen/sched.h>
23 #include <asm/types.h>
24 #include <asm/regs.h>
25 #include <asm/processor.h>
26 #include <asm/vmx_vmcs.h>
27 #include <asm/i387.h>
29 #include <public/io/ioreq.h>
31 extern int hvm_enabled;
33 extern void vmx_asm_vmexit_handler(struct cpu_user_regs);
34 extern void vmx_asm_do_resume(void);
35 extern void vmx_asm_do_launch(void);
36 extern void vmx_intr_assist(void);
38 extern void arch_vmx_do_launch(struct vcpu *);
39 extern void arch_vmx_do_resume(struct vcpu *);
40 extern void arch_vmx_do_relaunch(struct vcpu *);
42 extern int vmcs_size;
43 extern unsigned int cpu_rev;
45 /*
46 * Need fill bits for SENTER
47 */
49 #define MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE 0x00000016
51 #define MONITOR_PIN_BASED_EXEC_CONTROLS \
52 ( \
53 MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE | \
54 PIN_BASED_EXT_INTR_MASK | \
55 PIN_BASED_NMI_EXITING \
56 )
58 #define MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE 0x0401e172
60 #define _MONITOR_CPU_BASED_EXEC_CONTROLS \
61 ( \
62 MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE | \
63 CPU_BASED_HLT_EXITING | \
64 CPU_BASED_INVDPG_EXITING | \
65 CPU_BASED_MWAIT_EXITING | \
66 CPU_BASED_MOV_DR_EXITING | \
67 CPU_BASED_ACTIVATE_IO_BITMAP | \
68 CPU_BASED_UNCOND_IO_EXITING \
69 )
71 #define MONITOR_CPU_BASED_EXEC_CONTROLS_IA32E_MODE \
72 ( \
73 CPU_BASED_CR8_LOAD_EXITING | \
74 CPU_BASED_CR8_STORE_EXITING \
75 )
77 #define MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE 0x0003edff
79 #define MONITOR_VM_EXIT_CONTROLS_IA32E_MODE 0x00000200
81 #define _MONITOR_VM_EXIT_CONTROLS \
82 ( \
83 MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE |\
84 VM_EXIT_ACK_INTR_ON_EXIT \
85 )
87 #if defined (__x86_64__)
88 #define MONITOR_CPU_BASED_EXEC_CONTROLS \
89 ( \
90 _MONITOR_CPU_BASED_EXEC_CONTROLS | \
91 MONITOR_CPU_BASED_EXEC_CONTROLS_IA32E_MODE \
92 )
93 #define MONITOR_VM_EXIT_CONTROLS \
94 ( \
95 _MONITOR_VM_EXIT_CONTROLS | \
96 MONITOR_VM_EXIT_CONTROLS_IA32E_MODE \
97 )
98 #else
99 #define MONITOR_CPU_BASED_EXEC_CONTROLS \
100 _MONITOR_CPU_BASED_EXEC_CONTROLS
102 #define MONITOR_VM_EXIT_CONTROLS \
103 _MONITOR_VM_EXIT_CONTROLS
104 #endif
106 #define VM_ENTRY_CONTROLS_RESERVED_VALUE 0x000011ff
107 #define VM_ENTRY_CONTROLS_IA32E_MODE 0x00000200
108 #define MONITOR_VM_ENTRY_CONTROLS VM_ENTRY_CONTROLS_RESERVED_VALUE
109 /*
110 * Exit Reasons
111 */
112 #define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000
114 #define EXIT_REASON_EXCEPTION_NMI 0
115 #define EXIT_REASON_EXTERNAL_INTERRUPT 1
117 #define EXIT_REASON_PENDING_INTERRUPT 7
119 #define EXIT_REASON_TASK_SWITCH 9
120 #define EXIT_REASON_CPUID 10
121 #define EXIT_REASON_HLT 12
122 #define EXIT_REASON_INVLPG 14
123 #define EXIT_REASON_RDPMC 15
124 #define EXIT_REASON_RDTSC 16
125 #define EXIT_REASON_VMCALL 18
127 #define EXIT_REASON_CR_ACCESS 28
128 #define EXIT_REASON_DR_ACCESS 29
129 #define EXIT_REASON_IO_INSTRUCTION 30
130 #define EXIT_REASON_MSR_READ 31
131 #define EXIT_REASON_MSR_WRITE 32
132 #define EXIT_REASON_MWAIT_INSTRUCTION 36
134 /*
135 * Interruption-information format
136 */
137 #define INTR_INFO_VECTOR_MASK 0xff /* 7:0 */
138 #define INTR_INFO_INTR_TYPE_MASK 0x700 /* 10:8 */
139 #define INTR_INFO_DELIEVER_CODE_MASK 0x800 /* 11 */
140 #define INTR_INFO_VALID_MASK 0x80000000 /* 31 */
142 #define INTR_TYPE_EXT_INTR (0 << 8) /* external interrupt */
143 #define INTR_TYPE_EXCEPTION (3 << 8) /* processor exception */
145 /*
146 * Exit Qualifications for MOV for Control Register Access
147 */
148 #define CONTROL_REG_ACCESS_NUM 0x7 /* 2:0, number of control register */
149 #define CONTROL_REG_ACCESS_TYPE 0x30 /* 5:4, access type */
150 #define TYPE_MOV_TO_CR (0 << 4)
151 #define TYPE_MOV_FROM_CR (1 << 4)
152 #define TYPE_CLTS (2 << 4)
153 #define TYPE_LMSW (3 << 4)
154 #define CONTROL_REG_ACCESS_REG 0xf00 /* 10:8, general purpose register */
155 #define LMSW_SOURCE_DATA (0xFFFF << 16) /* 16:31 lmsw source */
156 #define REG_EAX (0 << 8)
157 #define REG_ECX (1 << 8)
158 #define REG_EDX (2 << 8)
159 #define REG_EBX (3 << 8)
160 #define REG_ESP (4 << 8)
161 #define REG_EBP (5 << 8)
162 #define REG_ESI (6 << 8)
163 #define REG_EDI (7 << 8)
164 #define REG_R8 (8 << 8)
165 #define REG_R9 (9 << 8)
166 #define REG_R10 (10 << 8)
167 #define REG_R11 (11 << 8)
168 #define REG_R12 (12 << 8)
169 #define REG_R13 (13 << 8)
170 #define REG_R14 (14 << 8)
171 #define REG_R15 (15 << 8)
173 /*
174 * Exit Qualifications for MOV for Debug Register Access
175 */
176 #define DEBUG_REG_ACCESS_NUM 0x7 /* 2:0, number of debug register */
177 #define DEBUG_REG_ACCESS_TYPE 0x10 /* 4, direction of access */
178 #define TYPE_MOV_TO_DR (0 << 4)
179 #define TYPE_MOV_FROM_DR (1 << 4)
180 #define DEBUG_REG_ACCESS_REG 0xf00 /* 11:8, general purpose register */
182 #define EXCEPTION_BITMAP_DE (1 << 0) /* Divide Error */
183 #define EXCEPTION_BITMAP_DB (1 << 1) /* Debug */
184 #define EXCEPTION_BITMAP_NMI (1 << 2) /* NMI */
185 #define EXCEPTION_BITMAP_BP (1 << 3) /* Breakpoint */
186 #define EXCEPTION_BITMAP_OF (1 << 4) /* Overflow */
187 #define EXCEPTION_BITMAP_BR (1 << 5) /* BOUND Range Exceeded */
188 #define EXCEPTION_BITMAP_UD (1 << 6) /* Invalid Opcode */
189 #define EXCEPTION_BITMAP_NM (1 << 7) /* Device Not Available */
190 #define EXCEPTION_BITMAP_DF (1 << 8) /* Double Fault */
191 /* reserved */
192 #define EXCEPTION_BITMAP_TS (1 << 10) /* Invalid TSS */
193 #define EXCEPTION_BITMAP_NP (1 << 11) /* Segment Not Present */
194 #define EXCEPTION_BITMAP_SS (1 << 12) /* Stack-Segment Fault */
195 #define EXCEPTION_BITMAP_GP (1 << 13) /* General Protection */
196 #define EXCEPTION_BITMAP_PG (1 << 14) /* Page Fault */
197 #define EXCEPTION_BITMAP_MF (1 << 16) /* x87 FPU Floating-Point Error (Math Fault) */
198 #define EXCEPTION_BITMAP_AC (1 << 17) /* Alignment Check */
199 #define EXCEPTION_BITMAP_MC (1 << 18) /* Machine Check */
200 #define EXCEPTION_BITMAP_XF (1 << 19) /* SIMD Floating-Point Exception */
202 /* Pending Debug exceptions */
204 #define PENDING_DEBUG_EXC_BP (1 << 12) /* break point */
205 #define PENDING_DEBUG_EXC_BS (1 << 14) /* Single step */
207 #ifdef XEN_DEBUGGER
208 #define MONITOR_DEFAULT_EXCEPTION_BITMAP \
209 ( EXCEPTION_BITMAP_PG | \
210 EXCEPTION_BITMAP_DB | \
211 EXCEPTION_BITMAP_BP | \
212 EXCEPTION_BITMAP_GP )
213 #else
214 #define MONITOR_DEFAULT_EXCEPTION_BITMAP \
215 ( EXCEPTION_BITMAP_PG | \
216 EXCEPTION_BITMAP_GP )
217 #endif
219 /* These bits in the CR4 are owned by the host */
220 #ifdef __i386__
221 #define VMX_CR4_HOST_MASK (X86_CR4_VMXE)
222 #else
223 #define VMX_CR4_HOST_MASK (X86_CR4_VMXE | X86_CR4_PAE)
224 #endif
226 #define VMCALL_OPCODE ".byte 0x0f,0x01,0xc1\n"
227 #define VMCLEAR_OPCODE ".byte 0x66,0x0f,0xc7\n" /* reg/opcode: /6 */
228 #define VMLAUNCH_OPCODE ".byte 0x0f,0x01,0xc2\n"
229 #define VMPTRLD_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /6 */
230 #define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 */
231 #define VMREAD_OPCODE ".byte 0x0f,0x78\n"
232 #define VMRESUME_OPCODE ".byte 0x0f,0x01,0xc3\n"
233 #define VMWRITE_OPCODE ".byte 0x0f,0x79\n"
234 #define VMXOFF_OPCODE ".byte 0x0f,0x01,0xc4\n"
235 #define VMXON_OPCODE ".byte 0xf3,0x0f,0xc7\n"
237 #define MODRM_EAX_06 ".byte 0x30\n" /* [EAX], with reg/opcode: /6 */
238 #define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */
239 #define MODRM_EAX_ECX ".byte 0xc1\n" /* [EAX], [ECX] */
241 static inline int __vmptrld (u64 addr)
242 {
243 unsigned long eflags;
244 __asm__ __volatile__ ( VMPTRLD_OPCODE
245 MODRM_EAX_06
246 :
247 : "a" (&addr)
248 : "memory");
250 __save_flags(eflags);
251 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
252 return -1;
253 return 0;
254 }
256 static inline void __vmptrst (u64 addr)
257 {
258 __asm__ __volatile__ ( VMPTRST_OPCODE
259 MODRM_EAX_07
260 :
261 : "a" (&addr)
262 : "memory");
263 }
265 static inline int __vmpclear (u64 addr)
266 {
267 unsigned long eflags;
269 __asm__ __volatile__ ( VMCLEAR_OPCODE
270 MODRM_EAX_06
271 :
272 : "a" (&addr)
273 : "memory");
274 __save_flags(eflags);
275 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
276 return -1;
277 return 0;
278 }
280 #define __vmread(x, ptr) ___vmread((x), (ptr), sizeof(*(ptr)))
282 static always_inline int ___vmread (const unsigned long field, void *ptr, const int size)
283 {
284 unsigned long eflags;
285 unsigned long ecx = 0;
287 __asm__ __volatile__ ( VMREAD_OPCODE
288 MODRM_EAX_ECX
289 : "=c" (ecx)
290 : "a" (field)
291 : "memory");
293 switch (size) {
294 case 1:
295 *((u8 *) (ptr)) = ecx;
296 break;
297 case 2:
298 *((u16 *) (ptr)) = ecx;
299 break;
300 case 4:
301 *((u32 *) (ptr)) = ecx;
302 break;
303 case 8:
304 *((u64 *) (ptr)) = ecx;
305 break;
306 default:
307 domain_crash_synchronous();
308 break;
309 }
311 __save_flags(eflags);
312 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
313 return -1;
314 return 0;
315 }
317 static inline int __vmwrite (unsigned long field, unsigned long value)
318 {
319 unsigned long eflags;
321 __asm__ __volatile__ ( VMWRITE_OPCODE
322 MODRM_EAX_ECX
323 :
324 : "a" (field) , "c" (value)
325 : "memory");
326 __save_flags(eflags);
327 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
328 return -1;
329 return 0;
330 }
332 static inline int __vm_set_bit(unsigned long field, unsigned long mask)
333 {
334 unsigned long tmp;
335 int err = 0;
337 err |= __vmread(field, &tmp);
338 tmp |= mask;
339 err |= __vmwrite(field, tmp);
341 return err;
342 }
344 static inline int __vm_clear_bit(unsigned long field, unsigned long mask)
345 {
346 unsigned long tmp;
347 int err = 0;
349 err |= __vmread(field, &tmp);
350 tmp &= ~mask;
351 err |= __vmwrite(field, tmp);
353 return err;
354 }
356 static inline void __vmxoff (void)
357 {
358 __asm__ __volatile__ ( VMXOFF_OPCODE
359 ::: "memory");
360 }
362 static inline int __vmxon (u64 addr)
363 {
364 unsigned long eflags;
366 __asm__ __volatile__ ( VMXON_OPCODE
367 MODRM_EAX_06
368 :
369 : "a" (&addr)
370 : "memory");
371 __save_flags(eflags);
372 if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
373 return -1;
374 return 0;
375 }
377 /* Make sure that xen intercepts any FP accesses from current */
378 static inline void vmx_stts(void)
379 {
380 unsigned long cr0;
382 __vmread(GUEST_CR0, &cr0);
383 if (!(cr0 & X86_CR0_TS))
384 __vmwrite(GUEST_CR0, cr0 | X86_CR0_TS);
386 __vmread(CR0_READ_SHADOW, &cr0);
387 if (!(cr0 & X86_CR0_TS))
388 __vm_set_bit(EXCEPTION_BITMAP, EXCEPTION_BITMAP_NM);
389 }
391 /* Works only for ed == current */
392 static inline int vmx_paging_enabled(struct vcpu *v)
393 {
394 unsigned long cr0;
396 __vmread(CR0_READ_SHADOW, &cr0);
397 return (cr0 & X86_CR0_PE) && (cr0 & X86_CR0_PG);
398 }
400 #define VMX_INVALID_ERROR_CODE -1
402 static inline int __vmx_inject_exception(struct vcpu *v, int trap, int type,
403 int error_code)
404 {
405 unsigned long intr_fields;
407 /* Reflect it back into the guest */
408 intr_fields = (INTR_INFO_VALID_MASK | type | trap);
409 if (error_code != VMX_INVALID_ERROR_CODE) {
410 __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
411 intr_fields |= INTR_INFO_DELIEVER_CODE_MASK;
412 }
414 __vmwrite(VM_ENTRY_INTR_INFO_FIELD, intr_fields);
415 return 0;
416 }
418 static inline int vmx_inject_exception(struct vcpu *v, int trap, int error_code)
419 {
420 return __vmx_inject_exception(v, trap, INTR_TYPE_EXCEPTION, error_code);
421 }
423 static inline int vmx_inject_extint(struct vcpu *v, int trap, int error_code)
424 {
425 __vmx_inject_exception(v, trap, INTR_TYPE_EXT_INTR, error_code);
426 __vmwrite(GUEST_INTERRUPTIBILITY_INFO, 0);
428 return 0;
429 }
431 static inline int vmx_reflect_exception(struct vcpu *v)
432 {
433 int error_code, vector;
435 __vmread(VM_EXIT_INTR_INFO, &vector);
436 if (vector & INTR_INFO_DELIEVER_CODE_MASK)
437 __vmread(VM_EXIT_INTR_ERROR_CODE, &error_code);
438 else
439 error_code = VMX_INVALID_ERROR_CODE;
440 vector &= 0xff;
442 #ifndef NDEBUG
443 {
444 unsigned long eip;
446 __vmread(GUEST_RIP, &eip);
447 VMX_DBG_LOG(DBG_LEVEL_1,
448 "vmx_reflect_exception: eip = %lx, error_code = %x",
449 eip, error_code);
450 }
451 #endif /* NDEBUG */
453 vmx_inject_exception(v, vector, error_code);
454 return 0;
455 }
457 static inline shared_iopage_t *get_sp(struct domain *d)
458 {
459 return (shared_iopage_t *) d->arch.vmx_platform.shared_page_va;
460 }
462 static inline vcpu_iodata_t *get_vio(struct domain *d, unsigned long cpu)
463 {
464 return &get_sp(d)->vcpu_iodata[cpu];
465 }
467 static inline int iopacket_port(struct domain *d)
468 {
469 return get_sp(d)->sp_global.eport;
470 }
472 /* Prototypes */
473 void load_cpu_user_regs(struct cpu_user_regs *regs);
474 void store_cpu_user_regs(struct cpu_user_regs *regs);
476 enum { VMX_COPY_IN = 0, VMX_COPY_OUT };
477 int vmx_copy(void *buf, unsigned long laddr, int size, int dir);
479 #endif /* __ASM_X86_VMX_H__ */