xen-vtx-unstable
changeset 4872:d23d2657744d
bitkeeper revision 1.1389.1.41 (42835514T1QbNOwRPkiEW4rPgYhumw)
Merge firebug.cl.cam.ac.uk:/auto/groups/xeno-xenod/BK/xen-unstable.bk
into firebug.cl.cam.ac.uk:/local/scratch/cl349/xen-unstable.bk-clean
Merge firebug.cl.cam.ac.uk:/auto/groups/xeno-xenod/BK/xen-unstable.bk
into firebug.cl.cam.ac.uk:/local/scratch/cl349/xen-unstable.bk-clean
line diff
1.1 --- a/.hgtags Tue May 10 13:56:23 2005 +0000 1.2 +++ b/.hgtags Thu May 12 13:07:32 2005 +0000 1.3 @@ -5,6 +5,7 @@ 6e1bbc13911751efa0b1c018425c1b085820fa02 1.4 fb875591fd72e15c31879c0e9034d99b80225595 RELEASE-2.0.4 1.5 1a522944f76540ea9d73fcc1b0d13d0f670183f0 RELEASE-2.0.5 1.6 487b2ee37d1cecb5f3e7a546b05ad097a0226f2f beta1 1.7 +1f84d0497a5901b9f8d1a051b87871d140b7e23f ia64-stable 1.8 3d330e41f41ce1bc118c02346e18949ad5d67f6b latest-semistable 1.9 30c521db4c71960b0cf1d9c9e1b658e77b535a3e latest-stable 1.10 9afec5bc14aeb197ef37ea54a57eacd427463fc3 semistable
2.1 --- a/.rootkeys Tue May 10 13:56:23 2005 +0000 2.2 +++ b/.rootkeys Thu May 12 13:07:32 2005 +0000 2.3 @@ -1264,7 +1264,6 @@ 3ddb79bduhSEZI8xa7IbGQCpap5y2A xen/commo 2.4 41a61536SZbR6cj1ukWTb0DYU-vz9w xen/common/multicall.c 2.5 3ddb79bdD4SLmmdMD7yLW5HcUWucXw xen/common/page_alloc.c 2.6 3e54c38dkHAev597bPr71-hGzTdocg xen/common/perfc.c 2.7 -3ddb79bdHqdQpATqC0rmUZNbsb6L6A xen/common/resource.c 2.8 40589968dD2D1aejwSOvrROg7fOvGQ xen/common/sched_bvt.c 2.9 41ebbfe9oF1BF3cH5v7yE3eOL9uPbA xen/common/sched_sedf.c 2.10 3e397e6619PgAfBbw2XFbXkewvUWgw xen/common/schedule.c 2.11 @@ -1452,7 +1451,6 @@ 3ddb79c1W0lQca8gRV7sN6j3iY4Luw xen/inclu 2.12 41262590CyJy4vd42dnqzsn8-eeGvw xen/include/xen/grant_table.h 2.13 3ddb79c0GurNF9tDWqQbAwJFH8ugfA xen/include/xen/init.h 2.14 428084e41zemtCAtYLcD9bUzwE35SA xen/include/xen/inttypes.h 2.15 -3ddb79c1nzaWu8NoF4xCCMSFJR4MlA xen/include/xen/ioport.h 2.16 3ddb79c2qAxCOABlkKtD8Txohe-qEw xen/include/xen/irq.h 2.17 3ddb79c2b3qe-6Ann09FqZBF4IrJaQ xen/include/xen/irq_cpustat.h 2.18 3e4540ccPHqIIv2pvnQ1gV8LUnoHIg xen/include/xen/kernel.h 2.19 @@ -1462,7 +1460,6 @@ 3ddb79c18Ajy7micDGQQfJ0zWgEHtA xen/inclu 2.20 3ddb79c1gs2VbLbQlw0dcDUXYIepDA xen/include/xen/mm.h 2.21 3ddb79c1ieLZfGSFwfvvSQ2NK1BMSg xen/include/xen/multiboot.h 2.22 41a61536ii6j2lJ2rXwMOLaG1CHPvw xen/include/xen/multicall.h 2.23 -3ddb79c2Fg44_PBPVxHSC0gTOMq4Ow xen/include/xen/pci.h 2.24 3ddb79c0MOVXq8qZDQRGb6z64_xAwg xen/include/xen/pci_ids.h 2.25 3e54c38dlSCVdyVM4PKcrSfzLLxWUQ xen/include/xen/perfc.h 2.26 3e54c38de9SUSYSAwxDf_DwkpAnQFA xen/include/xen/perfc_defn.h
3.1 --- a/BitKeeper/etc/logging_ok Tue May 10 13:56:23 2005 +0000 3.2 +++ b/BitKeeper/etc/logging_ok Thu May 12 13:07:32 2005 +0000 3.3 @@ -80,6 +80,7 @@ rn@wyvis.camb.intel-research.net 3.4 rn@wyvis.research.intel-research.net 3.5 rneugeba@wyvis.research 3.6 rneugeba@wyvis.research.intel-research.net 3.7 +rusty@rustcorp.com.au 3.8 ryanh@us.ibm.com 3.9 sd386@font.cl.cam.ac.uk 3.10 shand@spidean.research.intel-research.net
4.1 --- a/docs/src/user.tex Tue May 10 13:56:23 2005 +0000 4.2 +++ b/docs/src/user.tex Thu May 12 13:07:32 2005 +0000 4.3 @@ -484,7 +484,7 @@ distribution. The entry should look som 4.4 {\small 4.5 \begin{verbatim} 4.6 title Xen 2.0 / XenLinux 2.6.9 4.7 - kernel /boot/xen.gz dom0_mem=131072 4.8 + kernel /boot/xen.gz dom0_mem=128M 4.9 module /boot/vmlinuz-2.6.9-xen0 root=/dev/sda4 ro console=tty0 4.10 \end{verbatim} 4.11 } 4.12 @@ -524,7 +524,7 @@ have problems. 4.13 4.14 \subsection{Serial Console (optional)} 4.15 4.16 -%% kernel /boot/xen.gz dom0_mem=131072 com1=115200,8n1 4.17 +%% kernel /boot/xen.gz dom0_mem=128M com1=115200,8n1 4.18 %% module /boot/vmlinuz-2.6.9-xen0 root=/dev/sda4 ro 4.19 4.20 4.21 @@ -534,9 +534,9 @@ with: 4.22 \begin{quote} 4.23 {\small 4.24 \begin{verbatim} 4.25 - kernel /boot/xen.gz dom0_mem=131072 com1=115200,8n1 4.26 + kernel /boot/xen.gz dom0_mem=128M com1=115200,8n1 4.27 \end{verbatim}} 4.28 -\end{quote} 4.29 +\end{quote} 4.30 4.31 This configures Xen to output on COM1 at 115,200 baud, 8 data bits, 4.32 1 stop bit and no parity. Modify these parameters for your set up. 4.33 @@ -1680,12 +1680,6 @@ should be appended to Xen's command line 4.34 editing \path{grub.conf}. 4.35 4.36 \begin{description} 4.37 -\item [ignorebiostables ] 4.38 - Disable parsing of BIOS-supplied tables. This may help with some 4.39 - chipsets that aren't fully supported by Xen. If you specify this 4.40 - option then ACPI tables are also ignored, and SMP support is 4.41 - disabled. 4.42 - 4.43 \item [noreboot ] 4.44 Don't reboot the machine automatically on errors. This is 4.45 useful to catch debug output if you aren't catching console messages 4.46 @@ -1695,10 +1689,6 @@ editing \path{grub.conf}. 4.47 Disable SMP support. 4.48 This option is implied by `ignorebiostables'. 4.49 4.50 -\item [noacpi ] 4.51 - Disable ACPI tables, which confuse Xen on some chipsets. 4.52 - This option is implied by `ignorebiostables'. 4.53 - 4.54 \item [watchdog ] 4.55 Enable NMI watchdog which can report certain failures. 4.56 4.57 @@ -1756,8 +1746,18 @@ editing \path{grub.conf}. 4.58 `nmi=dom0': Inform DOM0 of the NMI. \\ 4.59 `nmi=ignore': Ignore the NMI. 4.60 4.61 +\item [mem=xxx ] 4.62 + Set the physical RAM address limit. Any RAM appearing beyond this 4.63 + physical address in the memory map will be ignored. This parameter 4.64 + may be specified with a B, K, M or G suffix, representing bytes, 4.65 + kilobytes, megabytes and gigabytes respectively. The 4.66 + default unit, if no suffix is specified, is bytes. 4.67 + 4.68 \item [dom0\_mem=xxx ] 4.69 - Set the amount of memory (in kB) to be allocated to domain0. 4.70 + Set the amount of memory to be allocated to domain0. This parameter 4.71 + may be specified with a B, K, M or G suffix, representing bytes, 4.72 + kilobytes, megabytes and gigabytes respectively. The 4.73 + default unit, if no suffix is specified, is kilobytes. 4.74 4.75 \item [tbuf\_size=xxx ] 4.76 Set the size of the per-cpu trace buffers, in pages 4.77 @@ -1769,16 +1769,29 @@ editing \path{grub.conf}. 4.78 Select the CPU scheduler Xen should use. The current 4.79 possibilities are `bvt' (default), `atropos' and `rrobin'. 4.80 For more information see Section~\ref{s:sched}. 4.81 - 4.82 -\item [physdev\_dom0\_hide=(xx:xx.x)(yy:yy.y)\ldots ] 4.83 -Hide selected PCI devices from domain 0 (for instance, to stop it 4.84 -taking ownership of them so that they can be driven by another 4.85 -domain). Device IDs should be given in hex format. Bridge devices do 4.86 -not need to be hidden --- they are hidden implicitly, since guest OSes 4.87 -do not need to configure them. 4.88 \end{description} 4.89 4.90 - 4.91 +In addition, the following platform-specific options may be specified 4.92 +on the Xen command line. Since domain 0 shares responsibility for 4.93 +booting the platform, Xen will automatically propagate these options 4.94 +to its command line. 4.95 + 4.96 +These options are taken from Linux's command-line syntax with 4.97 +unchanged semantics. 4.98 + 4.99 +\begin{description} 4.100 +\item [acpi=off,force,strict,ht,noirq,\ldots ] 4.101 + Modify how Xen (and domain 0) parses the BIOS ACPI tables. 4.102 + 4.103 +\item [acpi\_skip\_timer\_override ] 4.104 + Instruct Xen (and domain 0) to ignore timer-interrupt override 4.105 + instructions specified by the BIOS ACPI tables. 4.106 + 4.107 +\item [noapic ] 4.108 + Instruct Xen (and domain 0) to ignore any IOAPICs that are present in 4.109 + the system, and instead continue to use the legacy PIC. 4.110 + 4.111 +\end{description} 4.112 4.113 \section{XenLinux Boot Options} 4.114
5.1 --- a/linux-2.6.11-xen-sparse/arch/xen/i386/kernel/setup.c Tue May 10 13:56:23 2005 +0000 5.2 +++ b/linux-2.6.11-xen-sparse/arch/xen/i386/kernel/setup.c Thu May 12 13:07:32 2005 +0000 5.3 @@ -1571,12 +1571,21 @@ void __init setup_arch(char **cmdline_p) 5.4 op.u.set_iopl.iopl = current->thread.io_pl = 1; 5.5 HYPERVISOR_physdev_op(&op); 5.6 5.7 - /* 5.8 - * Parse the ACPI tables for possible boot-time SMP configuration. 5.9 - */ 5.10 - acpi_boot_table_init(); 5.11 - acpi_boot_init(); 5.12 +#ifdef CONFIG_ACPI_BOOT 5.13 + if ( !(xen_start_info.flags & SIF_INITDOMAIN) ) 5.14 + { 5.15 + printk(KERN_INFO "Not running in dom0: Disabling ACPI\n"); 5.16 + acpi_disabled = 1; 5.17 + acpi_ht = 0; 5.18 + } 5.19 +#endif 5.20 5.21 + /* 5.22 + * Parse the ACPI tables for possible boot-time SMP configuration. 5.23 + */ 5.24 + acpi_boot_table_init(); 5.25 + acpi_boot_init(); 5.26 + 5.27 #ifdef CONFIG_X86_LOCAL_APIC 5.28 if (smp_found_config) 5.29 get_smp_config();
6.1 --- a/linux-2.6.11-xen-sparse/arch/xen/i386/kernel/smpboot.c Tue May 10 13:56:23 2005 +0000 6.2 +++ b/linux-2.6.11-xen-sparse/arch/xen/i386/kernel/smpboot.c Thu May 12 13:07:32 2005 +0000 6.3 @@ -54,6 +54,9 @@ 6.4 #include <asm/desc.h> 6.5 #include <asm/arch_hooks.h> 6.6 6.7 +#ifndef CONFIG_X86_IO_APIC 6.8 +#define Dprintk(args...) 6.9 +#endif 6.10 #include <mach_wakecpu.h> 6.11 #include <smpboot_hooks.h> 6.12 6.13 @@ -493,19 +496,7 @@ static void __init start_secondary(void 6.14 local_irq_enable(); 6.15 6.16 wmb(); 6.17 - if (0) { 6.18 - char *msg2 = "delay2\n"; 6.19 - int timeout; 6.20 - for (timeout = 0; timeout < 50000; timeout++) { 6.21 - udelay(1000); 6.22 - if (timeout == 2000) { 6.23 - (void)HYPERVISOR_console_io(CONSOLEIO_write, strlen(msg2), msg2); 6.24 - timeout = 0; 6.25 - } 6.26 - } 6.27 - } 6.28 cpu_idle(); 6.29 - return 0; 6.30 } 6.31 6.32 /* 6.33 @@ -1107,15 +1098,18 @@ static void __init smp_boot_cpus(unsigne 6.34 cpus_clear(cpu_sibling_map[0]); 6.35 cpu_set(0, cpu_sibling_map[0]); 6.36 6.37 +#ifdef CONFIG_X86_IO_APIC 6.38 /* 6.39 * If we couldn't find an SMP configuration at boot time, 6.40 * get out of here now! 6.41 */ 6.42 - if (!smp_found_config /* && !acpi_lapic) */) { 6.43 + if (!smp_found_config && !acpi_lapic) { 6.44 printk(KERN_NOTICE "SMP motherboard not detected.\n"); 6.45 smpboot_clear_io_apic_irqs(); 6.46 #if 0 6.47 phys_cpu_present_map = physid_mask_of_physid(0); 6.48 +#endif 6.49 +#ifdef CONFIG_X86_LOCAL_APIC 6.50 if (APIC_init_uniprocessor()) 6.51 printk(KERN_NOTICE "Local APIC not detected." 6.52 " Using dummy APIC emulation.\n"); 6.53 @@ -1123,6 +1117,7 @@ static void __init smp_boot_cpus(unsigne 6.54 map_cpu_to_logical_apicid(); 6.55 return; 6.56 } 6.57 +#endif 6.58 6.59 #if 0 6.60 /*
7.1 --- a/linux-2.6.11-xen-sparse/drivers/xen/blkback/blkback.c Tue May 10 13:56:23 2005 +0000 7.2 +++ b/linux-2.6.11-xen-sparse/drivers/xen/blkback/blkback.c Thu May 12 13:07:32 2005 +0000 7.3 @@ -486,12 +486,11 @@ static void dispatch_rw_block_io(blkif_t 7.4 preq.nr_sects += seg[i].nsec; 7.5 7.6 aop[i].u.map_grant_ref.host_virt_addr = MMAP_VADDR(pending_idx, i); 7.7 - 7.8 aop[i].u.map_grant_ref.dom = blkif->domid; 7.9 aop[i].u.map_grant_ref.ref = blkif_gref_from_fas(fas); 7.10 - aop[i].u.map_grant_ref.flags = ( GNTMAP_host_map | 7.11 - ( ( operation == READ ) ? 7.12 - 0 : GNTMAP_readonly ) ); 7.13 + aop[i].u.map_grant_ref.flags = GNTMAP_host_map; 7.14 + if ( operation == WRITE ) 7.15 + aop[i].u.map_grant_ref.flags |= GNTMAP_readonly; 7.16 } 7.17 7.18 if ( unlikely(HYPERVISOR_grant_table_op(
8.1 --- a/linux-2.6.11-xen-sparse/drivers/xen/blkfront/blkfront.c Tue May 10 13:56:23 2005 +0000 8.2 +++ b/linux-2.6.11-xen-sparse/drivers/xen/blkfront/blkfront.c Thu May 12 13:07:32 2005 +0000 8.3 @@ -824,7 +824,7 @@ static int blkif_queue_request(unsigned 8.4 buffer_ma >> PAGE_SHIFT, 8.5 ( operation == BLKIF_OP_WRITE ? 1 : 0 ) ); 8.6 8.7 - blk_shadow[id].frame[req->nr_segments] = 8.8 + blk_shadow[req->id].frame[req->nr_segments] = 8.9 buffer_ma >> PAGE_SHIFT; 8.10 8.11 req->frame_and_sects[req->nr_segments] =
9.1 --- a/linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/mach-xen/smpboot_hooks.h Tue May 10 13:56:23 2005 +0000 9.2 +++ b/linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/mach-xen/smpboot_hooks.h Thu May 12 13:07:32 2005 +0000 9.3 @@ -3,9 +3,7 @@ 9.4 9.5 static inline void smpboot_clear_io_apic_irqs(void) 9.6 { 9.7 -#if 1 9.8 - printk("smpboot_clear_io_apic_irqs\n"); 9.9 -#else 9.10 +#ifdef CONFIG_X86_IO_APIC 9.11 io_apic_irqs = 0; 9.12 #endif 9.13 } 9.14 @@ -43,12 +41,14 @@ static inline void smpboot_restore_warm_ 9.15 9.16 static inline void smpboot_setup_io_apic(void) 9.17 { 9.18 +#ifdef CONFIG_X86_IO_APIC 9.19 /* 9.20 * Here we can be sure that there is an IO-APIC in the system. Let's 9.21 * go and set it up: 9.22 */ 9.23 if (!skip_ioapic_setup && nr_ioapics) 9.24 setup_IO_APIC(); 9.25 +#endif 9.26 } 9.27 9.28
10.1 --- a/linux-2.6.11-xen-sparse/include/asm-xen/asm-x86_64/mach-xen/smpboot_hooks.h Tue May 10 13:56:23 2005 +0000 10.2 +++ b/linux-2.6.11-xen-sparse/include/asm-xen/asm-x86_64/mach-xen/smpboot_hooks.h Thu May 12 13:07:32 2005 +0000 10.3 @@ -3,9 +3,7 @@ 10.4 10.5 static inline void smpboot_clear_io_apic_irqs(void) 10.6 { 10.7 -#if 1 10.8 - printk("smpboot_clear_io_apic_irqs\n"); 10.9 -#else 10.10 +#ifdef CONFIG_X86_IO_APIC 10.11 io_apic_irqs = 0; 10.12 #endif 10.13 } 10.14 @@ -43,12 +41,14 @@ static inline void smpboot_restore_warm_ 10.15 10.16 static inline void smpboot_setup_io_apic(void) 10.17 { 10.18 +#ifdef CONFIG_X86_IO_APIC 10.19 /* 10.20 * Here we can be sure that there is an IO-APIC in the system. Let's 10.21 * go and set it up: 10.22 */ 10.23 if (!skip_ioapic_setup && nr_ioapics) 10.24 setup_IO_APIC(); 10.25 +#endif 10.26 } 10.27 10.28
11.1 --- a/tools/libxc/xc.h Tue May 10 13:56:23 2005 +0000 11.2 +++ b/tools/libxc/xc.h Thu May 12 13:07:32 2005 +0000 11.3 @@ -87,22 +87,22 @@ typedef struct xc_core_header { 11.4 11.5 11.6 long xc_ptrace(enum __ptrace_request request, 11.7 - u32 domid, 11.8 - long addr, 11.9 - long data); 11.10 + u32 domid, 11.11 + long addr, 11.12 + long data); 11.13 11.14 long xc_ptrace_core(enum __ptrace_request request, 11.15 - u32 domid, 11.16 - long addr, 11.17 - long data); 11.18 + u32 domid, 11.19 + long addr, 11.20 + long data); 11.21 11.22 int xc_waitdomain(int domain, 11.23 - int *status, 11.24 - int options); 11.25 + int *status, 11.26 + int options); 11.27 11.28 int xc_waitdomain_core(int domain, 11.29 - int *status, 11.30 - int options); 11.31 + int *status, 11.32 + int options); 11.33 11.34 /* 11.35 * DOMAIN MANAGEMENT FUNCTIONS 11.36 @@ -110,7 +110,6 @@ int xc_waitdomain_core(int domain, 11.37 11.38 typedef struct { 11.39 u32 domid; 11.40 - unsigned int cpu; 11.41 unsigned int dying:1, crashed:1, shutdown:1, 11.42 paused:1, blocked:1, running:1; 11.43 unsigned int shutdown_reason; /* only meaningful if shutdown==1 */ 11.44 @@ -118,6 +117,9 @@ typedef struct { 11.45 unsigned long shared_info_frame; 11.46 u64 cpu_time; 11.47 unsigned long max_memkb; 11.48 + unsigned int vcpus; 11.49 + s32 vcpu_to_cpu[MAX_VIRT_CPUS]; 11.50 + cpumap_t cpumap[MAX_VIRT_CPUS]; 11.51 } xc_dominfo_t; 11.52 11.53 typedef dom0_getdomaininfo_t xc_domaininfo_t; 11.54 @@ -129,8 +131,8 @@ int xc_domain_create(int xc_handle, 11.55 11.56 11.57 int xc_domain_dumpcore(int xc_handle, 11.58 - u32 domid, 11.59 - const char *corename); 11.60 + u32 domid, 11.61 + const char *corename); 11.62 11.63 11.64 /** 11.65 @@ -167,7 +169,8 @@ int xc_domain_destroy(int xc_handle, 11.66 u32 domid); 11.67 int xc_domain_pincpu(int xc_handle, 11.68 u32 domid, 11.69 - int cpu); 11.70 + int vcpu, 11.71 + cpumap_t *cpumap); 11.72 /** 11.73 * This function will return information about one or more domains. 11.74 * 11.75 @@ -195,11 +198,11 @@ int xc_domain_getinfo(int xc_handle, 11.76 * domain 11.77 * @return 0 on success, -1 on failure 11.78 */ 11.79 -int xc_domain_getfullinfo(int xc_handle, 11.80 - u32 domid, 11.81 - u32 vcpu, 11.82 - xc_domaininfo_t *info, 11.83 - vcpu_guest_context_t *ctxt); 11.84 +int xc_domain_get_vcpu_context(int xc_handle, 11.85 + u32 domid, 11.86 + u32 vcpu, 11.87 + vcpu_guest_context_t *ctxt); 11.88 + 11.89 int xc_domain_setcpuweight(int xc_handle, 11.90 u32 domid, 11.91 float weight); 11.92 @@ -260,8 +263,8 @@ xc_plan9_build (int xc_handle, 11.93 u32 domid, 11.94 const char *image_name, 11.95 const char *cmdline, 11.96 - unsigned int control_evtchn, 11.97 - unsigned long flags); 11.98 + unsigned int control_evtchn, 11.99 + unsigned long flags); 11.100 11.101 struct mem_map; 11.102 int xc_vmx_build(int xc_handle, 11.103 @@ -418,7 +421,7 @@ int xc_msr_write(int xc_handle, int cpu_ 11.104 /** 11.105 * Memory maps a range within one domain to a local address range. Mappings 11.106 * should be unmapped with munmap and should follow the same rules as mmap 11.107 - * regarding page alignment. 11.108 + * regarding page alignment. Returns NULL on failure. 11.109 * 11.110 * In Linux, the ring queue for the control channel is accessible by mapping 11.111 * the shared_info_frame (from xc_domain_getinfo()) + 2048. The structure 11.112 @@ -438,7 +441,7 @@ void *xc_map_foreign_batch(int xc_handle 11.113 unsigned long *arr, int num ); 11.114 11.115 int xc_get_pfn_list(int xc_handle, u32 domid, unsigned long *pfn_buf, 11.116 - unsigned long max_pfns); 11.117 + unsigned long max_pfns); 11.118 11.119 /*\ 11.120 * GRANT TABLE FUNCTIONS
12.1 --- a/tools/libxc/xc_core.c Tue May 10 13:56:23 2005 +0000 12.2 +++ b/tools/libxc/xc_core.c Thu May 12 13:07:32 2005 +0000 12.3 @@ -7,6 +7,7 @@ 12.4 /* number of pages to write at a time */ 12.5 #define DUMP_INCREMENT 4 * 1024 12.6 #define round_pgup(_p) (((_p)+(PAGE_SIZE-1))&PAGE_MASK) 12.7 + 12.8 static int 12.9 copy_from_domain_page(int xc_handle, 12.10 u32 domid, 12.11 @@ -28,13 +29,14 @@ xc_domain_dumpcore(int xc_handle, 12.12 u32 domid, 12.13 const char *corename) 12.14 { 12.15 - vcpu_guest_context_t st_ctxt, *ctxt = &st_ctxt; 12.16 unsigned long nr_pages; 12.17 unsigned long *page_array; 12.18 - xc_domaininfo_t st_info, *info = &st_info; 12.19 + xc_dominfo_t info; 12.20 int i, dump_fd; 12.21 char *dump_mem, *dump_mem_start = NULL; 12.22 struct xc_core_header header; 12.23 + vcpu_guest_context_t ctxt[MAX_VIRT_CPUS]; 12.24 + 12.25 12.26 if ((dump_fd = open(corename, O_CREAT|O_RDWR, S_IWUSR|S_IRUSR)) < 0) { 12.27 PERROR("Could not open corefile %s: %s", corename, strerror(errno)); 12.28 @@ -46,14 +48,25 @@ xc_domain_dumpcore(int xc_handle, 12.29 goto error_out; 12.30 } 12.31 12.32 - if (xc_domain_getfullinfo(xc_handle, domid, 0/* XXX hardcode */, info, ctxt)) { 12.33 - PERROR("Could not get full info for domain"); 12.34 + if (xc_domain_getinfo(xc_handle, domid, 1, &info)) { 12.35 + PERROR("Could not get info for domain"); 12.36 goto error_out; 12.37 } 12.38 + 12.39 + for (i = 0; i < sizeof(info.vcpu_to_cpu) / sizeof(info.vcpu_to_cpu[0]); 12.40 + i++) { 12.41 + if (info.vcpu_to_cpu[i] == -1) 12.42 + continue; 12.43 + if (xc_domain_get_vcpu_context(xc_handle, domid, i, &ctxt[i])) { 12.44 + PERROR("Could not get all vcpu contexts for domain"); 12.45 + goto error_out; 12.46 + } 12.47 + } 12.48 + 12.49 + nr_pages = info.nr_pages; 12.50 12.51 - nr_pages = info->tot_pages; 12.52 header.xch_magic = 0xF00FEBED; 12.53 - header.xch_nr_vcpus = 1; /* no interface to query at the moment */ 12.54 + header.xch_nr_vcpus = info.vcpus; 12.55 header.xch_nr_pages = nr_pages; 12.56 header.xch_ctxt_offset = sizeof(struct xc_core_header); 12.57 header.xch_index_offset = sizeof(struct xc_core_header) + 12.58 @@ -62,7 +75,7 @@ xc_domain_dumpcore(int xc_handle, 12.59 sizeof(vcpu_guest_context_t) + nr_pages * sizeof(unsigned long)); 12.60 12.61 write(dump_fd, &header, sizeof(struct xc_core_header)); 12.62 - write(dump_fd, ctxt, sizeof(st_ctxt)); 12.63 + write(dump_fd, &ctxt, sizeof(ctxt[0]) * info.vcpus); 12.64 12.65 if ((page_array = malloc(nr_pages * sizeof(unsigned long))) == NULL) { 12.66 printf("Could not allocate memory\n");
13.1 --- a/tools/libxc/xc_domain.c Tue May 10 13:56:23 2005 +0000 13.2 +++ b/tools/libxc/xc_domain.c Thu May 12 13:07:32 2005 +0000 13.3 @@ -16,6 +16,8 @@ int xc_domain_create(int xc_handle, 13.4 { 13.5 int err, errno_saved; 13.6 dom0_op_t op; 13.7 + u32 vcpu = 0; /* FIXME, hard coded initial pin to vcpu 0 */ 13.8 + cpumap_t cpumap = 1 << cpu; 13.9 13.10 op.cmd = DOM0_CREATEDOMAIN; 13.11 op.u.createdomain.domain = (domid_t)*pdomid; 13.12 @@ -25,7 +27,7 @@ int xc_domain_create(int xc_handle, 13.13 *pdomid = (u16)op.u.createdomain.domain; 13.14 13.15 if ( (cpu != -1) && 13.16 - ((err = xc_domain_pincpu(xc_handle, *pdomid, cpu)) != 0) ) 13.17 + ((err = xc_domain_pincpu(xc_handle, *pdomid, vcpu, &cpumap)) != 0) ) 13.18 goto fail; 13.19 13.20 if ( (err = xc_domain_setcpuweight(xc_handle, *pdomid, cpu_weight)) != 0 ) 13.21 @@ -84,13 +86,14 @@ int xc_domain_destroy(int xc_handle, 13.22 13.23 int xc_domain_pincpu(int xc_handle, 13.24 u32 domid, 13.25 - int cpu) 13.26 + int vcpu, 13.27 + cpumap_t *cpumap) 13.28 { 13.29 dom0_op_t op; 13.30 op.cmd = DOM0_PINCPUDOMAIN; 13.31 op.u.pincpudomain.domain = (domid_t)domid; 13.32 - op.u.pincpudomain.exec_domain = 0; 13.33 - op.u.pincpudomain.cpu = cpu; 13.34 + op.u.pincpudomain.exec_domain = vcpu; 13.35 + op.u.pincpudomain.cpumap = cpumap; 13.36 return do_dom0_op(xc_handle, &op); 13.37 } 13.38 13.39 @@ -109,14 +112,9 @@ int xc_domain_getinfo(int xc_handle, 13.40 { 13.41 op.cmd = DOM0_GETDOMAININFO; 13.42 op.u.getdomaininfo.domain = (domid_t)next_domid; 13.43 - op.u.getdomaininfo.exec_domain = 0; // FIX ME?!? 13.44 - op.u.getdomaininfo.ctxt = NULL; /* no exec context info, thanks. */ 13.45 if ( (rc = do_dom0_op(xc_handle, &op)) < 0 ) 13.46 break; 13.47 - info->domid = (u16)op.u.getdomaininfo.domain; 13.48 - 13.49 - info->cpu = 13.50 - (op.u.getdomaininfo.flags>>DOMFLAGS_CPUSHIFT) & DOMFLAGS_CPUMASK; 13.51 + info->domid = (u16)op.u.getdomaininfo.domain; 13.52 13.53 info->dying = !!(op.u.getdomaininfo.flags & DOMFLAGS_DYING); 13.54 info->crashed = !!(op.u.getdomaininfo.flags & DOMFLAGS_CRASHED); 13.55 @@ -133,29 +131,33 @@ int xc_domain_getinfo(int xc_handle, 13.56 info->max_memkb = op.u.getdomaininfo.max_pages<<(PAGE_SHIFT); 13.57 info->shared_info_frame = op.u.getdomaininfo.shared_info_frame; 13.58 info->cpu_time = op.u.getdomaininfo.cpu_time; 13.59 + info->vcpus = op.u.getdomaininfo.n_vcpu; 13.60 + memcpy(&info->vcpu_to_cpu, &op.u.getdomaininfo.vcpu_to_cpu, 13.61 + sizeof(info->vcpu_to_cpu)); 13.62 + memcpy(&info->cpumap, &op.u.getdomaininfo.cpumap, 13.63 + sizeof(info->cpumap)); 13.64 13.65 next_domid = (u16)op.u.getdomaininfo.domain + 1; 13.66 info++; 13.67 } 13.68 13.69 - if(!nr_doms) return rc; 13.70 + if( !nr_doms ) return rc; 13.71 13.72 return nr_doms; 13.73 } 13.74 13.75 -int xc_domain_getfullinfo(int xc_handle, 13.76 - u32 domid, 13.77 - u32 vcpu, 13.78 - xc_domaininfo_t *info, 13.79 - vcpu_guest_context_t *ctxt) 13.80 +int xc_domain_get_vcpu_context(int xc_handle, 13.81 + u32 domid, 13.82 + u32 vcpu, 13.83 + vcpu_guest_context_t *ctxt) 13.84 { 13.85 int rc, errno_saved; 13.86 dom0_op_t op; 13.87 13.88 - op.cmd = DOM0_GETDOMAININFO; 13.89 - op.u.getdomaininfo.domain = (domid_t)domid; 13.90 - op.u.getdomaininfo.exec_domain = (u16)vcpu; 13.91 - op.u.getdomaininfo.ctxt = ctxt; 13.92 + op.cmd = DOM0_GETVCPUCONTEXT; 13.93 + op.u.getvcpucontext.domain = (domid_t)domid; 13.94 + op.u.getvcpucontext.exec_domain = (u16)vcpu; 13.95 + op.u.getvcpucontext.ctxt = ctxt; 13.96 13.97 if ( (ctxt != NULL) && 13.98 ((rc = mlock(ctxt, sizeof(*ctxt))) != 0) ) 13.99 @@ -170,10 +172,7 @@ int xc_domain_getfullinfo(int xc_handle, 13.100 errno = errno_saved; 13.101 } 13.102 13.103 - if ( info != NULL ) 13.104 - memcpy(info, &op.u.getdomaininfo, sizeof(*info)); 13.105 - 13.106 - if ( ((u16)op.u.getdomaininfo.domain != domid) && (rc > 0) ) 13.107 + if ( rc > 0 ) 13.108 return -ESRCH; 13.109 else 13.110 return rc;
14.1 --- a/tools/libxc/xc_linux_build.c Tue May 10 13:56:23 2005 +0000 14.2 +++ b/tools/libxc/xc_linux_build.c Thu May 12 13:07:32 2005 +0000 14.3 @@ -356,14 +356,19 @@ int xc_linux_build(int xc_handle, 14.4 14.5 op.cmd = DOM0_GETDOMAININFO; 14.6 op.u.getdomaininfo.domain = (domid_t)domid; 14.7 - op.u.getdomaininfo.exec_domain = 0; 14.8 - op.u.getdomaininfo.ctxt = ctxt; 14.9 if ( (do_dom0_op(xc_handle, &op) < 0) || 14.10 ((u16)op.u.getdomaininfo.domain != domid) ) 14.11 { 14.12 PERROR("Could not get info on domain"); 14.13 goto error_out; 14.14 } 14.15 + 14.16 + if ( xc_domain_get_vcpu_context(xc_handle, domid, 0, ctxt) ) 14.17 + { 14.18 + PERROR("Could not get vcpu context"); 14.19 + goto error_out; 14.20 + } 14.21 + 14.22 if ( !(op.u.getdomaininfo.flags & DOMFLAGS_PAUSED) || 14.23 (ctxt->pt_base != 0) ) 14.24 { 14.25 @@ -409,7 +414,7 @@ int xc_linux_build(int xc_handle, 14.26 ctxt->user_regs.eip = vkern_entry; 14.27 ctxt->user_regs.esp = vstartinfo_start + 2*PAGE_SIZE; 14.28 ctxt->user_regs.esi = vstartinfo_start; 14.29 - ctxt->user_regs.eflags = (1<<9) | (1<<2); 14.30 + ctxt->user_regs.eflags = 1 << 9; /* Interrupt Enable */ 14.31 14.32 /* FPU is set up to default initial state. */ 14.33 memset(&ctxt->fpu_ctxt, 0, sizeof(ctxt->fpu_ctxt));
15.1 --- a/tools/libxc/xc_linux_restore.c Tue May 10 13:56:23 2005 +0000 15.2 +++ b/tools/libxc/xc_linux_restore.c Thu May 12 13:07:32 2005 +0000 15.3 @@ -181,8 +181,6 @@ int xc_linux_restore(int xc_handle, XcIO 15.4 /* Get the domain's shared-info frame. */ 15.5 op.cmd = DOM0_GETDOMAININFO; 15.6 op.u.getdomaininfo.domain = (domid_t)dom; 15.7 - op.u.getdomaininfo.exec_domain = 0; 15.8 - op.u.getdomaininfo.ctxt = NULL; 15.9 if ( do_dom0_op(xc_handle, &op) < 0 ) 15.10 { 15.11 xcio_error(ioctxt, "Could not get information on new domain");
16.1 --- a/tools/libxc/xc_linux_save.c Tue May 10 13:56:23 2005 +0000 16.2 +++ b/tools/libxc/xc_linux_save.c Thu May 12 13:07:32 2005 +0000 16.3 @@ -324,7 +324,7 @@ static int analysis_phase( int xc_handle 16.4 16.5 16.6 int suspend_and_state(int xc_handle, XcIOContext *ioctxt, 16.7 - xc_domaininfo_t *info, 16.8 + xc_dominfo_t *info, 16.9 vcpu_guest_context_t *ctxt) 16.10 { 16.11 int i=0; 16.12 @@ -333,27 +333,29 @@ int suspend_and_state(int xc_handle, XcI 16.13 16.14 retry: 16.15 16.16 - if ( xc_domain_getfullinfo(xc_handle, ioctxt->domain, /* FIXME */ 0, 16.17 - info, ctxt) ) 16.18 + if ( xc_domain_getinfo(xc_handle, ioctxt->domain, 1, info) ) 16.19 { 16.20 xcio_error(ioctxt, "Could not get full domain info"); 16.21 return -1; 16.22 } 16.23 16.24 - if ( (info->flags & 16.25 - (DOMFLAGS_SHUTDOWN | (SHUTDOWN_suspend<<DOMFLAGS_SHUTDOWNSHIFT))) == 16.26 - (DOMFLAGS_SHUTDOWN | (SHUTDOWN_suspend<<DOMFLAGS_SHUTDOWNSHIFT)) ) 16.27 + if ( xc_domain_get_vcpu_context(xc_handle, ioctxt->domain, 0 /* XXX */, 16.28 + ctxt) ) 16.29 + { 16.30 + xcio_error(ioctxt, "Could not get vcpu context"); 16.31 + } 16.32 + 16.33 + if ( info->shutdown && info->shutdown_reason == SHUTDOWN_suspend ) 16.34 { 16.35 return 0; // success 16.36 } 16.37 16.38 - if ( info->flags & DOMFLAGS_PAUSED ) 16.39 + if ( info->paused ) 16.40 { 16.41 // try unpausing domain, wait, and retest 16.42 xc_domain_unpause( xc_handle, ioctxt->domain ); 16.43 16.44 - xcio_error(ioctxt, "Domain was paused. Wait and re-test. (%u)", 16.45 - info->flags); 16.46 + xcio_error(ioctxt, "Domain was paused. Wait and re-test."); 16.47 usleep(10000); // 10ms 16.48 16.49 goto retry; 16.50 @@ -362,19 +364,19 @@ retry: 16.51 16.52 if( ++i < 100 ) 16.53 { 16.54 - xcio_error(ioctxt, "Retry suspend domain (%u)", info->flags); 16.55 + xcio_error(ioctxt, "Retry suspend domain."); 16.56 usleep(10000); // 10ms 16.57 goto retry; 16.58 } 16.59 16.60 - xcio_error(ioctxt, "Unable to suspend domain. (%u)", info->flags); 16.61 + xcio_error(ioctxt, "Unable to suspend domain."); 16.62 16.63 return -1; 16.64 } 16.65 16.66 int xc_linux_save(int xc_handle, XcIOContext *ioctxt) 16.67 { 16.68 - xc_domaininfo_t info; 16.69 + xc_dominfo_t info; 16.70 16.71 int rc = 1, i, j, k, last_iter, iter = 0; 16.72 unsigned long mfn; 16.73 @@ -444,13 +446,18 @@ int xc_linux_save(int xc_handle, XcIOCon 16.74 xcio_perror(ioctxt, "Unable to mlock ctxt"); 16.75 return 1; 16.76 } 16.77 - 16.78 - if ( xc_domain_getfullinfo( xc_handle, domid, /* FIXME */ 0, 16.79 - &info, &ctxt) ) 16.80 + 16.81 + if ( xc_domain_getinfo(xc_handle, domid, 1, &info) ) 16.82 { 16.83 xcio_error(ioctxt, "Could not get full domain info"); 16.84 goto out; 16.85 } 16.86 + if ( xc_domain_get_vcpu_context( xc_handle, domid, /* FIXME */ 0, 16.87 + &ctxt) ) 16.88 + { 16.89 + xcio_error(ioctxt, "Could not get vcpu context"); 16.90 + goto out; 16.91 + } 16.92 shared_info_frame = info.shared_info_frame; 16.93 16.94 /* A cheesy test to see whether the domain contains valid state. */ 16.95 @@ -459,7 +466,7 @@ int xc_linux_save(int xc_handle, XcIOCon 16.96 goto out; 16.97 } 16.98 16.99 - nr_pfns = info.max_pages; 16.100 + nr_pfns = info.max_memkb >> PAGE_SHIFT; 16.101 16.102 /* cheesy sanity check */ 16.103 if ( nr_pfns > 1024*1024 ){ 16.104 @@ -546,8 +553,7 @@ int xc_linux_save(int xc_handle, XcIOCon 16.105 16.106 if ( suspend_and_state( xc_handle, ioctxt, &info, &ctxt) ) 16.107 { 16.108 - xcio_error(ioctxt, "Domain appears not to have suspended: %u", 16.109 - info.flags); 16.110 + xcio_error(ioctxt, "Domain appears not to have suspended"); 16.111 goto out; 16.112 } 16.113 16.114 @@ -913,14 +919,12 @@ int xc_linux_save(int xc_handle, XcIOCon 16.115 if ( suspend_and_state( xc_handle, ioctxt, &info, &ctxt) ) 16.116 { 16.117 xcio_error(ioctxt, 16.118 - "Domain appears not to have suspended: %u", 16.119 - info.flags); 16.120 + "Domain appears not to have suspended"); 16.121 goto out; 16.122 } 16.123 16.124 xcio_info(ioctxt, 16.125 - "SUSPEND flags %08u shinfo %08lx eip %08u " 16.126 - "esi %08u\n",info.flags, 16.127 + "SUSPEND shinfo %08lx eip %08u esi %08u\n", 16.128 info.shared_info_frame, 16.129 ctxt.user_regs.eip, ctxt.user_regs.esi ); 16.130 }
17.1 --- a/tools/libxc/xc_plan9_build.c Tue May 10 13:56:23 2005 +0000 17.2 +++ b/tools/libxc/xc_plan9_build.c Thu May 12 13:07:32 2005 +0000 17.3 @@ -440,17 +440,21 @@ xc_plan9_build(int xc_handle, 17.4 17.5 op.cmd = DOM0_GETDOMAININFO; 17.6 op.u.getdomaininfo.domain = (domid_t) domid; 17.7 - op.u.getdomaininfo.exec_domain = 0; 17.8 - op.u.getdomaininfo.ctxt = ctxt; 17.9 if ((do_dom0_op(xc_handle, &op) < 0) || 17.10 ((u32) op.u.getdomaininfo.domain != domid)) { 17.11 PERROR("Could not get info on domain"); 17.12 goto error_out; 17.13 } 17.14 DPRINTF(("xc_get_tot_pages returns %ld pages\n", tot_pages)); 17.15 + 17.16 + if ( xc_domain_get_vcpu_context(xc_handle, domid, 0, ctxt) ) 17.17 + { 17.18 + PERROR("Could not get vcpu context"); 17.19 + goto error_out; 17.20 + } 17.21 17.22 if (!(op.u.getdomaininfo.flags & DOMFLAGS_PAUSED) 17.23 - || (op.u.getdomaininfo.ctxt->pt_base != 0)) { 17.24 + || (ctxt->pt_base != 0)) { 17.25 ERROR("Domain is already constructed"); 17.26 goto error_out; 17.27 } 17.28 @@ -495,7 +499,7 @@ xc_plan9_build(int xc_handle, 17.29 17.30 /* why is this set? */ 17.31 ctxt->user_regs.esi = ctxt->user_regs.esp; 17.32 - ctxt->user_regs.eflags = (1 << 9) | (1 << 2); 17.33 + ctxt->user_regs.eflags = 1 << 9; /* Interrupt Enable */ 17.34 17.35 /* FPU is set up to default initial state. */ 17.36 memset(&ctxt->fpu_ctxt, 0, sizeof(ctxt->fpu_ctxt));
18.1 --- a/tools/libxc/xc_private.c Tue May 10 13:56:23 2005 +0000 18.2 +++ b/tools/libxc/xc_private.c Thu May 12 13:07:32 2005 +0000 18.3 @@ -13,18 +13,18 @@ void *xc_map_foreign_batch(int xc_handle 18.4 privcmd_mmapbatch_t ioctlx; 18.5 void *addr; 18.6 addr = mmap(NULL, num*PAGE_SIZE, prot, MAP_SHARED, xc_handle, 0); 18.7 - if ( addr != NULL ) 18.8 + if ( addr == MAP_FAILED ) 18.9 + return NULL; 18.10 + 18.11 + ioctlx.num=num; 18.12 + ioctlx.dom=dom; 18.13 + ioctlx.addr=(unsigned long)addr; 18.14 + ioctlx.arr=arr; 18.15 + if ( ioctl( xc_handle, IOCTL_PRIVCMD_MMAPBATCH, &ioctlx ) < 0 ) 18.16 { 18.17 - ioctlx.num=num; 18.18 - ioctlx.dom=dom; 18.19 - ioctlx.addr=(unsigned long)addr; 18.20 - ioctlx.arr=arr; 18.21 - if ( ioctl( xc_handle, IOCTL_PRIVCMD_MMAPBATCH, &ioctlx ) < 0 ) 18.22 - { 18.23 - perror("XXXXXXXX"); 18.24 - munmap(addr, num*PAGE_SIZE); 18.25 - return 0; 18.26 - } 18.27 + perror("XXXXXXXX"); 18.28 + munmap(addr, num*PAGE_SIZE); 18.29 + return NULL; 18.30 } 18.31 return addr; 18.32 18.33 @@ -40,19 +40,19 @@ void *xc_map_foreign_range(int xc_handle 18.34 privcmd_mmap_entry_t entry; 18.35 void *addr; 18.36 addr = mmap(NULL, size, prot, MAP_SHARED, xc_handle, 0); 18.37 - if ( addr != NULL ) 18.38 + if ( addr == MAP_FAILED ) 18.39 + return NULL; 18.40 + 18.41 + ioctlx.num=1; 18.42 + ioctlx.dom=dom; 18.43 + ioctlx.entry=&entry; 18.44 + entry.va=(unsigned long) addr; 18.45 + entry.mfn=mfn; 18.46 + entry.npages=(size+PAGE_SIZE-1)>>PAGE_SHIFT; 18.47 + if ( ioctl( xc_handle, IOCTL_PRIVCMD_MMAP, &ioctlx ) < 0 ) 18.48 { 18.49 - ioctlx.num=1; 18.50 - ioctlx.dom=dom; 18.51 - ioctlx.entry=&entry; 18.52 - entry.va=(unsigned long) addr; 18.53 - entry.mfn=mfn; 18.54 - entry.npages=(size+PAGE_SIZE-1)>>PAGE_SHIFT; 18.55 - if ( ioctl( xc_handle, IOCTL_PRIVCMD_MMAP, &ioctlx ) < 0 ) 18.56 - { 18.57 - munmap(addr, size); 18.58 - return 0; 18.59 - } 18.60 + munmap(addr, size); 18.61 + return NULL; 18.62 } 18.63 return addr; 18.64 } 18.65 @@ -173,17 +173,16 @@ long long xc_domain_get_cpu_usage( int x 18.66 { 18.67 dom0_op_t op; 18.68 18.69 - op.cmd = DOM0_GETDOMAININFO; 18.70 - op.u.getdomaininfo.domain = (domid_t)domid; 18.71 - op.u.getdomaininfo.exec_domain = (u16)vcpu; 18.72 - op.u.getdomaininfo.ctxt = NULL; 18.73 - if ( (do_dom0_op(xc_handle, &op) < 0) || 18.74 - ((u16)op.u.getdomaininfo.domain != domid) ) 18.75 + op.cmd = DOM0_GETVCPUCONTEXT; 18.76 + op.u.getvcpucontext.domain = (domid_t)domid; 18.77 + op.u.getvcpucontext.exec_domain = (u16)vcpu; 18.78 + op.u.getvcpucontext.ctxt = NULL; 18.79 + if ( (do_dom0_op(xc_handle, &op) < 0) ) 18.80 { 18.81 PERROR("Could not get info on domain"); 18.82 return -1; 18.83 } 18.84 - return op.u.getdomaininfo.cpu_time; 18.85 + return op.u.getvcpucontext.cpu_time; 18.86 } 18.87 18.88 18.89 @@ -258,8 +257,6 @@ long xc_get_tot_pages(int xc_handle, u32 18.90 dom0_op_t op; 18.91 op.cmd = DOM0_GETDOMAININFO; 18.92 op.u.getdomaininfo.domain = (domid_t)domid; 18.93 - op.u.getdomaininfo.exec_domain = 0; 18.94 - op.u.getdomaininfo.ctxt = NULL; 18.95 return (do_dom0_op(xc_handle, &op) < 0) ? 18.96 -1 : op.u.getdomaininfo.tot_pages; 18.97 }
19.1 --- a/tools/libxc/xc_ptrace.c Tue May 10 13:56:23 2005 +0000 19.2 +++ b/tools/libxc/xc_ptrace.c Thu May 12 13:07:32 2005 +0000 19.3 @@ -71,7 +71,7 @@ struct gdb_regs { 19.4 #define FETCH_REGS(cpu) \ 19.5 if (!regs_valid[cpu]) \ 19.6 { \ 19.7 - int retval = xc_domain_getfullinfo(xc_handle, domid, cpu, NULL, &ctxt[cpu]); \ 19.8 + int retval = xc_domain_get_vcpu_context(xc_handle, domid, cpu, &ctxt[cpu]); \ 19.9 if (retval) \ 19.10 goto error_out; \ 19.11 cr3[cpu] = ctxt[cpu].pt_base; /* physical address */ \ 19.12 @@ -221,7 +221,6 @@ xc_waitdomain(int domain, int *status, i 19.13 { 19.14 dom0_op_t op; 19.15 int retval; 19.16 - vcpu_guest_context_t ctxt; 19.17 struct timespec ts; 19.18 ts.tv_sec = 0; 19.19 ts.tv_nsec = 10*1000*1000; 19.20 @@ -234,12 +233,10 @@ xc_waitdomain(int domain, int *status, i 19.21 } 19.22 op.cmd = DOM0_GETDOMAININFO; 19.23 op.u.getdomaininfo.domain = domain; 19.24 - op.u.getdomaininfo.exec_domain = 0; 19.25 - op.u.getdomaininfo.ctxt = &ctxt; 19.26 retry: 19.27 19.28 retval = do_dom0_op(xc_handle, &op); 19.29 - if (retval) { 19.30 + if (retval || op.u.getdomaininfo.domain != domain) { 19.31 printf("getdomaininfo failed\n"); 19.32 goto done; 19.33 } 19.34 @@ -325,10 +322,8 @@ xc_ptrace(enum __ptrace_request request, 19.35 case PTRACE_ATTACH: 19.36 op.cmd = DOM0_GETDOMAININFO; 19.37 op.u.getdomaininfo.domain = domid; 19.38 - op.u.getdomaininfo.exec_domain = 0; 19.39 - op.u.getdomaininfo.ctxt = NULL; 19.40 retval = do_dom0_op(xc_handle, &op); 19.41 - if (retval) { 19.42 + if (retval || op.u.getdomaininfo.domain != domid) { 19.43 perror("dom0 op failed"); 19.44 goto error_out; 19.45 }
20.1 --- a/tools/libxc/xc_ptrace_core.c Tue May 10 13:56:23 2005 +0000 20.2 +++ b/tools/libxc/xc_ptrace_core.c Thu May 12 13:07:32 2005 +0000 20.3 @@ -107,6 +107,7 @@ map_domain_va(unsigned long domfd, int c 20.4 { 20.5 unsigned long pde, page; 20.6 unsigned long va = (unsigned long)guest_va; 20.7 + void *v; 20.8 20.9 static unsigned long cr3_phys[MAX_VIRT_CPUS]; 20.10 static unsigned long *cr3_virt[MAX_VIRT_CPUS]; 20.11 @@ -120,13 +121,15 @@ map_domain_va(unsigned long domfd, int c 20.12 cr3_phys[cpu] = cr3[cpu]; 20.13 if (cr3_virt[cpu]) 20.14 munmap(cr3_virt[cpu], PAGE_SIZE); 20.15 - if ((cr3_virt[cpu] = mmap(NULL, PAGE_SIZE, PROT_READ, 20.16 - MAP_PRIVATE, domfd, map_mtop_offset(cr3_phys[cpu]))) == 20.17 - (unsigned long*)0xffffffff) 20.18 + v = mmap( 20.19 + NULL, PAGE_SIZE, PROT_READ, MAP_PRIVATE, domfd, 20.20 + map_mtop_offset(cr3_phys[cpu])); 20.21 + if (v == MAP_FAILED) 20.22 { 20.23 perror("mmap failed"); 20.24 goto error_out; 20.25 } 20.26 + cr3_virt[cpu] = v; 20.27 } 20.28 if ((pde = cr3_virt[cpu][vtopdi(va)]) == 0) /* logical address */ 20.29 goto error_out; 20.30 @@ -137,9 +140,12 @@ map_domain_va(unsigned long domfd, int c 20.31 pde_phys[cpu] = pde; 20.32 if (pde_virt[cpu]) 20.33 munmap(pde_virt[cpu], PAGE_SIZE); 20.34 - if ((pde_virt[cpu] = mmap(NULL, PAGE_SIZE, PROT_READ, 20.35 - MAP_PRIVATE, domfd, map_mtop_offset(pde_phys[cpu]))) == NULL) 20.36 + v = mmap( 20.37 + NULL, PAGE_SIZE, PROT_READ, MAP_PRIVATE, domfd, 20.38 + map_mtop_offset(pde_phys[cpu])); 20.39 + if (v == MAP_FAILED) 20.40 goto error_out; 20.41 + pde_virt[cpu] = v; 20.42 } 20.43 if ((page = pde_virt[cpu][vtopti(va)]) == 0) /* logical address */ 20.44 goto error_out; 20.45 @@ -150,12 +156,15 @@ map_domain_va(unsigned long domfd, int c 20.46 page_phys[cpu] = page; 20.47 if (page_virt[cpu]) 20.48 munmap(page_virt[cpu], PAGE_SIZE); 20.49 - if ((page_virt[cpu] = mmap(NULL, PAGE_SIZE, PROT_READ, 20.50 - MAP_PRIVATE, domfd, map_mtop_offset(page_phys[cpu]))) == NULL) { 20.51 + v = mmap( 20.52 + NULL, PAGE_SIZE, PROT_READ, MAP_PRIVATE, domfd, 20.53 + map_mtop_offset(page_phys[cpu])); 20.54 + if (v == MAP_FAILED) { 20.55 printf("cr3 %lx pde %lx page %lx pti %lx\n", cr3[cpu], pde, page, vtopti(va)); 20.56 page_phys[cpu] = 0; 20.57 goto error_out; 20.58 } 20.59 + page_virt[cpu] = v; 20.60 } 20.61 return (void *)(((unsigned long)page_virt[cpu]) | (va & BSD_PAGE_MASK)); 20.62
21.1 --- a/tools/libxc/xc_vmx_build.c Tue May 10 13:56:23 2005 +0000 21.2 +++ b/tools/libxc/xc_vmx_build.c Thu May 12 13:07:32 2005 +0000 21.3 @@ -447,7 +447,7 @@ static int setup_guest(int xc_handle, 21.4 ctxt->user_regs.esi = vboot_params_start; 21.5 ctxt->user_regs.edi = vboot_params_start + 0x2d0; 21.6 21.7 - ctxt->user_regs.eflags = (1<<2); 21.8 + ctxt->user_regs.eflags = 0; 21.9 21.10 return 0; 21.11 21.12 @@ -543,14 +543,19 @@ int xc_vmx_build(int xc_handle, 21.13 21.14 op.cmd = DOM0_GETDOMAININFO; 21.15 op.u.getdomaininfo.domain = (domid_t)domid; 21.16 - op.u.getdomaininfo.exec_domain = 0; 21.17 - op.u.getdomaininfo.ctxt = ctxt; 21.18 if ( (do_dom0_op(xc_handle, &op) < 0) || 21.19 ((u16)op.u.getdomaininfo.domain != domid) ) 21.20 { 21.21 PERROR("Could not get info on domain"); 21.22 goto error_out; 21.23 } 21.24 + 21.25 + if ( xc_domain_get_vcpu_context(xc_handle, domid, 0, ctxt) ) 21.26 + { 21.27 + PERROR("Could not get vcpu context"); 21.28 + goto error_out; 21.29 + } 21.30 + 21.31 if ( !(op.u.getdomaininfo.flags & DOMFLAGS_PAUSED) || 21.32 (ctxt->pt_base != 0) ) 21.33 {
22.1 --- a/tools/python/xen/lowlevel/xc/xc.c Tue May 10 13:56:23 2005 +0000 22.2 +++ b/tools/python/xen/lowlevel/xc/xc.c Thu May 12 13:07:32 2005 +0000 22.3 @@ -155,15 +155,16 @@ static PyObject *pyxc_domain_pincpu(PyOb 22.4 XcObject *xc = (XcObject *)self; 22.5 22.6 u32 dom; 22.7 - int cpu = -1; 22.8 + int vcpu = 0; 22.9 + cpumap_t cpumap = 0xFFFFFFFF; 22.10 22.11 - static char *kwd_list[] = { "dom", "cpu", NULL }; 22.12 + static char *kwd_list[] = { "dom", "vcpu", "cpumap", NULL }; 22.13 22.14 - if ( !PyArg_ParseTupleAndKeywords(args, kwds, "i|i", kwd_list, 22.15 - &dom, &cpu) ) 22.16 + if ( !PyArg_ParseTupleAndKeywords(args, kwds, "i|ii", kwd_list, 22.17 + &dom, &vcpu, &cpumap) ) 22.18 return NULL; 22.19 22.20 - if ( xc_domain_pincpu(xc->xc_handle, dom, cpu) != 0 ) 22.21 + if ( xc_domain_pincpu(xc->xc_handle, dom, vcpu, &cpumap) != 0 ) 22.22 return PyErr_SetFromErrno(xc_error); 22.23 22.24 Py_INCREF(zero); 22.25 @@ -175,10 +176,10 @@ static PyObject *pyxc_domain_getinfo(PyO 22.26 PyObject *kwds) 22.27 { 22.28 XcObject *xc = (XcObject *)self; 22.29 - PyObject *list; 22.30 + PyObject *list, *vcpu_list, *cpumap_list, *info_dict; 22.31 22.32 u32 first_dom = 0; 22.33 - int max_doms = 1024, nr_doms, i; 22.34 + int max_doms = 1024, nr_doms, i, j; 22.35 xc_dominfo_t *info; 22.36 22.37 static char *kwd_list[] = { "first_dom", "max_doms", NULL }; 22.38 @@ -195,23 +196,33 @@ static PyObject *pyxc_domain_getinfo(PyO 22.39 list = PyList_New(nr_doms); 22.40 for ( i = 0 ; i < nr_doms; i++ ) 22.41 { 22.42 - PyList_SetItem( 22.43 - list, i, 22.44 - Py_BuildValue("{s:i,s:i,s:i,s:i,s:i,s:i,s:i,s:i" 22.45 - ",s:l,s:L,s:l,s:i}", 22.46 - "dom", info[i].domid, 22.47 - "cpu", info[i].cpu, 22.48 - "dying", info[i].dying, 22.49 - "crashed", info[i].crashed, 22.50 - "shutdown", info[i].shutdown, 22.51 - "paused", info[i].paused, 22.52 - "blocked", info[i].blocked, 22.53 - "running", info[i].running, 22.54 - "mem_kb", info[i].nr_pages*4, 22.55 - "cpu_time", info[i].cpu_time, 22.56 - "maxmem_kb", info[i].max_memkb, 22.57 - "shutdown_reason", info[i].shutdown_reason 22.58 - )); 22.59 + vcpu_list = PyList_New(MAX_VIRT_CPUS); 22.60 + cpumap_list = PyList_New(MAX_VIRT_CPUS); 22.61 + for ( j = 0; j < MAX_VIRT_CPUS; j++ ) { 22.62 + PyList_SetItem( vcpu_list, j, 22.63 + Py_BuildValue("i", info[i].vcpu_to_cpu[j])); 22.64 + PyList_SetItem( cpumap_list, j, 22.65 + Py_BuildValue("i", info[i].cpumap[j])); 22.66 + } 22.67 + 22.68 + info_dict = Py_BuildValue("{s:i,s:i,s:i,s:i,s:i,s:i,s:i,s:i" 22.69 + ",s:l,s:L,s:l,s:i}", 22.70 + "dom", info[i].domid, 22.71 + "vcpus", info[i].vcpus, 22.72 + "dying", info[i].dying, 22.73 + "crashed", info[i].crashed, 22.74 + "shutdown", info[i].shutdown, 22.75 + "paused", info[i].paused, 22.76 + "blocked", info[i].blocked, 22.77 + "running", info[i].running, 22.78 + "mem_kb", info[i].nr_pages*4, 22.79 + "cpu_time", info[i].cpu_time, 22.80 + "maxmem_kb", info[i].max_memkb, 22.81 + "shutdown_reason", info[i].shutdown_reason); 22.82 + PyDict_SetItemString( info_dict, "vcpu_to_cpu", vcpu_list ); 22.83 + PyDict_SetItemString( info_dict, "cpumap", cpumap_list ); 22.84 + PyList_SetItem( list, i, info_dict); 22.85 + 22.86 } 22.87 22.88 free(info); 22.89 @@ -959,9 +970,10 @@ static PyMethodDef pyxc_methods[] = { 22.90 { "domain_pincpu", 22.91 (PyCFunction)pyxc_domain_pincpu, 22.92 METH_VARARGS | METH_KEYWORDS, "\n" 22.93 - "Pin a domain to a specified CPU.\n" 22.94 - " dom [int]: Identifier of domain to be pinned.\n" 22.95 - " cpu [int, -1]: CPU to pin to, or -1 to unpin\n\n" 22.96 + "Pin a VCPU to a specified set CPUs.\n" 22.97 + " dom [int]: Identifier of domain to which VCPU belongs.\n" 22.98 + " vcpu [int, 0]: VCPU being pinned.\n" 22.99 + " cpumap [int, -1]: Bitmap of usable CPUs.\n\n" 22.100 "Returns: [int] 0 on success; -1 on error.\n" }, 22.101 22.102 { "domain_getinfo", 22.103 @@ -976,6 +988,7 @@ static PyMethodDef pyxc_methods[] = { 22.104 " domain-id space was reached.\n" 22.105 " dom [int]: Identifier of domain to which this info pertains\n" 22.106 " cpu [int]: CPU to which this domain is bound\n" 22.107 + " vcpus [int]: Number of Virtual CPUS in this domain\n" 22.108 " dying [int]: Bool - is the domain dying?\n" 22.109 " crashed [int]: Bool - has the domain crashed?\n" 22.110 " shutdown [int]: Bool - has the domain shut itself down?\n" 22.111 @@ -986,7 +999,8 @@ static PyMethodDef pyxc_methods[] = { 22.112 " maxmem_kb [int]: Maximum memory limit, in kilobytes\n" 22.113 " cpu_time [long]: CPU time consumed, in nanoseconds\n" 22.114 " shutdown_reason [int]: Numeric code from guest OS, explaining " 22.115 - "reason why it shut itself down.\n" }, 22.116 + "reason why it shut itself down.\n" 22.117 + " vcpu_to_cpu [[int]]: List that maps VCPUS to CPUS\n" }, 22.118 22.119 { "linux_save", 22.120 (PyCFunction)pyxc_linux_save,
23.1 --- a/tools/python/xen/xend/XendClient.py Tue May 10 13:56:23 2005 +0000 23.2 +++ b/tools/python/xen/xend/XendClient.py Thu May 12 13:07:32 2005 +0000 23.3 @@ -246,10 +246,11 @@ class Xend: 23.4 'live' : live, 23.5 'resource' : resource }) 23.6 23.7 - def xend_domain_pincpu(self, id, cpu): 23.8 + def xend_domain_pincpu(self, id, vcpu, cpumap): 23.9 return self.xendPost(self.domainurl(id), 23.10 {'op' : 'pincpu', 23.11 - 'cpu' : cpu }) 23.12 + 'vcpu' : vcpu, 23.13 + 'cpumap' : cpumap }) 23.14 23.15 def xend_domain_cpu_bvt_set(self, id, mcuadv, warpback, warpvalue, warpl, warpu): 23.16 return self.xendPost(self.domainurl(id),
24.1 --- a/tools/python/xen/xend/XendDomain.py Tue May 10 13:56:23 2005 +0000 24.2 +++ b/tools/python/xen/xend/XendDomain.py Thu May 12 13:07:32 2005 +0000 24.3 @@ -612,15 +612,16 @@ class XendDomain: 24.4 xmigrate = XendMigrate.instance() 24.5 return xmigrate.save_begin(dominfo, dst) 24.6 24.7 - def domain_pincpu(self, id, cpu): 24.8 - """Pin a domain to a cpu. 24.9 + def domain_pincpu(self, id, vcpu, cpumap): 24.10 + """Set which cpus vcpu can use 24.11 24.12 - @param id: domain 24.13 - @param cpu: cpu number 24.14 + @param id: domain 24.15 + @param vcpu: vcpu number 24.16 + @param cpumap: bitmap of usbale cpus 24.17 """ 24.18 dominfo = self.domain_lookup(id) 24.19 try: 24.20 - return xc.domain_pincpu(int(dominfo.id), cpu) 24.21 + return xc.domain_pincpu(int(dominfo.id), vcpu, cpumap) 24.22 except Exception, ex: 24.23 raise XendError(str(ex)) 24.24
25.1 --- a/tools/python/xen/xend/XendDomainInfo.py Tue May 10 13:56:23 2005 +0000 25.2 +++ b/tools/python/xen/xend/XendDomainInfo.py Thu May 12 13:07:32 2005 +0000 25.3 @@ -370,8 +370,12 @@ class XendDomainInfo: 25.4 if self.info['shutdown']: 25.5 reason = shutdown_reason(self.info['shutdown_reason']) 25.6 sxpr.append(['shutdown_reason', reason]) 25.7 - sxpr.append(['cpu', self.info['cpu']]) 25.8 + sxpr.append(['cpu', self.info['vcpu_to_cpu'][0]]) 25.9 sxpr.append(['cpu_time', self.info['cpu_time']/1e9]) 25.10 + sxpr.append(['vcpus', self.info['vcpus']]) 25.11 + sxpr.append(['cpumap', self.info['cpumap']]) 25.12 + sxpr.append(['vcpu_to_cpu', ''.join(map(lambda x: str(x), 25.13 + self.info['vcpu_to_cpu'][0:self.info['vcpus']]))]) 25.14 25.15 if self.start_time: 25.16 up_time = time.time() - self.start_time 25.17 @@ -449,7 +453,7 @@ class XendDomainInfo: 25.18 raise VmError('missing memory size') 25.19 cpu = sxp.child_value(config, 'cpu') 25.20 if self.recreate and self.dom and cpu is not None: 25.21 - xc.domain_pincpu(self.dom, int(cpu)) 25.22 + xc.domain_pincpu(self.dom, 0, 1<<int(cpu)) 25.23 try: 25.24 image = sxp.child_value(self.config, 'image') 25.25 self.vcpus = int(sxp.child_value(image, 'vcpus'))
26.1 --- a/tools/python/xen/xend/server/SrvDomain.py Tue May 10 13:56:23 2005 +0000 26.2 +++ b/tools/python/xen/xend/server/SrvDomain.py Thu May 12 13:07:32 2005 +0000 26.3 @@ -92,7 +92,8 @@ class SrvDomain(SrvDir): 26.4 def op_pincpu(self, op, req): 26.5 fn = FormFn(self.xd.domain_pincpu, 26.6 [['dom', 'str'], 26.7 - ['cpu', 'int']]) 26.8 + ['vcpu', 'int'], 26.9 + ['cpumap', 'int']]) 26.10 val = fn(req.args, {'dom': self.dom.id}) 26.11 return val 26.12
27.1 --- a/tools/python/xen/xend/server/SrvUsbif.py Tue May 10 13:56:23 2005 +0000 27.2 +++ b/tools/python/xen/xend/server/SrvUsbif.py Thu May 12 13:07:32 2005 +0000 27.3 @@ -107,6 +107,7 @@ class SrvDomain(SrvDir): 27.4 def op_pincpu(self, op, req): 27.5 fn = FormFn(self.xd.domain_pincpu, 27.6 [['dom', 'str'], 27.7 + ['vcpu', 'int'], 27.8 ['cpu', 'int']]) 27.9 val = fn(req.args, {'dom': self.dom.id}) 27.10 return val
28.1 --- a/tools/python/xen/xm/main.py Tue May 10 13:56:23 2005 +0000 28.2 +++ b/tools/python/xen/xm/main.py Thu May 12 13:07:32 2005 +0000 28.3 @@ -6,6 +6,8 @@ import os.path 28.4 import sys 28.5 from getopt import getopt 28.6 import socket 28.7 +import warnings 28.8 +warnings.filterwarnings('ignore', category=FutureWarning) 28.9 28.10 from xen.xend import PrettyPrint 28.11 from xen.xend import sxp 28.12 @@ -340,8 +342,8 @@ class ProgList(Prog): 28.13 name = "list" 28.14 info = """List information about domains.""" 28.15 28.16 - short_options = 'l' 28.17 - long_options = ['long'] 28.18 + short_options = 'lv' 28.19 + long_options = ['long','vcpus'] 28.20 28.21 def help(self, args): 28.22 if help: 28.23 @@ -350,11 +352,13 @@ class ProgList(Prog): 28.24 Either all domains or the domains given. 28.25 28.26 -l, --long Get more detailed information. 28.27 + -v, --vcpus Show VCPU to CPU mapping. 28.28 """ 28.29 return 28.30 28.31 def main(self, args): 28.32 use_long = 0 28.33 + show_vcpus = 0 28.34 (options, params) = getopt(args[1:], 28.35 self.short_options, 28.36 self.long_options) 28.37 @@ -362,6 +366,8 @@ class ProgList(Prog): 28.38 for (k, v) in options: 28.39 if k in ['-l', '--long']: 28.40 use_long = 1 28.41 + if k in ['-v', '--vcpus']: 28.42 + show_vcpus = 1 28.43 28.44 if n == 0: 28.45 doms = server.xend_domains() 28.46 @@ -371,11 +377,13 @@ class ProgList(Prog): 28.47 28.48 if use_long: 28.49 self.long_list(doms) 28.50 + elif show_vcpus: 28.51 + self.show_vcpus(doms) 28.52 else: 28.53 self.brief_list(doms) 28.54 28.55 def brief_list(self, doms): 28.56 - print 'Name Id Mem(MB) CPU State Time(s) Console' 28.57 + print 'Name Id Mem(MB) CPU VCPU(s) State Time(s) Console' 28.58 for dom in doms: 28.59 info = server.xend_domain(dom) 28.60 d = {} 28.61 @@ -383,6 +391,7 @@ class ProgList(Prog): 28.62 d['name'] = sxp.child_value(info, 'name', '??') 28.63 d['mem'] = int(sxp.child_value(info, 'memory', '0')) 28.64 d['cpu'] = int(sxp.child_value(info, 'cpu', '0')) 28.65 + d['vcpus'] = int(sxp.child_value(info, 'vcpus', '0')) 28.66 d['state'] = sxp.child_value(info, 'state', '??') 28.67 d['cpu_time'] = float(sxp.child_value(info, 'cpu_time', '0')) 28.68 console = sxp.child(info, 'console') 28.69 @@ -390,9 +399,27 @@ class ProgList(Prog): 28.70 d['port'] = sxp.child_value(console, 'console_port') 28.71 else: 28.72 d['port'] = '' 28.73 - print ("%(name)-16s %(dom)3d %(mem)7d %(cpu)3d %(state)5s %(cpu_time)7.1f %(port)4s" 28.74 + print ("%(name)-16s %(dom)3d %(mem)7d %(cpu)3d %(vcpus)5d %(state)5s %(cpu_time)7.1f %(port)4s" 28.75 % d) 28.76 28.77 + def show_vcpus(self, doms): 28.78 + print 'Name Id VCPU CPU CPUMAP' 28.79 + for dom in doms: 28.80 + info = server.xend_domain(dom) 28.81 + vcpu_to_cpu = sxp.child_value(info, 'vcpu_to_cpu', '?').replace('-','') 28.82 + cpumap = sxp.child_value(info, 'cpumap', []) 28.83 + mask = ((int(sxp.child_value(info, 'vcpus', '0')))**2) - 1 28.84 + count = 0 28.85 + for cpu in vcpu_to_cpu: 28.86 + d = {} 28.87 + d['name'] = sxp.child_value(info, 'name', '??') 28.88 + d['dom'] = int(sxp.child_value(info, 'id', '-1')) 28.89 + d['vcpu'] = int(count) 28.90 + d['cpu'] = int(cpu) 28.91 + d['cpumap'] = int(cpumap[count])&mask 28.92 + count = count + 1 28.93 + print ("%(name)-16s %(dom)3d %(vcpu)4d %(cpu)3d 0x%(cpumap)x" % d) 28.94 + 28.95 def long_list(self, doms): 28.96 for dom in doms: 28.97 info = server.xend_domain(dom) 28.98 @@ -474,17 +501,35 @@ xm.prog(ProgUnpause) 28.99 class ProgPincpu(Prog): 28.100 group = 'domain' 28.101 name = "pincpu" 28.102 - info = """Pin a domain to a cpu. """ 28.103 + info = """Set which cpus a VCPU can use. """ 28.104 28.105 def help(self, args): 28.106 - print args[0],'DOM CPU' 28.107 - print '\nPin domain DOM to cpu CPU.' 28.108 + print args[0],'DOM VCPU CPUS' 28.109 + print '\nSet which cpus VCPU in domain DOM can use.' 28.110 + 28.111 + # convert list of cpus to bitmap integer value 28.112 + def make_map(self, cpulist): 28.113 + cpus = [] 28.114 + cpumap = 0 28.115 + for c in cpulist.split(','): 28.116 + if len(c) > 1: 28.117 + (x,y) = c.split('-') 28.118 + for i in range(int(x),int(y)+1): 28.119 + cpus.append(int(i)) 28.120 + else: 28.121 + cpus.append(int(c)) 28.122 + cpus.sort() 28.123 + for c in cpus: 28.124 + cpumap = cpumap | 1<<c 28.125 + 28.126 + return cpumap 28.127 28.128 def main(self, args): 28.129 - if len(args) != 3: self.err("%s: Invalid argument(s)" % args[0]) 28.130 - dom = args[1] 28.131 - cpu = int(args[2]) 28.132 - server.xend_domain_pincpu(dom, cpu) 28.133 + if len(args) != 4: self.err("%s: Invalid argument(s)" % args[0]) 28.134 + dom = args[1] 28.135 + vcpu = int(args[2]) 28.136 + cpumap = self.make_map(args[3]); 28.137 + server.xend_domain_pincpu(dom, vcpu, cpumap) 28.138 28.139 xm.prog(ProgPincpu) 28.140
29.1 --- a/xen/arch/ia64/asm-offsets.c Tue May 10 13:56:23 2005 +0000 29.2 +++ b/xen/arch/ia64/asm-offsets.c Thu May 12 13:07:32 2005 +0000 29.3 @@ -8,6 +8,7 @@ 29.4 #include <xen/sched.h> 29.5 #include <asm/processor.h> 29.6 #include <asm/ptrace.h> 29.7 +#include <public/xen.h> 29.8 29.9 #define task_struct exec_domain 29.10 29.11 @@ -37,6 +38,9 @@ void foo(void) 29.12 29.13 BLANK(); 29.14 29.15 + DEFINE(XSI_PSR_IC_OFS, offsetof(vcpu_info_t, arch.interrupt_collection_enabled)); 29.16 + DEFINE(XSI_PSR_IC, (SHAREDINFO_ADDR+offsetof(vcpu_info_t, arch.interrupt_collection_enabled))); 29.17 + DEFINE(XSI_PSR_I_OFS, offsetof(vcpu_info_t, arch.interrupt_delivery_enabled)); 29.18 //DEFINE(IA64_TASK_BLOCKED_OFFSET,offsetof (struct task_struct, blocked)); 29.19 //DEFINE(IA64_TASK_CLEAR_CHILD_TID_OFFSET,offsetof (struct task_struct, clear_child_tid)); 29.20 //DEFINE(IA64_TASK_GROUP_LEADER_OFFSET, offsetof (struct task_struct, group_leader)); 29.21 @@ -46,8 +50,8 @@ void foo(void) 29.22 //DEFINE(IA64_TASK_SIGHAND_OFFSET,offsetof (struct task_struct, sighand)); 29.23 //DEFINE(IA64_TASK_SIGNAL_OFFSET,offsetof (struct task_struct, signal)); 29.24 //DEFINE(IA64_TASK_TGID_OFFSET, offsetof (struct task_struct, tgid)); 29.25 - DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct task_struct, thread.ksp)); 29.26 - DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct task_struct, thread.on_ustack)); 29.27 + DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct exec_domain, arch._thread.ksp)); 29.28 + DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct exec_domain, arch._thread.on_ustack)); 29.29 29.30 BLANK(); 29.31
30.1 --- a/xen/arch/ia64/domain.c Tue May 10 13:56:23 2005 +0000 30.2 +++ b/xen/arch/ia64/domain.c Thu May 12 13:07:32 2005 +0000 30.3 @@ -191,7 +191,7 @@ void arch_do_createdomain(struct exec_do 30.4 // stay on kernel stack because may get interrupts! 30.5 // ia64_ret_from_clone (which b0 gets in new_thread) switches 30.6 // to user stack 30.7 - ed->thread.on_ustack = 0; 30.8 + ed->arch._thread.on_ustack = 0; 30.9 } 30.10 30.11 void arch_do_boot_vcpu(struct exec_domain *p) 30.12 @@ -261,7 +261,7 @@ void new_thread(struct exec_domain *ed, 30.13 printf("new_thread: ed=%p, start_pc=%p, regs=%p, sw=%p, new_rbs=%p, IA64_STK_OFFSET=%p, &r8=%p\n", 30.14 ed,start_pc,regs,sw,new_rbs,IA64_STK_OFFSET,®s->r8); 30.15 sw->b0 = (unsigned long) &ia64_ret_from_clone; 30.16 - ed->thread.ksp = (unsigned long) sw - 16; 30.17 + ed->arch._thread.ksp = (unsigned long) sw - 16; 30.18 //ed->thread_info->flags = 0; 30.19 printk("new_thread, about to call init_all_rr\n"); 30.20 init_all_rr(ed);
31.1 --- a/xen/arch/ia64/irq.c Tue May 10 13:56:23 2005 +0000 31.2 +++ b/xen/arch/ia64/irq.c Thu May 12 13:07:32 2005 +0000 31.3 @@ -1406,9 +1406,11 @@ int pirq_guest_bind(struct exec_domain * 31.4 desc->handler->startup(irq); 31.5 31.6 /* Attempt to bind the interrupt target to the correct CPU. */ 31.7 +#if 0 /* FIXME CONFIG_SMP ??? */ 31.8 if ( desc->handler->set_affinity != NULL ) 31.9 desc->handler->set_affinity( 31.10 irq, apicid_to_phys_cpu_present(d->processor)); 31.11 +#endif 31.12 } 31.13 else if ( !will_share || !action->shareable ) 31.14 {
32.1 --- a/xen/arch/ia64/ivt.S Tue May 10 13:56:23 2005 +0000 32.2 +++ b/xen/arch/ia64/ivt.S Thu May 12 13:07:32 2005 +0000 32.3 @@ -778,10 +778,22 @@ ENTRY(break_fault) 32.4 mov r17=cr.iim 32.5 mov r31=pr 32.6 ;; 32.7 + movl r18=XSI_PSR_IC 32.8 + ;; 32.9 + ld8 r19=[r18] 32.10 + ;; 32.11 cmp.eq p7,p0=r0,r17 // is this a psuedo-cover? 32.12 - // FIXME: may also need to check slot==2? 32.13 (p7) br.sptk.many dispatch_privop_fault 32.14 + ;; 32.15 + cmp.ne p7,p0=r0,r19 32.16 +(p7) br.sptk.many dispatch_break_fault 32.17 + // If we get to here, we have a hyperprivop 32.18 + // For now, hyperprivops are handled through the break mechanism 32.19 + // Later, they will be fast hand-coded assembly with psr.ic off 32.20 + // which means no calls, no use of r1-r15 and no memory accesses 32.21 + // except to pinned addresses! 32.22 br.sptk.many dispatch_break_fault 32.23 + ;; 32.24 #endif 32.25 mov r16=IA64_KR(CURRENT) // r16 = current task; 12 cycle read lat. 32.26 mov r17=cr.iim
33.1 --- a/xen/arch/ia64/mm_init.c Tue May 10 13:56:23 2005 +0000 33.2 +++ b/xen/arch/ia64/mm_init.c Thu May 12 13:07:32 2005 +0000 33.3 @@ -227,7 +227,7 @@ ia64_set_rbs_bot (void) 33.4 33.5 if (stack_size > MAX_USER_STACK_SIZE) 33.6 stack_size = MAX_USER_STACK_SIZE; 33.7 - current->thread.rbs_bot = STACK_TOP - stack_size; 33.8 + current->arch._thread.rbs_bot = STACK_TOP - stack_size; 33.9 } 33.10 33.11 /* 33.12 @@ -255,7 +255,7 @@ printf("ia64_init_addr_space: called, no 33.13 if (vma) { 33.14 memset(vma, 0, sizeof(*vma)); 33.15 vma->vm_mm = current->mm; 33.16 - vma->vm_start = current->thread.rbs_bot & PAGE_MASK; 33.17 + vma->vm_start = current->arch._thread.rbs_bot & PAGE_MASK; 33.18 vma->vm_end = vma->vm_start + PAGE_SIZE; 33.19 vma->vm_page_prot = protection_map[VM_DATA_DEFAULT_FLAGS & 0x7]; 33.20 vma->vm_flags = VM_READ|VM_WRITE|VM_MAYREAD|VM_MAYWRITE|VM_GROWSUP;
34.1 --- a/xen/arch/ia64/patch/linux-2.6.11/unaligned.c Tue May 10 13:56:23 2005 +0000 34.2 +++ b/xen/arch/ia64/patch/linux-2.6.11/unaligned.c Thu May 12 13:07:32 2005 +0000 34.3 @@ -1,5 +1,5 @@ 34.4 --- ../../linux-2.6.11/arch/ia64/kernel/unaligned.c 2005-03-02 00:38:25.000000000 -0700 34.5 -+++ arch/ia64/unaligned.c 2005-04-28 15:40:13.000000000 -0600 34.6 ++++ arch/ia64/unaligned.c 2005-05-10 15:46:09.000000000 -0600 34.7 @@ -437,7 +437,11 @@ 34.8 } 34.9 34.10 @@ -12,7 +12,31 @@ 34.11 setreg (unsigned long regnum, unsigned long val, int nat, struct pt_regs *regs) 34.12 { 34.13 struct switch_stack *sw = (struct switch_stack *) regs - 1; 34.14 -@@ -611,7 +615,11 @@ 34.15 +@@ -522,7 +526,11 @@ 34.16 + */ 34.17 + if (regnum >= IA64_FIRST_ROTATING_FR) { 34.18 + ia64_sync_fph(current); 34.19 ++#ifdef XEN 34.20 ++ current->arch._thread.fph[fph_index(regs, regnum)] = *fpval; 34.21 ++#else 34.22 + current->thread.fph[fph_index(regs, regnum)] = *fpval; 34.23 ++#endif 34.24 + } else { 34.25 + /* 34.26 + * pt_regs or switch_stack ? 34.27 +@@ -581,7 +589,11 @@ 34.28 + */ 34.29 + if (regnum >= IA64_FIRST_ROTATING_FR) { 34.30 + ia64_flush_fph(current); 34.31 ++#ifdef XEN 34.32 ++ *fpval = current->arch._thread.fph[fph_index(regs, regnum)]; 34.33 ++#else 34.34 + *fpval = current->thread.fph[fph_index(regs, regnum)]; 34.35 ++#endif 34.36 + } else { 34.37 + /* 34.38 + * f0 = 0.0, f1= 1.0. Those registers are constant and are thus 34.39 +@@ -611,7 +623,11 @@ 34.40 } 34.41 34.42 34.43 @@ -24,7 +48,7 @@ 34.44 getreg (unsigned long regnum, unsigned long *val, int *nat, struct pt_regs *regs) 34.45 { 34.46 struct switch_stack *sw = (struct switch_stack *) regs - 1; 34.47 -@@ -1294,6 +1302,9 @@ 34.48 +@@ -1294,6 +1310,9 @@ 34.49 void 34.50 ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) 34.51 { 34.52 @@ -34,7 +58,7 @@ 34.53 struct ia64_psr *ipsr = ia64_psr(regs); 34.54 mm_segment_t old_fs = get_fs(); 34.55 unsigned long bundle[2]; 34.56 -@@ -1502,4 +1513,5 @@ 34.57 +@@ -1502,4 +1521,5 @@ 34.58 si.si_imm = 0; 34.59 force_sig_info(SIGBUS, &si, current); 34.60 goto done;
35.1 --- a/xen/arch/ia64/privop.c Tue May 10 13:56:23 2005 +0000 35.2 +++ b/xen/arch/ia64/privop.c Thu May 12 13:07:32 2005 +0000 35.3 @@ -205,7 +205,8 @@ IA64FAULT priv_itc_d(VCPU *vcpu, INST64 35.4 return(IA64_ILLOP_FAULT); 35.5 if ((fault = vcpu_get_ifa(vcpu,&ifa)) != IA64_NO_FAULT) 35.6 return(IA64_ILLOP_FAULT); 35.7 - pte = vcpu_get_gr(vcpu,inst.M41.r2); 35.8 + if (!inst.inst) pte = vcpu_get_tmp(vcpu,0); 35.9 + else pte = vcpu_get_gr(vcpu,inst.M41.r2); 35.10 35.11 return (vcpu_itc_d(vcpu,pte,itir,ifa)); 35.12 } 35.13 @@ -219,7 +220,8 @@ IA64FAULT priv_itc_i(VCPU *vcpu, INST64 35.14 return(IA64_ILLOP_FAULT); 35.15 if ((fault = vcpu_get_ifa(vcpu,&ifa)) != IA64_NO_FAULT) 35.16 return(IA64_ILLOP_FAULT); 35.17 - pte = vcpu_get_gr(vcpu,inst.M41.r2); 35.18 + if (!inst.inst) pte = vcpu_get_tmp(vcpu,0); 35.19 + else pte = vcpu_get_gr(vcpu,inst.M41.r2); 35.20 35.21 return (vcpu_itc_i(vcpu,pte,itir,ifa)); 35.22 } 35.23 @@ -417,10 +419,17 @@ IA64FAULT priv_mov_from_pmc(VCPU *vcpu, 35.24 UINT64 val; 35.25 IA64FAULT fault; 35.26 35.27 - fault = vcpu_get_pmc(vcpu,vcpu_get_gr(vcpu,inst.M43.r3),&val); 35.28 - if (fault == IA64_NO_FAULT) 35.29 - return vcpu_set_gr(vcpu, inst.M43.r1, val); 35.30 - else return fault; 35.31 + if (inst.M43.r1 > 63) { // privified mov from pmd 35.32 + fault = vcpu_get_pmd(vcpu,vcpu_get_gr(vcpu,inst.M43.r3),&val); 35.33 + if (fault == IA64_NO_FAULT) 35.34 + return vcpu_set_gr(vcpu, inst.M43.r1-64, val); 35.35 + } 35.36 + else { 35.37 + fault = vcpu_get_pmc(vcpu,vcpu_get_gr(vcpu,inst.M43.r3),&val); 35.38 + if (fault == IA64_NO_FAULT) 35.39 + return vcpu_set_gr(vcpu, inst.M43.r1, val); 35.40 + } 35.41 + return fault; 35.42 } 35.43 35.44 unsigned long from_cr_cnt[128] = { 0 }; 35.45 @@ -531,6 +540,8 @@ struct { 35.46 unsigned long bsw0; 35.47 unsigned long bsw1; 35.48 unsigned long cover; 35.49 + unsigned long fc; 35.50 + unsigned long cpuid; 35.51 unsigned long Mpriv_cnt[64]; 35.52 } privcnt = { 0 }; 35.53 35.54 @@ -631,7 +642,11 @@ priv_handle_op(VCPU *vcpu, REGS *regs, i 35.55 else x6 = 0x1a; 35.56 } 35.57 } 35.58 - privcnt.Mpriv_cnt[x6]++; 35.59 + if (x6 == 52 && inst.M28.r3 > 63) 35.60 + privcnt.fc++; 35.61 + else if (x6 == 16 && inst.M43.r3 > 63) 35.62 + privcnt.cpuid++; 35.63 + else privcnt.Mpriv_cnt[x6]++; 35.64 return (*pfunc)(vcpu,inst); 35.65 break; 35.66 case B: 35.67 @@ -682,7 +697,7 @@ priv_handle_op(VCPU *vcpu, REGS *regs, i 35.68 //printf("We who are about do die salute you\n"); 35.69 printf("handle_op: can't handle privop at 0x%lx (op=0x%016lx) slot %d (type=%d)\n", 35.70 iip, (UINT64)inst.inst, slot, slot_type); 35.71 - //printf("vtop(0x%lx)==0x%lx\r\n", iip, tr_vtop(iip)); 35.72 + //printf("vtop(0x%lx)==0x%lx\n", iip, tr_vtop(iip)); 35.73 //thread_mozambique("privop fault\n"); 35.74 return (IA64_ILLOP_FAULT); 35.75 } 35.76 @@ -745,6 +760,64 @@ priv_emulate(VCPU *vcpu, REGS *regs, UIN 35.77 } 35.78 35.79 35.80 +// FIXME: Move these to include/public/arch-ia64? 35.81 +#define HYPERPRIVOP_RFI 0x1 35.82 +#define HYPERPRIVOP_RSM_DT 0x2 35.83 +#define HYPERPRIVOP_SSM_DT 0x3 35.84 +#define HYPERPRIVOP_COVER 0x4 35.85 +#define HYPERPRIVOP_ITC_D 0x5 35.86 +#define HYPERPRIVOP_ITC_I 0x6 35.87 +#define HYPERPRIVOP_MAX 0x6 35.88 + 35.89 +char *hyperpriv_str[HYPERPRIVOP_MAX+1] = { 35.90 + 0, "rfi", "rsm.dt", "ssm.dt", "cover", "itc.d", "itc.i", 35.91 + 0 35.92 +}; 35.93 + 35.94 +unsigned long hyperpriv_cnt[HYPERPRIVOP_MAX+1] = { 0 }; 35.95 + 35.96 +/* hyperprivops are generally executed in assembly (with physical psr.ic off) 35.97 + * so this code is primarily used for debugging them */ 35.98 +int 35.99 +ia64_hyperprivop(unsigned long iim, REGS *regs) 35.100 +{ 35.101 + struct exec_domain *ed = (struct domain *) current; 35.102 + INST64 inst; 35.103 + UINT64 val; 35.104 + 35.105 +// FIXME: Add instrumentation for these 35.106 +// FIXME: Handle faults appropriately for these 35.107 + if (!iim || iim > HYPERPRIVOP_MAX) { 35.108 + printf("bad hyperprivop; ignored\n"); 35.109 + return 1; 35.110 + } 35.111 + hyperpriv_cnt[iim]++; 35.112 + switch(iim) { 35.113 + case HYPERPRIVOP_RFI: 35.114 + (void)vcpu_rfi(ed); 35.115 + return 0; // don't update iip 35.116 + case HYPERPRIVOP_RSM_DT: 35.117 + (void)vcpu_reset_psr_dt(ed); 35.118 + return 1; 35.119 + case HYPERPRIVOP_SSM_DT: 35.120 + (void)vcpu_set_psr_dt(ed); 35.121 + return 1; 35.122 + case HYPERPRIVOP_COVER: 35.123 + (void)vcpu_cover(ed); 35.124 + return 1; 35.125 + case HYPERPRIVOP_ITC_D: 35.126 + inst.inst = 0; 35.127 + (void)priv_itc_d(ed,inst); 35.128 + return 1; 35.129 + case HYPERPRIVOP_ITC_I: 35.130 + inst.inst = 0; 35.131 + (void)priv_itc_i(ed,inst); 35.132 + return 1; 35.133 + } 35.134 + return 0; 35.135 +} 35.136 + 35.137 + 35.138 /************************************************************************** 35.139 Privileged operation instrumentation routines 35.140 **************************************************************************/ 35.141 @@ -798,55 +871,61 @@ int dump_privop_counts(char *buf) 35.142 sum += privcnt.rfi; sum += privcnt.bsw0; 35.143 sum += privcnt.bsw1; sum += privcnt.cover; 35.144 for (i=0; i < 64; i++) sum += privcnt.Mpriv_cnt[i]; 35.145 - s += sprintf(s,"Privop statistics: (Total privops: %ld)\r\n",sum); 35.146 + s += sprintf(s,"Privop statistics: (Total privops: %ld)\n",sum); 35.147 if (privcnt.mov_to_ar_imm) 35.148 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.mov_to_ar_imm, 35.149 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.mov_to_ar_imm, 35.150 "mov_to_ar_imm", (privcnt.mov_to_ar_imm*100L)/sum); 35.151 if (privcnt.mov_to_ar_reg) 35.152 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.mov_to_ar_reg, 35.153 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.mov_to_ar_reg, 35.154 "mov_to_ar_reg", (privcnt.mov_to_ar_reg*100L)/sum); 35.155 if (privcnt.mov_from_ar) 35.156 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.mov_from_ar, 35.157 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.mov_from_ar, 35.158 "privified-mov_from_ar", (privcnt.mov_from_ar*100L)/sum); 35.159 if (privcnt.ssm) 35.160 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.ssm, 35.161 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.ssm, 35.162 "ssm", (privcnt.ssm*100L)/sum); 35.163 if (privcnt.rsm) 35.164 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.rsm, 35.165 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.rsm, 35.166 "rsm", (privcnt.rsm*100L)/sum); 35.167 if (privcnt.rfi) 35.168 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.rfi, 35.169 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.rfi, 35.170 "rfi", (privcnt.rfi*100L)/sum); 35.171 if (privcnt.bsw0) 35.172 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.bsw0, 35.173 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.bsw0, 35.174 "bsw0", (privcnt.bsw0*100L)/sum); 35.175 if (privcnt.bsw1) 35.176 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.bsw1, 35.177 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.bsw1, 35.178 "bsw1", (privcnt.bsw1*100L)/sum); 35.179 if (privcnt.cover) 35.180 - s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.cover, 35.181 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.cover, 35.182 "cover", (privcnt.cover*100L)/sum); 35.183 + if (privcnt.fc) 35.184 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.fc, 35.185 + "privified-fc", (privcnt.fc*100L)/sum); 35.186 + if (privcnt.cpuid) 35.187 + s += sprintf(s,"%10d %s [%d%%]\n", privcnt.cpuid, 35.188 + "privified-getcpuid", (privcnt.cpuid*100L)/sum); 35.189 for (i=0; i < 64; i++) if (privcnt.Mpriv_cnt[i]) { 35.190 - if (!Mpriv_str[i]) s += sprintf(s,"PRIVSTRING NULL!!\r\n"); 35.191 - else s += sprintf(s,"%10d %s [%d%%]\r\n", privcnt.Mpriv_cnt[i], 35.192 + if (!Mpriv_str[i]) s += sprintf(s,"PRIVSTRING NULL!!\n"); 35.193 + else s += sprintf(s,"%10d %s [%d%%]\n", privcnt.Mpriv_cnt[i], 35.194 Mpriv_str[i], (privcnt.Mpriv_cnt[i]*100L)/sum); 35.195 if (i == 0x24) { // mov from CR 35.196 s += sprintf(s," ["); 35.197 for (j=0; j < 128; j++) if (from_cr_cnt[j]) { 35.198 if (!cr_str[j]) 35.199 - s += sprintf(s,"PRIVSTRING NULL!!\r\n"); 35.200 + s += sprintf(s,"PRIVSTRING NULL!!\n"); 35.201 s += sprintf(s,"%s(%d),",cr_str[j],from_cr_cnt[j]); 35.202 } 35.203 - s += sprintf(s,"]\r\n"); 35.204 + s += sprintf(s,"]\n"); 35.205 } 35.206 else if (i == 0x2c) { // mov to CR 35.207 s += sprintf(s," ["); 35.208 for (j=0; j < 128; j++) if (to_cr_cnt[j]) { 35.209 if (!cr_str[j]) 35.210 - s += sprintf(s,"PRIVSTRING NULL!!\r\n"); 35.211 + s += sprintf(s,"PRIVSTRING NULL!!\n"); 35.212 s += sprintf(s,"%s(%d),",cr_str[j],to_cr_cnt[j]); 35.213 } 35.214 - s += sprintf(s,"]\r\n"); 35.215 + s += sprintf(s,"]\n"); 35.216 } 35.217 } 35.218 return s - buf; 35.219 @@ -864,19 +943,88 @@ int zero_privop_counts(char *buf) 35.220 privcnt.ssm = 0; privcnt.rsm = 0; 35.221 privcnt.rfi = 0; privcnt.bsw0 = 0; 35.222 privcnt.bsw1 = 0; privcnt.cover = 0; 35.223 + privcnt.fc = 0; privcnt.cpuid = 0; 35.224 for (i=0; i < 64; i++) privcnt.Mpriv_cnt[i] = 0; 35.225 for (j=0; j < 128; j++) from_cr_cnt[j] = 0; 35.226 for (j=0; j < 128; j++) to_cr_cnt[j] = 0; 35.227 - s += sprintf(s,"All privop statistics zeroed\r\n"); 35.228 + s += sprintf(s,"All privop statistics zeroed\n"); 35.229 return s - buf; 35.230 } 35.231 35.232 +#ifdef PRIVOP_ADDR_COUNT 35.233 + 35.234 +extern struct privop_addr_count privop_addr_counter[]; 35.235 + 35.236 +void privop_count_addr(unsigned long iip, int inst) 35.237 +{ 35.238 + struct privop_addr_count *v = &privop_addr_counter[inst]; 35.239 + int i; 35.240 + 35.241 + for (i = 0; i < PRIVOP_COUNT_NADDRS; i++) { 35.242 + if (!v->addr[i]) { v->addr[i] = iip; v->count[i]++; return; } 35.243 + else if (v->addr[i] == iip) { v->count[i]++; return; } 35.244 + } 35.245 + v->overflow++;; 35.246 +} 35.247 + 35.248 +int dump_privop_addrs(char *buf) 35.249 +{ 35.250 + int i,j; 35.251 + char *s = buf; 35.252 + s += sprintf(s,"Privop addresses:\n"); 35.253 + for (i = 0; i < PRIVOP_COUNT_NINSTS; i++) { 35.254 + struct privop_addr_count *v = &privop_addr_counter[i]; 35.255 + s += sprintf(s,"%s:\n",v->instname); 35.256 + for (j = 0; j < PRIVOP_COUNT_NADDRS; j++) { 35.257 + if (!v->addr[j]) break; 35.258 + s += sprintf(s," @%p #%ld\n",v->addr[j],v->count[j]); 35.259 + } 35.260 + if (v->overflow) 35.261 + s += sprintf(s," other #%ld\n",v->overflow); 35.262 + } 35.263 + return s - buf; 35.264 +} 35.265 + 35.266 +void zero_privop_addrs(void) 35.267 +{ 35.268 + int i,j; 35.269 + for (i = 0; i < PRIVOP_COUNT_NINSTS; i++) { 35.270 + struct privop_addr_count *v = &privop_addr_counter[i]; 35.271 + for (j = 0; j < PRIVOP_COUNT_NADDRS; j++) 35.272 + v->addr[j] = v->count[j] = 0; 35.273 + v->overflow = 0; 35.274 + } 35.275 +} 35.276 +#endif 35.277 + 35.278 +int dump_hyperprivop_counts(char *buf) 35.279 +{ 35.280 + int i; 35.281 + char *s = buf; 35.282 + s += sprintf(s,"Hyperprivops:\n"); 35.283 + for (i = 1; i <= HYPERPRIVOP_MAX; i++) 35.284 + if (hyperpriv_cnt[i]) 35.285 + s += sprintf(s,"%10d %s\n", 35.286 + hyperpriv_cnt[i], hyperpriv_str[i]); 35.287 + return s - buf; 35.288 +} 35.289 + 35.290 +void zero_hyperprivop_counts(void) 35.291 +{ 35.292 + int i; 35.293 + for (i = 0; i <= HYPERPRIVOP_MAX; i++) hyperpriv_cnt[i] = 0; 35.294 +} 35.295 + 35.296 #define TMPBUFLEN 8*1024 35.297 int dump_privop_counts_to_user(char __user *ubuf, int len) 35.298 { 35.299 char buf[TMPBUFLEN]; 35.300 int n = dump_privop_counts(buf); 35.301 35.302 + n += dump_hyperprivop_counts(buf + n); 35.303 +#ifdef PRIVOP_ADDR_COUNT 35.304 + n += dump_privop_addrs(buf + n); 35.305 +#endif 35.306 if (len < TMPBUFLEN) return -1; 35.307 if (__copy_to_user(ubuf,buf,n)) return -1; 35.308 return n; 35.309 @@ -887,6 +1035,10 @@ int zero_privop_counts_to_user(char __us 35.310 char buf[TMPBUFLEN]; 35.311 int n = zero_privop_counts(buf); 35.312 35.313 + zero_hyperprivop_counts(); 35.314 +#ifdef PRIVOP_ADDR_COUNT 35.315 + zero_privop_addrs(); 35.316 +#endif 35.317 if (len < TMPBUFLEN) return -1; 35.318 if (__copy_to_user(ubuf,buf,n)) return -1; 35.319 return n;
36.1 --- a/xen/arch/ia64/process.c Tue May 10 13:56:23 2005 +0000 36.2 +++ b/xen/arch/ia64/process.c Thu May 12 13:07:32 2005 +0000 36.3 @@ -51,6 +51,7 @@ extern unsigned long dom0_start, dom0_si 36.4 IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | IA64_PSR_IA) 36.5 36.6 #define PSCB(x,y) x->vcpu_info->arch.y 36.7 +#define PSCBX(x,y) x->arch.y 36.8 36.9 extern unsigned long vcpu_verbose; 36.10 36.11 @@ -154,7 +155,7 @@ panic_domain(regs,"psr.ic off, deliverin 36.12 } 36.13 //printf("Delivering NESTED DATA TLB fault\n"); 36.14 vector = IA64_DATA_NESTED_TLB_VECTOR; 36.15 - regs->cr_iip = ((unsigned long) PSCB(ed,iva) + vector) & ~0xffUL; 36.16 + regs->cr_iip = ((unsigned long) PSCBX(ed,iva) + vector) & ~0xffUL; 36.17 regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; 36.18 // NOTE: nested trap must NOT pass PSCB address 36.19 //regs->r31 = (unsigned long) &PSCB(ed); 36.20 @@ -187,7 +188,7 @@ panic_domain(regs,"psr.ic off, deliverin 36.21 PSCB(ed,ifs) = 0; 36.22 PSCB(ed,incomplete_regframe) = 0; 36.23 36.24 - regs->cr_iip = ((unsigned long) PSCB(ed,iva) + vector) & ~0xffUL; 36.25 + regs->cr_iip = ((unsigned long) PSCBX(ed,iva) + vector) & ~0xffUL; 36.26 regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; 36.27 #ifdef CONFIG_SMP 36.28 #error "sharedinfo doesn't handle smp yet" 36.29 @@ -516,7 +517,7 @@ printf("ia64_fault, vector=0x%p, ifa=%p, 36.30 case 32: /* fp fault */ 36.31 case 33: /* fp trap */ 36.32 //result = handle_fpu_swa((vector == 32) ? 1 : 0, regs, isr); 36.33 - if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) { 36.34 + //if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) { 36.35 //siginfo.si_signo = SIGFPE; 36.36 //siginfo.si_errno = 0; 36.37 //siginfo.si_code = FPE_FLTINV; 36.38 @@ -525,7 +526,7 @@ printf("ia64_fault, vector=0x%p, ifa=%p, 36.39 //siginfo.si_isr = isr; 36.40 //siginfo.si_imm = 0; 36.41 //force_sig_info(SIGFPE, &siginfo, current); 36.42 - } 36.43 + //} 36.44 //return; 36.45 sprintf(buf, "FP fault/trap"); 36.46 break; 36.47 @@ -722,6 +723,10 @@ ia64_handle_break (unsigned long ifa, st 36.48 if (ia64_hypercall(regs)) 36.49 vcpu_increment_iip(current); 36.50 } 36.51 + else if (!PSCB(ed,interrupt_collection_enabled)) { 36.52 + if (ia64_hyperprivop(iim,regs)) 36.53 + vcpu_increment_iip(current); 36.54 + } 36.55 else reflect_interruption(ifa,isr,iim,regs,IA64_BREAK_VECTOR); 36.56 } 36.57
37.1 --- a/xen/arch/ia64/vcpu.c Tue May 10 13:56:23 2005 +0000 37.2 +++ b/xen/arch/ia64/vcpu.c Thu May 12 13:07:32 2005 +0000 37.3 @@ -1,6 +1,6 @@ 37.4 /* 37.5 * Virtualized CPU functions 37.6 - * 37.7 + * 37.8 * Copyright (C) 2004 Hewlett-Packard Co. 37.9 * Dan Magenheimer (dan.magenheimer@hp.com) 37.10 * 37.11 @@ -26,6 +26,7 @@ typedef union { 37.12 // this def for vcpu_regs won't work if kernel stack is present 37.13 #define vcpu_regs(vcpu) ((struct pt_regs *) vcpu->arch.regs) 37.14 #define PSCB(x,y) x->vcpu_info->arch.y 37.15 +#define PSCBX(x,y) x->arch.y 37.16 37.17 #define TRUE 1 37.18 #define FALSE 0 37.19 @@ -37,6 +38,17 @@ typedef union { 37.20 37.21 #define STATIC 37.22 37.23 +#ifdef PRIVOP_ADDR_COUNT 37.24 +struct privop_addr_count privop_addr_counter[PRIVOP_COUNT_NINSTS] = { 37.25 + { "rsm", { 0 }, { 0 }, 0 }, 37.26 + { "ssm", { 0 }, { 0 }, 0 } 37.27 +}; 37.28 +extern void privop_count_addr(unsigned long addr, int inst); 37.29 +#define PRIVOP_COUNT_ADDR(regs,inst) privop_count_addr(regs->cr_iip,inst) 37.30 +#else 37.31 +#define PRIVOP_COUNT_ADDR(x,y) do {} while (0) 37.32 +#endif 37.33 + 37.34 unsigned long vcpu_verbose = 0; 37.35 #define verbose(a...) do {if (vcpu_verbose) printf(a);} while(0) 37.36 37.37 @@ -77,30 +89,20 @@ vcpu_set_gr(VCPU *vcpu, unsigned reg, UI 37.38 IA64FAULT vcpu_set_ar(VCPU *vcpu, UINT64 reg, UINT64 val) 37.39 { 37.40 if (reg == 44) return (vcpu_set_itc(vcpu,val)); 37.41 - if (reg == 27) return (IA64_ILLOP_FAULT); 37.42 - if (reg > 7) return (IA64_ILLOP_FAULT); 37.43 - PSCB(vcpu,krs[reg]) = val; 37.44 -#if 0 37.45 -// for now, privify kr read's so all kr accesses are privileged 37.46 - switch (reg) { 37.47 - case 0: asm volatile ("mov ar.k0=%0" :: "r"(val)); break; 37.48 - case 1: asm volatile ("mov ar.k1=%0" :: "r"(val)); break; 37.49 - case 2: asm volatile ("mov ar.k2=%0" :: "r"(val)); break; 37.50 - case 3: asm volatile ("mov ar.k3=%0" :: "r"(val)); break; 37.51 - case 4: asm volatile ("mov ar.k4=%0" :: "r"(val)); break; 37.52 - case 5: asm volatile ("mov ar.k5=%0" :: "r"(val)); break; 37.53 - case 6: asm volatile ("mov ar.k6=%0" :: "r"(val)); break; 37.54 - case 7: asm volatile ("mov ar.k7=%0" :: "r"(val)); break; 37.55 - case 27: asm volatile ("mov ar.cflg=%0" :: "r"(val)); break; 37.56 - } 37.57 -#endif 37.58 + else if (reg == 27) return (IA64_ILLOP_FAULT); 37.59 + else if (reg == 24) 37.60 + printf("warning: setting ar.eflg is a no-op; no IA-32 support\n"); 37.61 + else if (reg > 7) return (IA64_ILLOP_FAULT); 37.62 + else PSCB(vcpu,krs[reg]) = val; 37.63 return IA64_NO_FAULT; 37.64 } 37.65 37.66 IA64FAULT vcpu_get_ar(VCPU *vcpu, UINT64 reg, UINT64 *val) 37.67 { 37.68 - if (reg > 7) return (IA64_ILLOP_FAULT); 37.69 - *val = PSCB(vcpu,krs[reg]); 37.70 + if (reg == 24) 37.71 + printf("warning: getting ar.eflg is a no-op; no IA-32 support\n"); 37.72 + else if (reg > 7) return (IA64_ILLOP_FAULT); 37.73 + else *val = PSCB(vcpu,krs[reg]); 37.74 return IA64_NO_FAULT; 37.75 } 37.76 37.77 @@ -119,11 +121,18 @@ void vcpu_set_metaphysical_mode(VCPU *vc 37.78 } 37.79 } 37.80 37.81 +IA64FAULT vcpu_reset_psr_dt(VCPU *vcpu) 37.82 +{ 37.83 + vcpu_set_metaphysical_mode(vcpu,TRUE); 37.84 + return IA64_NO_FAULT; 37.85 +} 37.86 + 37.87 IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, UINT64 imm24) 37.88 { 37.89 struct ia64_psr psr, imm, *ipsr; 37.90 REGS *regs = vcpu_regs(vcpu); 37.91 37.92 + PRIVOP_COUNT_ADDR(regs,_RSM); 37.93 // TODO: All of these bits need to be virtualized 37.94 // TODO: Only allowed for current vcpu 37.95 __asm__ __volatile ("mov %0=psr;;" : "=r"(psr) :: "memory"); 37.96 @@ -152,12 +161,19 @@ IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, 37.97 extern UINT64 vcpu_check_pending_interrupts(VCPU *vcpu); 37.98 #define SPURIOUS_VECTOR 0xf 37.99 37.100 +IA64FAULT vcpu_set_psr_dt(VCPU *vcpu) 37.101 +{ 37.102 + vcpu_set_metaphysical_mode(vcpu,FALSE); 37.103 + return IA64_NO_FAULT; 37.104 +} 37.105 + 37.106 IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UINT64 imm24) 37.107 { 37.108 struct ia64_psr psr, imm, *ipsr; 37.109 REGS *regs = vcpu_regs(vcpu); 37.110 UINT64 mask, enabling_interrupts = 0; 37.111 37.112 + PRIVOP_COUNT_ADDR(regs,_SSM); 37.113 // TODO: All of these bits need to be virtualized 37.114 __asm__ __volatile ("mov %0=psr;;" : "=r"(psr) :: "memory"); 37.115 imm = *(struct ia64_psr *)&imm24; 37.116 @@ -274,9 +290,9 @@ BOOLEAN vcpu_get_psr_i(VCPU *vcpu) 37.117 37.118 UINT64 vcpu_get_ipsr_int_state(VCPU *vcpu,UINT64 prevpsr) 37.119 { 37.120 - UINT64 dcr = PSCB(vcpu,dcr); 37.121 + UINT64 dcr = PSCBX(vcpu,dcr); 37.122 PSR psr = {0}; 37.123 - 37.124 + 37.125 //printf("*** vcpu_get_ipsr_int_state (0x%016lx)...",prevpsr); 37.126 psr.i64 = prevpsr; 37.127 psr.ia64_psr.be = 0; if (dcr & IA64_DCR_BE) psr.ia64_psr.be = 1; 37.128 @@ -302,13 +318,13 @@ extern unsigned long privop_trace; 37.129 //verbose("vcpu_get_dcr: called @%p\n",PSCB(vcpu,iip)); 37.130 // Reads of cr.dcr on Xen always have the sign bit set, so 37.131 // a domain can differentiate whether it is running on SP or not 37.132 - *pval = PSCB(vcpu,dcr) | 0x8000000000000000L; 37.133 + *pval = PSCBX(vcpu,dcr) | 0x8000000000000000L; 37.134 return (IA64_NO_FAULT); 37.135 } 37.136 37.137 IA64FAULT vcpu_get_iva(VCPU *vcpu, UINT64 *pval) 37.138 { 37.139 - *pval = PSCB(vcpu,iva) & ~0x7fffL; 37.140 + *pval = PSCBX(vcpu,iva) & ~0x7fffL; 37.141 return (IA64_NO_FAULT); 37.142 } 37.143 37.144 @@ -408,13 +424,13 @@ extern unsigned long privop_trace; 37.145 // a domain can differentiate whether it is running on SP or not 37.146 // Thus, writes of DCR should ignore the sign bit 37.147 //verbose("vcpu_set_dcr: called\n"); 37.148 - PSCB(vcpu,dcr) = val & ~0x8000000000000000L; 37.149 + PSCBX(vcpu,dcr) = val & ~0x8000000000000000L; 37.150 return (IA64_NO_FAULT); 37.151 } 37.152 37.153 IA64FAULT vcpu_set_iva(VCPU *vcpu, UINT64 val) 37.154 { 37.155 - PSCB(vcpu,iva) = val & ~0x7fffL; 37.156 + PSCBX(vcpu,iva) = val & ~0x7fffL; 37.157 return (IA64_NO_FAULT); 37.158 } 37.159 37.160 @@ -508,16 +524,16 @@ void vcpu_pend_interrupt(VCPU *vcpu, UIN 37.161 return; 37.162 } 37.163 if (!test_bit(vector,PSCB(vcpu,delivery_mask))) return; 37.164 - if (test_bit(vector,PSCB(vcpu,irr))) { 37.165 + if (test_bit(vector,PSCBX(vcpu,irr))) { 37.166 //printf("vcpu_pend_interrupt: overrun\n"); 37.167 } 37.168 - set_bit(vector,PSCB(vcpu,irr)); 37.169 + set_bit(vector,PSCBX(vcpu,irr)); 37.170 PSCB(vcpu,pending_interruption) = 1; 37.171 } 37.172 37.173 void early_tick(VCPU *vcpu) 37.174 { 37.175 - UINT64 *p = &PSCB(vcpu,irr[3]); 37.176 + UINT64 *p = &PSCBX(vcpu,irr[3]); 37.177 printf("vcpu_check_pending: about to deliver early tick\n"); 37.178 printf("&irr[0]=%p, irr[0]=0x%lx\n",p,*p); 37.179 } 37.180 @@ -535,9 +551,9 @@ UINT64 vcpu_check_pending_interrupts(VCP 37.181 { 37.182 UINT64 *p, *q, *r, bits, bitnum, mask, i, vector; 37.183 37.184 - p = &PSCB(vcpu,irr[3]); 37.185 + p = &PSCBX(vcpu,irr[3]); 37.186 q = &PSCB(vcpu,delivery_mask[3]); 37.187 - r = &PSCB(vcpu,insvc[3]); 37.188 + r = &PSCBX(vcpu,insvc[3]); 37.189 for (i = 3; ; p--, q--, r--, i--) { 37.190 bits = *p & *q; 37.191 if (bits) break; // got a potential interrupt 37.192 @@ -577,9 +593,9 @@ UINT64 vcpu_check_pending_interrupts(VCP 37.193 #if 0 37.194 if (vector == (PSCB(vcpu,itv) & 0xff)) { 37.195 UINT64 now = ia64_get_itc(); 37.196 - UINT64 itm = PSCB(vcpu,domain_itm); 37.197 + UINT64 itm = PSCBX(vcpu,domain_itm); 37.198 if (now < itm) early_tick(vcpu); 37.199 - 37.200 + 37.201 } 37.202 #endif 37.203 return vector; 37.204 @@ -639,13 +655,13 @@ IA64FAULT vcpu_get_ivr(VCPU *vcpu, UINT6 37.205 i = vector >> 6; 37.206 mask = 1L << (vector & 0x3f); 37.207 //printf("ZZZZZZ vcpu_get_ivr: setting insvc mask for vector %ld\n",vector); 37.208 - PSCB(vcpu,insvc[i]) |= mask; 37.209 - PSCB(vcpu,irr[i]) &= ~mask; 37.210 + PSCBX(vcpu,insvc[i]) |= mask; 37.211 + PSCBX(vcpu,irr[i]) &= ~mask; 37.212 //PSCB(vcpu,pending_interruption)--; 37.213 *pval = vector; 37.214 // if delivering a timer interrupt, remember domain_itm 37.215 if (vector == (PSCB(vcpu,itv) & 0xff)) { 37.216 - PSCB(vcpu,domain_itm_last) = PSCB(vcpu,domain_itm); 37.217 + PSCBX(vcpu,domain_itm_last) = PSCBX(vcpu,domain_itm); 37.218 } 37.219 return IA64_NO_FAULT; 37.220 } 37.221 @@ -760,7 +776,7 @@ IA64FAULT vcpu_set_eoi(VCPU *vcpu, UINT6 37.222 UINT64 *p, bits, vec, bitnum; 37.223 int i; 37.224 37.225 - p = &PSCB(vcpu,insvc[3]); 37.226 + p = &PSCBX(vcpu,insvc[3]); 37.227 for (i = 3; (i >= 0) && !(bits = *p); i--, p--); 37.228 if (i < 0) { 37.229 printf("Trying to EOI interrupt when none are in-service.\r\n"); 37.230 @@ -811,8 +827,8 @@ extern unsigned long privop_trace; 37.231 if (val & 0xef00) return (IA64_ILLOP_FAULT); 37.232 PSCB(vcpu,itv) = val; 37.233 if (val & 0x10000) { 37.234 -printf("**** vcpu_set_itv(%d): vitm=%lx, setting to 0\n",val,PSCB(vcpu,domain_itm)); 37.235 - PSCB(vcpu,domain_itm) = 0; 37.236 +printf("**** vcpu_set_itv(%d): vitm=%lx, setting to 0\n",val,PSCBX(vcpu,domain_itm)); 37.237 + PSCBX(vcpu,domain_itm) = 0; 37.238 } 37.239 else vcpu_enable_timer(vcpu,1000000L); 37.240 return (IA64_NO_FAULT); 37.241 @@ -833,6 +849,20 @@ IA64FAULT vcpu_set_cmcv(VCPU *vcpu, UINT 37.242 } 37.243 37.244 /************************************************************************** 37.245 + VCPU temporary register access routines 37.246 +**************************************************************************/ 37.247 +UINT64 vcpu_get_tmp(VCPU *vcpu, UINT64 index) 37.248 +{ 37.249 + if (index > 7) return 0; 37.250 + return PSCB(vcpu,tmp[index]); 37.251 +} 37.252 + 37.253 +void vcpu_set_tmp(VCPU *vcpu, UINT64 index, UINT64 val) 37.254 +{ 37.255 + if (index <= 7) PSCB(vcpu,tmp[index]) = val; 37.256 +} 37.257 + 37.258 +/************************************************************************** 37.259 Interval timer routines 37.260 **************************************************************************/ 37.261 37.262 @@ -845,14 +875,14 @@ BOOLEAN vcpu_timer_disabled(VCPU *vcpu) 37.263 BOOLEAN vcpu_timer_inservice(VCPU *vcpu) 37.264 { 37.265 UINT64 itv = PSCB(vcpu,itv); 37.266 - return (test_bit(itv, PSCB(vcpu,insvc))); 37.267 + return (test_bit(itv, PSCBX(vcpu,insvc))); 37.268 } 37.269 37.270 BOOLEAN vcpu_timer_expired(VCPU *vcpu) 37.271 { 37.272 - unsigned long domain_itm = PSCB(vcpu,domain_itm); 37.273 + unsigned long domain_itm = PSCBX(vcpu,domain_itm); 37.274 unsigned long now = ia64_get_itc(); 37.275 - 37.276 + 37.277 if (!domain_itm) return FALSE; 37.278 if (now < domain_itm) return FALSE; 37.279 if (vcpu_timer_disabled(vcpu)) return FALSE; 37.280 @@ -877,36 +907,36 @@ void vcpu_safe_set_itm(unsigned long val 37.281 37.282 void vcpu_set_next_timer(VCPU *vcpu) 37.283 { 37.284 - UINT64 d = PSCB(vcpu,domain_itm); 37.285 - //UINT64 s = PSCB(vcpu,xen_itm); 37.286 + UINT64 d = PSCBX(vcpu,domain_itm); 37.287 + //UINT64 s = PSCBX(vcpu,xen_itm); 37.288 UINT64 s = local_cpu_data->itm_next; 37.289 UINT64 now = ia64_get_itc(); 37.290 - //UINT64 interval = PSCB(vcpu,xen_timer_interval); 37.291 + //UINT64 interval = PSCBX(vcpu,xen_timer_interval); 37.292 37.293 /* gloss over the wraparound problem for now... we know it exists 37.294 * but it doesn't matter right now */ 37.295 37.296 #if 0 37.297 /* ensure at least next SP tick is in the future */ 37.298 - if (!interval) PSCB(vcpu,xen_itm) = now + 37.299 + if (!interval) PSCBX(vcpu,xen_itm) = now + 37.300 #if 0 37.301 (running_on_sim() ? SIM_DEFAULT_CLOCK_RATE : 37.302 - DEFAULT_CLOCK_RATE); 37.303 + DEFAULT_CLOCK_RATE); 37.304 #else 37.305 3000000; 37.306 //printf("vcpu_set_next_timer: HACK!\n"); 37.307 #endif 37.308 #if 0 37.309 - if (PSCB(vcpu,xen_itm) < now) 37.310 - while (PSCB(vcpu,xen_itm) < now + (interval>>1)) 37.311 - PSCB(vcpu,xen_itm) += interval; 37.312 + if (PSCBX(vcpu,xen_itm) < now) 37.313 + while (PSCBX(vcpu,xen_itm) < now + (interval>>1)) 37.314 + PSCBX(vcpu,xen_itm) += interval; 37.315 #endif 37.316 #endif 37.317 37.318 if (is_idle_task(vcpu->domain)) { 37.319 printf("****** vcpu_set_next_timer called during idle!!\n"); 37.320 } 37.321 - //s = PSCB(vcpu,xen_itm); 37.322 + //s = PSCBX(vcpu,xen_itm); 37.323 if (d && (d > now) && (d < s)) { 37.324 vcpu_safe_set_itm(d); 37.325 //using_domain_as_itm++; 37.326 @@ -920,10 +950,10 @@ void vcpu_set_next_timer(VCPU *vcpu) 37.327 // parameter is a time interval specified in cycles 37.328 void vcpu_enable_timer(VCPU *vcpu,UINT64 cycles) 37.329 { 37.330 - PSCB(vcpu,xen_timer_interval) = cycles; 37.331 + PSCBX(vcpu,xen_timer_interval) = cycles; 37.332 vcpu_set_next_timer(vcpu); 37.333 printf("vcpu_enable_timer(%d): interval set to %d cycles\n", 37.334 - PSCB(vcpu,xen_timer_interval)); 37.335 + PSCBX(vcpu,xen_timer_interval)); 37.336 __set_bit(PSCB(vcpu,itv), PSCB(vcpu,delivery_mask)); 37.337 } 37.338 37.339 @@ -933,30 +963,30 @@ IA64FAULT vcpu_set_itm(VCPU *vcpu, UINT6 37.340 37.341 //if (val < now) val = now + 1000; 37.342 //printf("*** vcpu_set_itm: called with %lx\n",val); 37.343 - PSCB(vcpu,domain_itm) = val; 37.344 + PSCBX(vcpu,domain_itm) = val; 37.345 vcpu_set_next_timer(vcpu); 37.346 return (IA64_NO_FAULT); 37.347 } 37.348 37.349 IA64FAULT vcpu_set_itc(VCPU *vcpu, UINT64 val) 37.350 { 37.351 - 37.352 + 37.353 UINT64 oldnow = ia64_get_itc(); 37.354 - UINT64 olditm = PSCB(vcpu,domain_itm); 37.355 + UINT64 olditm = PSCBX(vcpu,domain_itm); 37.356 unsigned long d = olditm - oldnow; 37.357 unsigned long x = local_cpu_data->itm_next - oldnow; 37.358 - 37.359 + 37.360 UINT64 newnow = val, min_delta; 37.361 37.362 local_irq_disable(); 37.363 if (olditm) { 37.364 printf("**** vcpu_set_itc(%lx): vitm changed to %lx\n",val,newnow+d); 37.365 - PSCB(vcpu,domain_itm) = newnow + d; 37.366 + PSCBX(vcpu,domain_itm) = newnow + d; 37.367 } 37.368 local_cpu_data->itm_next = newnow + x; 37.369 - d = PSCB(vcpu,domain_itm); 37.370 + d = PSCBX(vcpu,domain_itm); 37.371 x = local_cpu_data->itm_next; 37.372 - 37.373 + 37.374 ia64_set_itc(newnow); 37.375 if (d && (d > newnow) && (d < x)) { 37.376 vcpu_safe_set_itm(d); 37.377 @@ -991,7 +1021,7 @@ void vcpu_pend_timer(VCPU *vcpu) 37.378 37.379 if (vcpu_timer_disabled(vcpu)) return; 37.380 //if (vcpu_timer_inservice(vcpu)) return; 37.381 - if (PSCB(vcpu,domain_itm_last) == PSCB(vcpu,domain_itm)) { 37.382 + if (PSCBX(vcpu,domain_itm_last) == PSCBX(vcpu,domain_itm)) { 37.383 // already delivered an interrupt for this so 37.384 // don't deliver another 37.385 return; 37.386 @@ -999,7 +1029,7 @@ void vcpu_pend_timer(VCPU *vcpu) 37.387 #if 0 37.388 // attempt to flag "timer tick before its due" source 37.389 { 37.390 - UINT64 itm = PSCB(vcpu,domain_itm); 37.391 + UINT64 itm = PSCBX(vcpu,domain_itm); 37.392 UINT64 now = ia64_get_itc(); 37.393 if (now < itm) printf("******* vcpu_pend_timer: pending before due!\n"); 37.394 } 37.395 @@ -1011,7 +1041,7 @@ void vcpu_pend_timer(VCPU *vcpu) 37.396 UINT64 vcpu_timer_pending_early(VCPU *vcpu) 37.397 { 37.398 UINT64 now = ia64_get_itc(); 37.399 - UINT64 itm = PSCB(vcpu,domain_itm); 37.400 + UINT64 itm = PSCBX(vcpu,domain_itm); 37.401 37.402 if (vcpu_timer_disabled(vcpu)) return 0; 37.403 if (!itm) return 0; 37.404 @@ -1023,7 +1053,7 @@ void vcpu_poke_timer(VCPU *vcpu) 37.405 { 37.406 UINT64 itv = PSCB(vcpu,itv) & 0xff; 37.407 UINT64 now = ia64_get_itc(); 37.408 - UINT64 itm = PSCB(vcpu,domain_itm); 37.409 + UINT64 itm = PSCBX(vcpu,domain_itm); 37.410 UINT64 irr; 37.411 37.412 if (vcpu_timer_disabled(vcpu)) return; 37.413 @@ -1033,8 +1063,8 @@ void vcpu_poke_timer(VCPU *vcpu) 37.414 while(1); 37.415 } 37.416 // using 0xef instead of itv so can get real irr 37.417 - if (now > itm && !test_bit(0xefL, PSCB(vcpu,insvc))) { 37.418 - if (!test_bit(0xefL,PSCB(vcpu,irr))) { 37.419 + if (now > itm && !test_bit(0xefL, PSCBX(vcpu,insvc))) { 37.420 + if (!test_bit(0xefL,PSCBX(vcpu,irr))) { 37.421 irr = ia64_getreg(_IA64_REG_CR_IRR3); 37.422 if (irr & (1L<<(0xef-0xc0))) return; 37.423 if (now-itm>0x800000) 37.424 @@ -1091,7 +1121,7 @@ printf("SI_CR_IIP/IPSR/IFS_OFFSET CHANGE 37.425 printf("SI_CR_IIP=0x%x,IPSR=0x%x,IFS_OFFSET=0x%x\n",SI_OFS(iip),SI_OFS(ipsr),SI_OFS(ifs)); 37.426 while(1); 37.427 } 37.428 - // TODO: validate PSCB(vcpu,iip) 37.429 + // TODO: validate PSCB(vcpu,iip) 37.430 // TODO: PSCB(vcpu,ipsr) = psr; 37.431 PSCB(vcpu,ipsr) = psr.i64; 37.432 // now set up the trampoline 37.433 @@ -1338,7 +1368,6 @@ IA64FAULT vcpu_get_cpuid(VCPU *vcpu, UIN 37.434 37.435 unsigned long vcpu_get_rr_ve(VCPU *vcpu,UINT64 vadr) 37.436 { 37.437 - 37.438 ia64_rr rr; 37.439 37.440 rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; 37.441 @@ -1348,7 +1377,6 @@ unsigned long vcpu_get_rr_ve(VCPU *vcpu, 37.442 37.443 unsigned long vcpu_get_rr_ps(VCPU *vcpu,UINT64 vadr) 37.444 { 37.445 - 37.446 ia64_rr rr; 37.447 37.448 rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; 37.449 @@ -1358,7 +1386,6 @@ unsigned long vcpu_get_rr_ps(VCPU *vcpu, 37.450 37.451 unsigned long vcpu_get_rr_rid(VCPU *vcpu,UINT64 vadr) 37.452 { 37.453 - 37.454 ia64_rr rr; 37.455 37.456 rr.rrval = PSCB(vcpu,rrs)[vadr>>61]; 37.457 @@ -1445,8 +1472,8 @@ TR_ENTRY *vcpu_match_tr_entry(VCPU *vcpu 37.458 for (i = 0; i < count; i++, trp++) { 37.459 if (!trp->p) continue; 37.460 if (physicalize_rid(vcpu,trp->rid) != rid) continue; 37.461 - if (ifa < trp->vadr) continue; 37.462 - if (ifa >= (trp->vadr + (1L << trp->ps)) - 1) continue; 37.463 + if (ifa < trp->vadr) continue; 37.464 + if (ifa >= (trp->vadr + (1L << trp->ps)) - 1) continue; 37.465 //if (trp->key && !match_pkr(vcpu,trp->key)) continue; 37.466 return trp; 37.467 } 37.468 @@ -1457,9 +1484,9 @@ TR_ENTRY *match_tr(VCPU *vcpu, unsigned 37.469 { 37.470 TR_ENTRY *trp; 37.471 37.472 - trp = vcpu_match_tr_entry(vcpu,vcpu->vcpu_info->arch.dtrs,ifa,NDTRS); 37.473 + trp = vcpu_match_tr_entry(vcpu,vcpu->arch.dtrs,ifa,NDTRS); 37.474 if (trp) return trp; 37.475 - trp = vcpu_match_tr_entry(vcpu,vcpu->vcpu_info->arch.itrs,ifa,NITRS); 37.476 + trp = vcpu_match_tr_entry(vcpu,vcpu->arch.itrs,ifa,NITRS); 37.477 if (trp) return trp; 37.478 return 0; 37.479 } 37.480 @@ -1470,7 +1497,8 @@ IA64FAULT vcpu_itr_d(VCPU *vcpu, UINT64 37.481 TR_ENTRY *trp; 37.482 37.483 if (slot >= NDTRS) return IA64_RSVDREG_FAULT; 37.484 - trp = &PSCB(vcpu,dtrs[slot]); 37.485 + trp = &PSCBX(vcpu,dtrs[slot]); 37.486 +//printf("***** itr.d: setting slot %d: ifa=%p\n",slot,ifa); 37.487 vcpu_set_tr_entry(trp,pte,itir,ifa); 37.488 return IA64_NO_FAULT; 37.489 } 37.490 @@ -1481,7 +1509,8 @@ IA64FAULT vcpu_itr_i(VCPU *vcpu, UINT64 37.491 TR_ENTRY *trp; 37.492 37.493 if (slot >= NITRS) return IA64_RSVDREG_FAULT; 37.494 - trp = &PSCB(vcpu,itrs[slot]); 37.495 + trp = &PSCBX(vcpu,itrs[slot]); 37.496 +//printf("***** itr.i: setting slot %d: ifa=%p\n",slot,ifa); 37.497 vcpu_set_tr_entry(trp,pte,itir,ifa); 37.498 return IA64_NO_FAULT; 37.499 } 37.500 @@ -1524,12 +1553,12 @@ void vcpu_itc_no_srlz(VCPU *vcpu, UINT64 37.501 #endif 37.502 if (IorD & 0x4) return; // don't place in 1-entry TLB 37.503 if (IorD & 0x1) { 37.504 - vcpu_set_tr_entry(&PSCB(vcpu,itlb),pte,ps<<2,vaddr); 37.505 - PSCB(vcpu,itlb_pte) = mp_pte; 37.506 + vcpu_set_tr_entry(&PSCBX(vcpu,itlb),pte,ps<<2,vaddr); 37.507 + PSCBX(vcpu,itlb_pte) = mp_pte; 37.508 } 37.509 if (IorD & 0x2) { 37.510 - vcpu_set_tr_entry(&PSCB(vcpu,dtlb),pte,ps<<2,vaddr); 37.511 - PSCB(vcpu,dtlb_pte) = mp_pte; 37.512 + vcpu_set_tr_entry(&PSCBX(vcpu,dtlb),pte,ps<<2,vaddr); 37.513 + PSCBX(vcpu,dtlb_pte) = mp_pte; 37.514 } 37.515 } 37.516 37.517 @@ -1539,9 +1568,9 @@ unsigned long match_dtlb(VCPU *vcpu, uns 37.518 { 37.519 TR_ENTRY *trp; 37.520 37.521 - if (trp = vcpu_match_tr_entry(vcpu,&vcpu->vcpu_info->arch.dtlb,ifa,1)) { 37.522 + if (trp = vcpu_match_tr_entry(vcpu,&vcpu->arch.dtlb,ifa,1)) { 37.523 if (ps) *ps = trp->ps; 37.524 - if (mp_pte) *mp_pte = vcpu->vcpu_info->arch.dtlb_pte; 37.525 + if (mp_pte) *mp_pte = vcpu->arch.dtlb_pte; 37.526 return (trp->page_flags); 37.527 } 37.528 return 0UL; 37.529 @@ -1645,8 +1674,8 @@ IA64FAULT vcpu_ptc_e(VCPU *vcpu, UINT64 37.530 #endif 37.531 local_flush_tlb_all(); 37.532 // just invalidate the "whole" tlb 37.533 - vcpu_purge_tr_entry(&PSCB(vcpu,dtlb)); 37.534 - vcpu_purge_tr_entry(&PSCB(vcpu,itlb)); 37.535 + vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb)); 37.536 + vcpu_purge_tr_entry(&PSCBX(vcpu,itlb)); 37.537 return IA64_NO_FAULT; 37.538 } 37.539 37.540 @@ -1666,8 +1695,8 @@ IA64FAULT vcpu_ptc_ga(VCPU *vcpu,UINT64 37.541 vhpt_flush_address(vadr,addr_range); 37.542 #endif 37.543 ia64_global_tlb_purge(vadr,vadr+addr_range,PAGE_SHIFT); 37.544 - vcpu_purge_tr_entry(&PSCB(vcpu,dtlb)); 37.545 - vcpu_purge_tr_entry(&PSCB(vcpu,itlb)); 37.546 + vcpu_purge_tr_entry(&PSCBX(vcpu,dtlb)); 37.547 + vcpu_purge_tr_entry(&PSCBX(vcpu,itlb)); 37.548 return IA64_NO_FAULT; 37.549 } 37.550
38.1 --- a/xen/arch/ia64/xenmisc.c Tue May 10 13:56:23 2005 +0000 38.2 +++ b/xen/arch/ia64/xenmisc.c Thu May 12 13:07:32 2005 +0000 38.3 @@ -79,6 +79,14 @@ void raise_actimer_softirq(void) 38.4 raise_softirq(AC_TIMER_SOFTIRQ); 38.5 } 38.6 38.7 +unsigned long __hypercall_create_continuation( 38.8 + unsigned int op, unsigned int nr_args, ...) 38.9 +{ 38.10 + printf("__hypercall_create_continuation: not implemented!!!\n"); 38.11 +} 38.12 + 38.13 +/////////////////////////////// 38.14 + 38.15 /////////////////////////////// 38.16 // from arch/x86/apic.c 38.17 /////////////////////////////// 38.18 @@ -139,7 +147,7 @@ void free_page_type(struct pfn_info *pag 38.19 void show_registers(struct pt_regs *regs) 38.20 { 38.21 printf("*** ADD REGISTER DUMP HERE FOR DEBUGGING\n"); 38.22 -} 38.23 +} 38.24 38.25 /////////////////////////////// 38.26 // from common/keyhandler.c
39.1 --- a/xen/arch/ia64/xensetup.c Tue May 10 13:56:23 2005 +0000 39.2 +++ b/xen/arch/ia64/xensetup.c Thu May 12 13:07:32 2005 +0000 39.3 @@ -52,15 +52,10 @@ unsigned char opt_com1[30] = "", opt_com 39.4 unsigned int opt_dom0_mem = 16000; 39.5 /* opt_noht: If true, Hyperthreading is ignored. */ 39.6 int opt_noht=0; 39.7 -/* opt_noacpi: If true, ACPI tables are not parsed. */ 39.8 -int opt_noacpi=0; 39.9 /* opt_nosmp: If true, secondary processors are ignored. */ 39.10 int opt_nosmp=0; 39.11 /* opt_noreboot: If true, machine will need manual reset on error. */ 39.12 int opt_noreboot=0; 39.13 -/* opt_ignorebiostables: If true, ACPI and MP tables are ignored. */ 39.14 -/* NB. This flag implies 'nosmp' and 'noacpi'. */ 39.15 -int opt_ignorebiostables=0; 39.16 /* opt_watchdog: If true, run a watchdog NMI on each processor. */ 39.17 int opt_watchdog=0; 39.18 /* opt_pdb: Name of serial port for Xen pervasive debugger (and enable pdb) */
40.1 --- a/xen/arch/ia64/xentime.c Tue May 10 13:56:23 2005 +0000 40.2 +++ b/xen/arch/ia64/xentime.c Thu May 12 13:07:32 2005 +0000 40.3 @@ -84,6 +84,17 @@ xen_timer_interrupt (int irq, void *dev_ 40.4 { 40.5 unsigned long new_itm; 40.6 40.7 +#define HEARTBEAT_FREQ 16 // period in seconds 40.8 +#ifdef HEARTBEAT_FREQ 40.9 + static long count = 0; 40.10 + if (!(++count & ((HEARTBEAT_FREQ*1024)-1))) { 40.11 + printf("Heartbeat... iip=%p,psr.i=%d,pend=%d\n", 40.12 + regs->cr_iip, 40.13 + current->vcpu_info->arch.interrupt_delivery_enabled, 40.14 + current->vcpu_info->arch.pending_interruption); 40.15 + count = 0; 40.16 + } 40.17 +#endif 40.18 #ifndef XEN 40.19 if (unlikely(cpu_is_offline(smp_processor_id()))) { 40.20 return IRQ_HANDLED;
41.1 --- a/xen/arch/x86/acpi/boot.c Tue May 10 13:56:23 2005 +0000 41.2 +++ b/xen/arch/x86/acpi/boot.c Thu May 12 13:07:32 2005 +0000 41.3 @@ -36,23 +36,12 @@ 41.4 #include <asm/io.h> 41.5 #include <asm/irq.h> 41.6 #include <asm/mpspec.h> 41.7 - 41.8 -int sbf_port; /* XXX XEN */ 41.9 - 41.10 -#ifdef CONFIG_X86_64 41.11 - 41.12 -static inline void acpi_madt_oem_check(char *oem_id, char *oem_table_id) { } 41.13 -extern void __init clustered_apic_check(void); 41.14 -static inline int ioapic_setup_disabled(void) { return 0; } 41.15 - 41.16 -#else /* X86 */ 41.17 - 41.18 -#ifdef CONFIG_X86_LOCAL_APIC 41.19 #include <mach_apic.h> 41.20 #include <mach_mpparse.h> 41.21 -#endif /* CONFIG_X86_LOCAL_APIC */ 41.22 41.23 -#endif /* X86 */ 41.24 +int sbf_port; 41.25 +#define end_pfn_map max_page 41.26 +#define CONFIG_ACPI_PCI 41.27 41.28 #define BAD_MADT_ENTRY(entry, end) ( \ 41.29 (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ 41.30 @@ -109,7 +98,7 @@ char *__acpi_map_table(unsigned long phy 41.31 if (!phys_addr || !size) 41.32 return NULL; 41.33 41.34 - if (phys_addr < (max_page << PAGE_SHIFT)) 41.35 + if (phys_addr < (end_pfn_map << PAGE_SHIFT)) 41.36 return __va(phys_addr); 41.37 41.38 return NULL; 41.39 @@ -279,7 +268,7 @@ acpi_parse_lapic_nmi ( 41.40 41.41 #endif /*CONFIG_X86_LOCAL_APIC*/ 41.42 41.43 -#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_ACPI_INTERPRETER) 41.44 +#if defined(CONFIG_X86_IO_APIC) /*&& defined(CONFIG_ACPI_INTERPRETER)*/ 41.45 41.46 static int __init 41.47 acpi_parse_ioapic ( 41.48 @@ -302,6 +291,7 @@ acpi_parse_ioapic ( 41.49 return 0; 41.50 } 41.51 41.52 +#ifdef CONFIG_ACPI_INTERPRETER 41.53 /* 41.54 * Parse Interrupt Source Override for the ACPI SCI 41.55 */ 41.56 @@ -335,6 +325,7 @@ acpi_sci_ioapic_setup(u32 gsi, u16 polar 41.57 acpi_sci_override_gsi = gsi; 41.58 return; 41.59 } 41.60 +#endif 41.61 41.62 static int __init 41.63 acpi_parse_int_src_ovr ( 41.64 @@ -349,11 +340,13 @@ acpi_parse_int_src_ovr ( 41.65 41.66 acpi_table_print_madt_entry(header); 41.67 41.68 +#ifdef CONFIG_ACPI_INTERPRETER 41.69 if (intsrc->bus_irq == acpi_fadt.sci_int) { 41.70 acpi_sci_ioapic_setup(intsrc->global_irq, 41.71 intsrc->flags.polarity, intsrc->flags.trigger); 41.72 return 0; 41.73 } 41.74 +#endif 41.75 41.76 if (acpi_skip_timer_override && 41.77 intsrc->bus_irq == 0 && intsrc->global_irq == 2) { 41.78 @@ -698,7 +691,7 @@ acpi_parse_madt_lapic_entries(void) 41.79 } 41.80 #endif /* CONFIG_X86_LOCAL_APIC */ 41.81 41.82 -#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_ACPI_INTERPRETER) 41.83 +#if defined(CONFIG_X86_IO_APIC) /*&& defined(CONFIG_ACPI_INTERPRETER)*/ 41.84 /* 41.85 * Parse IOAPIC related entries in MADT 41.86 * returns 0 on success, < 0 on error 41.87 @@ -744,12 +737,14 @@ acpi_parse_madt_ioapic_entries(void) 41.88 return count; 41.89 } 41.90 41.91 +#ifdef CONFIG_ACPI_INTERPRETER 41.92 /* 41.93 * If BIOS did not supply an INT_SRC_OVR for the SCI 41.94 * pretend we got one so we can set the SCI flags. 41.95 */ 41.96 if (!acpi_sci_override_gsi) 41.97 acpi_sci_ioapic_setup(acpi_fadt.sci_int, 0, 0); 41.98 +#endif 41.99 41.100 /* Fill in identity legacy mapings where no override */ 41.101 mp_config_acpi_legacy_irqs(); 41.102 @@ -856,10 +851,6 @@ acpi_boot_table_init(void) 41.103 return error; 41.104 } 41.105 41.106 -#if 0 /*def __i386__*/ 41.107 - check_acpi_pci(); 41.108 -#endif 41.109 - 41.110 acpi_table_parse(ACPI_BOOT, acpi_parse_sbf); 41.111 41.112 /*
42.1 --- a/xen/arch/x86/cdb.c Tue May 10 13:56:23 2005 +0000 42.2 +++ b/xen/arch/x86/cdb.c Thu May 12 13:07:32 2005 +0000 42.3 @@ -12,7 +12,9 @@ 42.4 #include <asm/irq.h> 42.5 #include <xen/spinlock.h> 42.6 #include <asm/debugger.h> 42.7 -#include <asm/init.h> 42.8 +#include <xen/init.h> 42.9 +#include <xen/smp.h> 42.10 +#include <asm/apic.h> 42.11 42.12 /* Printk isn't particularly safe just after we've trapped to the 42.13 debugger. so avoid it. */
43.1 --- a/xen/arch/x86/domain.c Tue May 10 13:56:23 2005 +0000 43.2 +++ b/xen/arch/x86/domain.c Thu May 12 13:07:32 2005 +0000 43.3 @@ -253,6 +253,7 @@ void arch_do_createdomain(struct exec_do 43.4 d->shared_info = (void *)alloc_xenheap_page(); 43.5 memset(d->shared_info, 0, PAGE_SIZE); 43.6 ed->vcpu_info = &d->shared_info->vcpu_data[ed->id]; 43.7 + ed->cpumap = CPUMAP_RUNANYWHERE; 43.8 SHARE_PFN_WITH_DOMAIN(virt_to_page(d->shared_info), d); 43.9 machine_to_phys_mapping[virt_to_phys(d->shared_info) >> 43.10 PAGE_SHIFT] = INVALID_M2P_ENTRY; 43.11 @@ -408,13 +409,15 @@ int arch_set_info_guest( 43.12 43.13 memcpy(&ed->arch.guest_context, c, sizeof(*c)); 43.14 43.15 - /* IOPL privileges are virtualised. */ 43.16 - ed->arch.iopl = (ed->arch.guest_context.user_regs.eflags >> 12) & 3; 43.17 - ed->arch.guest_context.user_regs.eflags &= ~EF_IOPL; 43.18 + if ( !(c->flags & VGCF_VMX_GUEST) ) 43.19 + { 43.20 + /* IOPL privileges are virtualised. */ 43.21 + ed->arch.iopl = (ed->arch.guest_context.user_regs.eflags >> 12) & 3; 43.22 + ed->arch.guest_context.user_regs.eflags &= ~EF_IOPL; 43.23 43.24 - /* Clear IOPL for unprivileged domains. */ 43.25 - if ( !IS_PRIV(d) ) 43.26 - ed->arch.guest_context.user_regs.eflags &= 0xffffcfff; 43.27 + /* Ensure real hardware interrupts are enabled. */ 43.28 + ed->arch.guest_context.user_regs.eflags |= EF_IE; 43.29 + } 43.30 43.31 if ( test_bit(EDF_DONEINIT, &ed->flags) ) 43.32 return 0;
44.1 --- a/xen/arch/x86/domain_build.c Tue May 10 13:56:23 2005 +0000 44.2 +++ b/xen/arch/x86/domain_build.c Thu May 12 13:07:32 2005 +0000 44.3 @@ -7,6 +7,7 @@ 44.4 #include <xen/config.h> 44.5 #include <xen/init.h> 44.6 #include <xen/lib.h> 44.7 +#include <xen/ctype.h> 44.8 #include <xen/sched.h> 44.9 #include <xen/smp.h> 44.10 #include <xen/delay.h> 44.11 @@ -21,9 +22,18 @@ 44.12 #include <asm/i387.h> 44.13 #include <asm/shadow.h> 44.14 44.15 -/* opt_dom0_mem: Kilobytes of memory allocated to domain 0. */ 44.16 -static unsigned int opt_dom0_mem = 0; 44.17 -integer_unit_param("dom0_mem", opt_dom0_mem); 44.18 +/* opt_dom0_mem: memory allocated to domain 0. */ 44.19 +static unsigned int opt_dom0_mem; 44.20 +static void parse_dom0_mem(char *s) 44.21 +{ 44.22 + unsigned long long bytes = memparse(s); 44.23 + /* If no unit is specified we default to kB units, not bytes. */ 44.24 + if ( isdigit(s[strlen(s)-1]) ) 44.25 + opt_dom0_mem = (unsigned int)bytes; 44.26 + else 44.27 + opt_dom0_mem = (unsigned int)(bytes >> 10); 44.28 +} 44.29 +custom_param("dom0_mem", parse_dom0_mem); 44.30 44.31 static unsigned int opt_dom0_shadow = 0; 44.32 boolean_param("dom0_shadow", opt_dom0_shadow);
45.1 --- a/xen/arch/x86/e820.c Tue May 10 13:56:23 2005 +0000 45.2 +++ b/xen/arch/x86/e820.c Thu May 12 13:07:32 2005 +0000 45.3 @@ -3,6 +3,11 @@ 45.4 #include <xen/lib.h> 45.5 #include <asm/e820.h> 45.6 45.7 +/* opt_mem: Limit of physical RAM. Any RAM beyond this point is ignored. */ 45.8 +unsigned long long opt_mem; 45.9 +static void parse_mem(char *s) { opt_mem = memparse(s); } 45.10 +custom_param("mem", parse_mem); 45.11 + 45.12 struct e820map e820; 45.13 45.14 static void __init add_memory_region(unsigned long long start, 45.15 @@ -341,6 +346,31 @@ static void __init clip_4gb(void) 45.16 #define clip_4gb() ((void)0) 45.17 #endif 45.18 45.19 +static void __init clip_mem(void) 45.20 +{ 45.21 + int i; 45.22 + 45.23 + if ( !opt_mem ) 45.24 + return; 45.25 + 45.26 + for ( i = 0; i < e820.nr_map; i++ ) 45.27 + { 45.28 + if ( (e820.map[i].addr + e820.map[i].size) <= opt_mem ) 45.29 + continue; 45.30 + printk("Truncating memory map to %lukB\n", 45.31 + (unsigned long)(opt_mem >> 10)); 45.32 + if ( e820.map[i].addr >= opt_mem ) 45.33 + { 45.34 + e820.nr_map = i; 45.35 + } 45.36 + else 45.37 + { 45.38 + e820.map[i].size = opt_mem - e820.map[i].addr; 45.39 + e820.nr_map = i + 1; 45.40 + } 45.41 + } 45.42 +} 45.43 + 45.44 static void __init machine_specific_memory_setup( 45.45 struct e820entry *raw, int raw_nr) 45.46 { 45.47 @@ -348,6 +378,7 @@ static void __init machine_specific_memo 45.48 sanitize_e820_map(raw, &nr); 45.49 (void)copy_e820_map(raw, nr); 45.50 clip_4gb(); 45.51 + clip_mem(); 45.52 } 45.53 45.54 unsigned long __init init_e820(struct e820entry *raw, int raw_nr)
46.1 --- a/xen/arch/x86/io_apic.c Tue May 10 13:56:23 2005 +0000 46.2 +++ b/xen/arch/x86/io_apic.c Thu May 12 13:07:32 2005 +0000 46.3 @@ -145,16 +145,16 @@ static void __unmask_IO_APIC_irq (unsign 46.4 __modify_IO_APIC_irq(irq, 0, 0x00010000); 46.5 } 46.6 46.7 -/* mask = 1, trigger = 0 */ 46.8 -static void __mask_and_edge_IO_APIC_irq (unsigned int irq) 46.9 +/* trigger = 0 */ 46.10 +static void __edge_IO_APIC_irq (unsigned int irq) 46.11 { 46.12 - __modify_IO_APIC_irq(irq, 0x00010000, 0x00008000); 46.13 + __modify_IO_APIC_irq(irq, 0, 0x00008000); 46.14 } 46.15 46.16 -/* mask = 0, trigger = 1 */ 46.17 -static void __unmask_and_level_IO_APIC_irq (unsigned int irq) 46.18 +/* trigger = 1 */ 46.19 +static void __level_IO_APIC_irq (unsigned int irq) 46.20 { 46.21 - __modify_IO_APIC_irq(irq, 0x00008000, 0x00010000); 46.22 + __modify_IO_APIC_irq(irq, 0x00008000, 0); 46.23 } 46.24 46.25 static void mask_IO_APIC_irq (unsigned int irq) 46.26 @@ -1637,12 +1637,14 @@ static unsigned int startup_level_ioapic 46.27 return 0; /* don't check for pending */ 46.28 } 46.29 46.30 -static void end_level_ioapic_irq (unsigned int irq) 46.31 +static void mask_and_ack_level_ioapic_irq (unsigned int irq) 46.32 { 46.33 unsigned long v; 46.34 int i; 46.35 46.36 move_irq(irq); 46.37 + 46.38 + mask_IO_APIC_irq(irq); 46.39 /* 46.40 * It appears there is an erratum which affects at least version 0x11 46.41 * of I/O APIC (that's the 82093AA and cores integrated into various 46.42 @@ -1671,12 +1673,17 @@ static void end_level_ioapic_irq (unsign 46.43 if (!(v & (1 << (i & 0x1f)))) { 46.44 atomic_inc(&irq_mis_count); 46.45 spin_lock(&ioapic_lock); 46.46 - __mask_and_edge_IO_APIC_irq(irq); 46.47 - __unmask_and_level_IO_APIC_irq(irq); 46.48 + __edge_IO_APIC_irq(irq); 46.49 + __level_IO_APIC_irq(irq); 46.50 spin_unlock(&ioapic_lock); 46.51 } 46.52 } 46.53 46.54 +static void end_level_ioapic_irq (unsigned int irq) 46.55 +{ 46.56 + unmask_IO_APIC_irq(irq); 46.57 +} 46.58 + 46.59 #ifdef CONFIG_PCI_MSI 46.60 static unsigned int startup_edge_ioapic_vector(unsigned int vector) 46.61 { 46.62 @@ -1699,6 +1706,13 @@ static unsigned int startup_level_ioapic 46.63 return startup_level_ioapic_irq (irq); 46.64 } 46.65 46.66 +static void mask_and_ack_level_ioapic_vector (unsigned int vector) 46.67 +{ 46.68 + int irq = vector_to_irq(vector); 46.69 + 46.70 + mask_and_ack_level_ioapic_irq(irq); 46.71 +} 46.72 + 46.73 static void end_level_ioapic_vector (unsigned int vector) 46.74 { 46.75 int irq = vector_to_irq(vector);
48.1 --- a/xen/arch/x86/mtrr/main.c Tue May 10 13:56:23 2005 +0000 48.2 +++ b/xen/arch/x86/mtrr/main.c Thu May 12 13:07:32 2005 +0000 48.3 @@ -33,7 +33,6 @@ 48.4 48.5 #include <xen/config.h> 48.6 #include <xen/init.h> 48.7 -#include <xen/pci.h> 48.8 #include <xen/slab.h> 48.9 #include <xen/smp.h> 48.10 #include <xen/spinlock.h> 48.11 @@ -97,25 +96,6 @@ void set_mtrr_ops(struct mtrr_ops * ops) 48.12 /* Returns non-zero if we have the write-combining memory type */ 48.13 static int have_wrcomb(void) 48.14 { 48.15 - struct pci_dev *dev; 48.16 - 48.17 - if ((dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, NULL)) != NULL) { 48.18 - /* ServerWorks LE chipsets have problems with write-combining 48.19 - Don't allow it and leave room for other chipsets to be tagged */ 48.20 - if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS && 48.21 - dev->device == PCI_DEVICE_ID_SERVERWORKS_LE) { 48.22 - printk(KERN_INFO "mtrr: Serverworks LE detected. Write-combining disabled.\n"); 48.23 - return 0; 48.24 - } 48.25 - /* Intel 450NX errata # 23. Non ascending cachline evictions to 48.26 - write combining memory may resulting in data corruption */ 48.27 - if (dev->vendor == PCI_VENDOR_ID_INTEL && 48.28 - dev->device == PCI_DEVICE_ID_INTEL_82451NX) 48.29 - { 48.30 - printk(KERN_INFO "mtrr: Intel 450NX MMC detected. Write-combining disabled.\n"); 48.31 - return 0; 48.32 - } 48.33 - } 48.34 return (mtrr_if->have_wrcomb ? mtrr_if->have_wrcomb() : 0); 48.35 } 48.36
50.1 --- a/xen/arch/x86/setup.c Tue May 10 13:56:23 2005 +0000 50.2 +++ b/xen/arch/x86/setup.c Thu May 12 13:07:32 2005 +0000 50.3 @@ -3,7 +3,6 @@ 50.4 #include <xen/init.h> 50.5 #include <xen/lib.h> 50.6 #include <xen/sched.h> 50.7 -#include <xen/pci.h> 50.8 #include <xen/serial.h> 50.9 #include <xen/softirq.h> 50.10 #include <xen/acpi.h> 50.11 @@ -34,23 +33,29 @@ integer_param("xenheap_megabytes", opt_x 50.12 int opt_noht = 0; 50.13 boolean_param("noht", opt_noht); 50.14 50.15 -/* opt_noacpi: If true, ACPI tables are not parsed. */ 50.16 -static int opt_noacpi = 0; 50.17 -boolean_param("noacpi", opt_noacpi); 50.18 - 50.19 -/* opt_nosmp: If true, secondary processors are ignored. */ 50.20 -static int opt_nosmp = 0; 50.21 -boolean_param("nosmp", opt_nosmp); 50.22 - 50.23 -/* opt_ignorebiostables: If true, ACPI and MP tables are ignored. */ 50.24 -/* NB. This flag implies 'nosmp' and 'noacpi'. */ 50.25 -static int opt_ignorebiostables = 0; 50.26 -boolean_param("ignorebiostables", opt_ignorebiostables); 50.27 - 50.28 /* opt_watchdog: If true, run a watchdog NMI on each processor. */ 50.29 static int opt_watchdog = 0; 50.30 boolean_param("watchdog", opt_watchdog); 50.31 50.32 +/* **** Linux config option: propagated to domain0. */ 50.33 +/* "acpi=off": Sisables both ACPI table parsing and interpreter. */ 50.34 +/* "acpi=force": Override the disable blacklist. */ 50.35 +/* "acpi=strict": Disables out-of-spec workarounds. */ 50.36 +/* "acpi=ht": Limit ACPI just to boot-time to enable HT. */ 50.37 +/* "acpi=noirq": Disables ACPI interrupt routing. */ 50.38 +static void parse_acpi_param(char *s); 50.39 +custom_param("acpi", parse_acpi_param); 50.40 + 50.41 +/* **** Linux config option: propagated to domain0. */ 50.42 +/* acpi_skip_timer_override: Skip IRQ0 overrides. */ 50.43 +extern int acpi_skip_timer_override; 50.44 +boolean_param("acpi_skip_timer_override", acpi_skip_timer_override); 50.45 + 50.46 +/* **** Linux config option: propagated to domain0. */ 50.47 +/* noapic: Disable IOAPIC setup. */ 50.48 +extern int skip_ioapic_setup; 50.49 +boolean_param("noapic", skip_ioapic_setup); 50.50 + 50.51 int early_boot = 1; 50.52 50.53 unsigned long xenheap_phys_end; 50.54 @@ -63,7 +68,6 @@ extern void ac_timer_init(void); 50.55 extern void initialize_keytable(); 50.56 extern int do_timer_lists_from_pit; 50.57 50.58 -char ignore_irq13; /* set if exception 16 works */ 50.59 struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1 }; 50.60 50.61 #if defined(__x86_64__) 50.62 @@ -329,6 +333,41 @@ void __init cpu_init(void) 50.63 init_idle_task(); 50.64 } 50.65 50.66 +int acpi_force; 50.67 +char acpi_param[10] = ""; 50.68 +static void parse_acpi_param(char *s) 50.69 +{ 50.70 + /* Save the parameter so it can be propagated to domain0. */ 50.71 + strncpy(acpi_param, s, sizeof(acpi_param)); 50.72 + acpi_param[sizeof(acpi_param)-1] = '\0'; 50.73 + 50.74 + /* Interpret the parameter for use within Xen. */ 50.75 + if ( !strcmp(s, "off") ) 50.76 + { 50.77 + disable_acpi(); 50.78 + } 50.79 + else if ( !strcmp(s, "force") ) 50.80 + { 50.81 + acpi_force = 1; 50.82 + acpi_ht = 1; 50.83 + acpi_disabled = 0; 50.84 + } 50.85 + else if ( !strcmp(s, "strict") ) 50.86 + { 50.87 + acpi_strict = 1; 50.88 + } 50.89 + else if ( !strcmp(s, "ht") ) 50.90 + { 50.91 + if ( !acpi_force ) 50.92 + disable_acpi(); 50.93 + acpi_ht = 1; 50.94 + } 50.95 + else if ( !strcmp(s, "noirq") ) 50.96 + { 50.97 + acpi_noirq_set(); 50.98 + } 50.99 +} 50.100 + 50.101 static void __init do_initcalls(void) 50.102 { 50.103 initcall_t *call; 50.104 @@ -356,54 +395,36 @@ static void __init start_of_day(void) 50.105 identify_cpu(&boot_cpu_data); /* get CPU type info */ 50.106 if ( cpu_has_fxsr ) set_in_cr4(X86_CR4_OSFXSR); 50.107 if ( cpu_has_xmm ) set_in_cr4(X86_CR4_OSXMMEXCPT); 50.108 -#ifdef CONFIG_SMP 50.109 - if ( opt_ignorebiostables ) 50.110 - { 50.111 - opt_nosmp = 1; /* No SMP without configuration */ 50.112 - opt_noacpi = 1; /* ACPI will just confuse matters also */ 50.113 - } 50.114 - else 50.115 - { 50.116 - find_smp_config(); 50.117 - smp_alloc_memory(); /* trampoline which other CPUs jump at */ 50.118 - } 50.119 -#endif 50.120 - paging_init(); /* not much here now, but sets up fixmap */ 50.121 - if ( !opt_noacpi ) 50.122 - { 50.123 - acpi_boot_table_init(); 50.124 - acpi_boot_init(); 50.125 - } 50.126 -#ifdef CONFIG_SMP 50.127 + 50.128 + find_smp_config(); 50.129 + 50.130 + smp_alloc_memory(); 50.131 + 50.132 + paging_init(); 50.133 + 50.134 + acpi_boot_table_init(); 50.135 + acpi_boot_init(); 50.136 + 50.137 if ( smp_found_config ) 50.138 get_smp_config(); 50.139 -#endif 50.140 - init_apic_mappings(); /* make APICs addressable in our pagetables. */ 50.141 + 50.142 + init_apic_mappings(); 50.143 + 50.144 scheduler_init(); 50.145 - init_IRQ(); /* installs simple interrupt wrappers. Starts HZ clock. */ 50.146 + 50.147 + init_IRQ(); 50.148 + 50.149 trap_init(); 50.150 - time_init(); /* installs software handler for HZ clock. */ 50.151 + 50.152 + time_init(); 50.153 50.154 arch_init_memory(); 50.155 50.156 -#ifndef CONFIG_SMP 50.157 - APIC_init_uniprocessor(); 50.158 -#else 50.159 - if ( opt_nosmp ) 50.160 - APIC_init_uniprocessor(); 50.161 - else 50.162 - smp_boot_cpus(); 50.163 - /* 50.164 - * Does loads of stuff, including kicking the local 50.165 - * APIC, and the IO APIC after other CPUs are booted. 50.166 - * Each IRQ is preferably handled by IO-APIC, but 50.167 - * fall thru to 8259A if we have to (but slower). 50.168 - */ 50.169 -#endif 50.170 + smp_boot_cpus(); 50.171 50.172 __sti(); 50.173 50.174 - initialize_keytable(); /* call back handling for key codes */ 50.175 + initialize_keytable(); 50.176 50.177 serial_init_stage2(); 50.178 50.179 @@ -420,19 +441,14 @@ static void __init start_of_day(void) 50.180 50.181 check_nmi_watchdog(); 50.182 50.183 -#ifdef CONFIG_PCI 50.184 - pci_init(); 50.185 -#endif 50.186 do_initcalls(); 50.187 50.188 -#ifdef CONFIG_SMP 50.189 wait_init_idle = cpu_online_map; 50.190 clear_bit(smp_processor_id(), &wait_init_idle); 50.191 smp_threads_ready = 1; 50.192 smp_commence(); /* Tell other CPUs that state of the world is stable. */ 50.193 while ( wait_init_idle != 0 ) 50.194 cpu_relax(); 50.195 -#endif 50.196 50.197 watchdog_on = 1; 50.198 #ifdef __x86_64__ /* x86_32 uses low mappings when building DOM0. */ 50.199 @@ -573,13 +589,32 @@ void __init __start_xen(multiboot_info_t 50.200 50.201 set_bit(DF_PRIVILEGED, &dom0->flags); 50.202 50.203 - /* Grab the DOM0 command line. Skip past the image name. */ 50.204 + /* Grab the DOM0 command line. */ 50.205 cmdline = (char *)(mod[0].string ? __va(mod[0].string) : NULL); 50.206 if ( cmdline != NULL ) 50.207 { 50.208 + static char dom0_cmdline[256]; 50.209 + 50.210 + /* Skip past the image name. */ 50.211 while ( *cmdline == ' ' ) cmdline++; 50.212 if ( (cmdline = strchr(cmdline, ' ')) != NULL ) 50.213 while ( *cmdline == ' ' ) cmdline++; 50.214 + 50.215 + /* Copy the command line to a local buffer. */ 50.216 + strcpy(dom0_cmdline, cmdline); 50.217 + cmdline = dom0_cmdline; 50.218 + 50.219 + /* Append any extra parameters. */ 50.220 + if ( skip_ioapic_setup && !strstr(cmdline, "noapic") ) 50.221 + strcat(cmdline, " noapic"); 50.222 + if ( acpi_skip_timer_override && 50.223 + !strstr(cmdline, "acpi_skip_timer_override") ) 50.224 + strcat(cmdline, " acpi_skip_timer_override"); 50.225 + if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") ) 50.226 + { 50.227 + strcat(cmdline, " acpi="); 50.228 + strcat(cmdline, acpi_param); 50.229 + } 50.230 } 50.231 50.232 /*
51.1 --- a/xen/arch/x86/shadow.c Tue May 10 13:56:23 2005 +0000 51.2 +++ b/xen/arch/x86/shadow.c Thu May 12 13:07:32 2005 +0000 51.3 @@ -1217,7 +1217,7 @@ static int shadow_mode_table_op( 51.4 int i, rc = 0; 51.5 struct exec_domain *ed; 51.6 51.7 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.8 + ASSERT(shadow_lock_is_acquired(d)); 51.9 51.10 SH_VLOG("shadow mode table op %lx %lx count %d", 51.11 pagetable_val(d->exec_domain[0]->arch.guest_table), /* XXX SMP */ 51.12 @@ -1813,7 +1813,7 @@ shadow_mark_mfn_out_of_sync(struct exec_ 51.13 struct pfn_info *page = &frame_table[mfn]; 51.14 struct out_of_sync_entry *entry = shadow_alloc_oos_entry(d); 51.15 51.16 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.17 + ASSERT(shadow_lock_is_acquired(d)); 51.18 ASSERT(pfn_valid(mfn)); 51.19 51.20 #ifndef NDEBUG 51.21 @@ -1943,7 +1943,7 @@ int __shadow_out_of_sync(struct exec_dom 51.22 l2_pgentry_t l2e; 51.23 unsigned long l1pfn, l1mfn; 51.24 51.25 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.26 + ASSERT(shadow_lock_is_acquired(d)); 51.27 ASSERT(VALID_M2P(l2pfn)); 51.28 51.29 perfc_incrc(shadow_out_of_sync_calls); 51.30 @@ -2127,7 +2127,7 @@ int shadow_remove_all_write_access( 51.31 u32 found = 0, fixups, write_refs; 51.32 unsigned long prediction, predicted_gpfn, predicted_smfn; 51.33 51.34 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.35 + ASSERT(shadow_lock_is_acquired(d)); 51.36 ASSERT(VALID_MFN(readonly_gmfn)); 51.37 51.38 perfc_incrc(remove_write_access); 51.39 @@ -2245,7 +2245,7 @@ u32 shadow_remove_all_access(struct doma 51.40 if ( unlikely(!shadow_mode_enabled(d)) ) 51.41 return 0; 51.42 51.43 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.44 + ASSERT(shadow_lock_is_acquired(d)); 51.45 perfc_incrc(remove_all_access); 51.46 51.47 for (i = 0; i < shadow_ht_buckets; i++) 51.48 @@ -2287,7 +2287,7 @@ static int resync_all(struct domain *d, 51.49 int unshadow; 51.50 int changed; 51.51 51.52 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.53 + ASSERT(shadow_lock_is_acquired(d)); 51.54 51.55 for ( entry = d->arch.out_of_sync; entry; entry = entry->next) 51.56 { 51.57 @@ -2485,7 +2485,7 @@ void __shadow_sync_all(struct domain *d) 51.58 51.59 perfc_incrc(shadow_sync_all); 51.60 51.61 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 51.62 + ASSERT(shadow_lock_is_acquired(d)); 51.63 51.64 // First, remove all write permissions to the page tables 51.65 //
52.1 --- a/xen/arch/x86/smpboot.c Tue May 10 13:56:23 2005 +0000 52.2 +++ b/xen/arch/x86/smpboot.c Thu May 12 13:07:32 2005 +0000 52.3 @@ -51,8 +51,11 @@ 52.4 #include <mach_apic.h> 52.5 #include <mach_wakecpu.h> 52.6 52.7 -/* Cconfigured maximum number of CPUs to activate. We name the parameter 52.8 -"maxcpus" rather than max_cpus to be compatible with Linux */ 52.9 +/* opt_nosmp: If true, secondary processors are ignored. */ 52.10 +static int opt_nosmp = 0; 52.11 +boolean_param("nosmp", opt_nosmp); 52.12 + 52.13 +/* maxcpus: maximum number of CPUs to activate. */ 52.14 static int max_cpus = -1; 52.15 integer_param("maxcpus", max_cpus); 52.16 52.17 @@ -797,8 +800,7 @@ void __init smp_boot_cpus(void) 52.18 * If we couldnt find an SMP configuration at boot time, 52.19 * get out of here now! 52.20 */ 52.21 - if (!smp_found_config) { 52.22 - printk("SMP motherboard not detected.\n"); 52.23 + if (!smp_found_config || opt_nosmp) { 52.24 io_apic_irqs = 0; 52.25 phys_cpu_present_map = physid_mask_of_physid(0); 52.26 cpu_online_map = 1;
53.1 --- a/xen/arch/x86/traps.c Tue May 10 13:56:23 2005 +0000 53.2 +++ b/xen/arch/x86/traps.c Thu May 12 13:07:32 2005 +0000 53.3 @@ -433,10 +433,19 @@ static inline int admin_io_okay( 53.4 #define outl_user(_v, _p, _d, _r) \ 53.5 (admin_io_okay(_p, 4, _d, _r) ? outl(_v, _p) : ((void)0)) 53.6 53.7 +/* Propagate a fault back to the guest kernel. */ 53.8 +#define USER_READ_FAULT 4 /* user mode, read fault */ 53.9 +#define USER_WRITE_FAULT 6 /* user mode, write fault */ 53.10 +#define PAGE_FAULT(_faultaddr, _errcode) \ 53.11 +({ propagate_page_fault(_faultaddr, _errcode); \ 53.12 + return EXCRET_fault_fixed; \ 53.13 +}) 53.14 + 53.15 +/* Isntruction fetch with error handling. */ 53.16 #define insn_fetch(_type, _size, _ptr) \ 53.17 ({ unsigned long _x; \ 53.18 if ( get_user(_x, (_type *)eip) ) \ 53.19 - goto read_fault; \ 53.20 + PAGE_FAULT(eip, USER_READ_FAULT); \ 53.21 eip += _size; (_type)_x; }) 53.22 53.23 static int emulate_privileged_op(struct cpu_user_regs *regs) 53.24 @@ -502,17 +511,17 @@ static int emulate_privileged_op(struct 53.25 case 1: 53.26 data = (u8)inb_user((u16)regs->edx, ed, regs); 53.27 if ( put_user((u8)data, (u8 *)regs->edi) ) 53.28 - goto write_fault; 53.29 + PAGE_FAULT(regs->edi, USER_WRITE_FAULT); 53.30 break; 53.31 case 2: 53.32 data = (u16)inw_user((u16)regs->edx, ed, regs); 53.33 if ( put_user((u16)data, (u16 *)regs->edi) ) 53.34 - goto write_fault; 53.35 + PAGE_FAULT(regs->edi, USER_WRITE_FAULT); 53.36 break; 53.37 case 4: 53.38 data = (u32)inl_user((u16)regs->edx, ed, regs); 53.39 if ( put_user((u32)data, (u32 *)regs->edi) ) 53.40 - goto write_fault; 53.41 + PAGE_FAULT(regs->edi, USER_WRITE_FAULT); 53.42 break; 53.43 } 53.44 regs->edi += (regs->eflags & EF_DF) ? -op_bytes : op_bytes; 53.45 @@ -527,17 +536,17 @@ static int emulate_privileged_op(struct 53.46 { 53.47 case 1: 53.48 if ( get_user(data, (u8 *)regs->esi) ) 53.49 - goto read_fault; 53.50 + PAGE_FAULT(regs->esi, USER_READ_FAULT); 53.51 outb_user((u8)data, (u16)regs->edx, ed, regs); 53.52 break; 53.53 case 2: 53.54 if ( get_user(data, (u16 *)regs->esi) ) 53.55 - goto read_fault; 53.56 + PAGE_FAULT(regs->esi, USER_READ_FAULT); 53.57 outw_user((u16)data, (u16)regs->edx, ed, regs); 53.58 break; 53.59 case 4: 53.60 if ( get_user(data, (u32 *)regs->esi) ) 53.61 - goto read_fault; 53.62 + PAGE_FAULT(regs->esi, USER_READ_FAULT); 53.63 outl_user((u32)data, (u16)regs->edx, ed, regs); 53.64 break; 53.65 } 53.66 @@ -736,14 +745,6 @@ static int emulate_privileged_op(struct 53.67 53.68 fail: 53.69 return 0; 53.70 - 53.71 - read_fault: 53.72 - propagate_page_fault(eip, 4); /* user mode, read fault */ 53.73 - return EXCRET_fault_fixed; 53.74 - 53.75 - write_fault: 53.76 - propagate_page_fault(eip, 6); /* user mode, write fault */ 53.77 - return EXCRET_fault_fixed; 53.78 } 53.79 53.80 asmlinkage int do_general_protection(struct cpu_user_regs *regs) 53.81 @@ -919,13 +920,7 @@ asmlinkage int math_state_restore(struct 53.82 /* Prevent recursion. */ 53.83 clts(); 53.84 53.85 - if ( !test_and_set_bit(EDF_USEDFPU, ¤t->flags) ) 53.86 - { 53.87 - if ( test_bit(EDF_DONEFPUINIT, ¤t->flags) ) 53.88 - restore_fpu(current); 53.89 - else 53.90 - init_fpu(); 53.91 - } 53.92 + setup_fpu(current); 53.93 53.94 if ( test_and_clear_bit(EDF_GUEST_STTS, ¤t->flags) ) 53.95 {
54.1 --- a/xen/arch/x86/vmx.c Tue May 10 13:56:23 2005 +0000 54.2 +++ b/xen/arch/x86/vmx.c Thu May 12 13:07:32 2005 +0000 54.3 @@ -154,6 +154,21 @@ static int vmx_do_page_fault(unsigned lo 54.4 return result; 54.5 } 54.6 54.7 +static void vmx_do_no_device_fault() 54.8 +{ 54.9 + unsigned long cr0; 54.10 + 54.11 + clts(); 54.12 + setup_fpu(current); 54.13 + __vmread(CR0_READ_SHADOW, &cr0); 54.14 + if (!(cr0 & X86_CR0_TS)) { 54.15 + __vmread(GUEST_CR0, &cr0); 54.16 + cr0 &= ~X86_CR0_TS; 54.17 + __vmwrite(GUEST_CR0, cr0); 54.18 + } 54.19 + __vmwrite(EXCEPTION_BITMAP, MONITOR_DEFAULT_EXCEPTION_BITMAP); 54.20 +} 54.21 + 54.22 static void vmx_do_general_protection_fault(struct cpu_user_regs *regs) 54.23 { 54.24 unsigned long eip, error_code; 54.25 @@ -894,6 +909,9 @@ static int vmx_cr_access(unsigned long e 54.26 mov_from_cr(cr, gp, regs); 54.27 break; 54.28 case TYPE_CLTS: 54.29 + clts(); 54.30 + setup_fpu(current); 54.31 + 54.32 __vmread(GUEST_CR0, &value); 54.33 value &= ~X86_CR0_TS; /* clear TS */ 54.34 __vmwrite(GUEST_CR0, value); 54.35 @@ -1093,6 +1111,11 @@ asmlinkage void vmx_vmexit_handler(struc 54.36 break; 54.37 } 54.38 #endif 54.39 + case TRAP_no_device: 54.40 + { 54.41 + vmx_do_no_device_fault(); 54.42 + break; 54.43 + } 54.44 case TRAP_gp_fault: 54.45 { 54.46 vmx_do_general_protection_fault(®s);
55.1 --- a/xen/arch/x86/vmx_io.c Tue May 10 13:56:23 2005 +0000 55.2 +++ b/xen/arch/x86/vmx_io.c Thu May 12 13:07:32 2005 +0000 55.3 @@ -429,6 +429,7 @@ void vmx_intr_assist(struct exec_domain 55.4 55.5 void vmx_do_resume(struct exec_domain *d) 55.6 { 55.7 + vmx_stts(); 55.8 if ( test_bit(VMX_CPU_STATE_PG_ENABLED, &d->arch.arch_vmx.cpu_state) ) 55.9 __vmwrite(GUEST_CR3, pagetable_val(d->arch.shadow_table)); 55.10 else
56.1 --- a/xen/arch/x86/vmx_vmcs.c Tue May 10 13:56:23 2005 +0000 56.2 +++ b/xen/arch/x86/vmx_vmcs.c Thu May 12 13:07:32 2005 +0000 56.3 @@ -164,6 +164,9 @@ void vmx_do_launch(struct exec_domain *e 56.4 struct pfn_info *page; 56.5 struct cpu_user_regs *regs = get_cpu_user_regs(); 56.6 56.7 + vmx_stts(); 56.8 + set_bit(EDF_GUEST_STTS, &ed->flags); 56.9 + 56.10 cpu = smp_processor_id(); 56.11 56.12 page = (struct pfn_info *) alloc_domheap_page(NULL);
57.1 --- a/xen/common/dom0_ops.c Tue May 10 13:56:23 2005 +0000 57.2 +++ b/xen/common/dom0_ops.c Thu May 12 13:07:32 2005 +0000 57.3 @@ -221,7 +221,8 @@ long do_dom0_op(dom0_op_t *u_dom0_op) 57.4 domid_t dom = op->u.pincpudomain.domain; 57.5 struct domain *d = find_domain_by_id(dom); 57.6 struct exec_domain *ed; 57.7 - int cpu = op->u.pincpudomain.cpu; 57.8 + cpumap_t cpumap; 57.9 + 57.10 57.11 if ( d == NULL ) 57.12 { 57.13 @@ -229,6 +230,14 @@ long do_dom0_op(dom0_op_t *u_dom0_op) 57.14 break; 57.15 } 57.16 57.17 + if ( (op->u.pincpudomain.exec_domain >= MAX_VIRT_CPUS) || 57.18 + !d->exec_domain[op->u.pincpudomain.exec_domain] ) 57.19 + { 57.20 + ret = -EINVAL; 57.21 + put_domain(d); 57.22 + break; 57.23 + } 57.24 + 57.25 ed = d->exec_domain[op->u.pincpudomain.exec_domain]; 57.26 if ( ed == NULL ) 57.27 { 57.28 @@ -244,17 +253,29 @@ long do_dom0_op(dom0_op_t *u_dom0_op) 57.29 break; 57.30 } 57.31 57.32 - if ( cpu == -1 ) 57.33 + if ( copy_from_user(&cpumap, op->u.pincpudomain.cpumap, 57.34 + sizeof(cpumap)) ) 57.35 { 57.36 + ret = -EFAULT; 57.37 + put_domain(d); 57.38 + break; 57.39 + } 57.40 + 57.41 + /* update cpumap for this ed */ 57.42 + ed->cpumap = cpumap; 57.43 + 57.44 + if ( cpumap == CPUMAP_RUNANYWHERE ) 57.45 clear_bit(EDF_CPUPINNED, &ed->flags); 57.46 - } 57.47 else 57.48 { 57.49 + /* pick a new cpu from the usable map */ 57.50 + int new_cpu = (int)find_first_set_bit(cpumap) % smp_num_cpus; 57.51 + 57.52 exec_domain_pause(ed); 57.53 - if ( ed->processor != (cpu % smp_num_cpus) ) 57.54 + if ( ed->processor != new_cpu ) 57.55 set_bit(EDF_MIGRATED, &ed->flags); 57.56 set_bit(EDF_CPUPINNED, &ed->flags); 57.57 - ed->processor = cpu % smp_num_cpus; 57.58 + ed->processor = new_cpu; 57.59 exec_domain_unpause(ed); 57.60 } 57.61 57.62 @@ -278,9 +299,11 @@ long do_dom0_op(dom0_op_t *u_dom0_op) 57.63 57.64 case DOM0_GETDOMAININFO: 57.65 { 57.66 - struct vcpu_guest_context *c; 57.67 - struct domain *d; 57.68 - struct exec_domain *ed; 57.69 + struct domain *d; 57.70 + struct exec_domain *ed; 57.71 + u64 cpu_time = 0; 57.72 + int vcpu_count = 0; 57.73 + int flags = DOMFLAGS_PAUSED | DOMFLAGS_BLOCKED; 57.74 57.75 read_lock(&domlist_lock); 57.76 57.77 @@ -301,34 +324,82 @@ long do_dom0_op(dom0_op_t *u_dom0_op) 57.78 57.79 op->u.getdomaininfo.domain = d->id; 57.80 57.81 - if ( (op->u.getdomaininfo.exec_domain >= MAX_VIRT_CPUS) || 57.82 - !d->exec_domain[op->u.getdomaininfo.exec_domain] ) 57.83 - { 57.84 - ret = -EINVAL; 57.85 - break; 57.86 + memset(&op->u.getdomaininfo.vcpu_to_cpu, -1, 57.87 + sizeof(op->u.getdomaininfo.vcpu_to_cpu)); 57.88 + memset(&op->u.getdomaininfo.cpumap, 0, 57.89 + sizeof(op->u.getdomaininfo.cpumap)); 57.90 + 57.91 + /* 57.92 + * - domain is marked as paused or blocked only if all its vcpus 57.93 + * are paused or blocked 57.94 + * - domain is marked as running if any of its vcpus is running 57.95 + */ 57.96 + for_each_exec_domain ( d, ed ) { 57.97 + op->u.getdomaininfo.vcpu_to_cpu[ed->id] = ed->processor; 57.98 + op->u.getdomaininfo.cpumap[ed->id] = ed->cpumap; 57.99 + if (!test_bit(EDF_CTRLPAUSE, &ed->flags)) 57.100 + flags &= ~DOMFLAGS_PAUSED; 57.101 + if (!test_bit(EDF_BLOCKED, &ed->flags)) 57.102 + flags &= ~DOMFLAGS_BLOCKED; 57.103 + if (test_bit(EDF_RUNNING, &ed->flags)) 57.104 + flags |= DOMFLAGS_RUNNING; 57.105 + if ( ed->cpu_time > cpu_time ) 57.106 + cpu_time += ed->cpu_time; 57.107 + vcpu_count++; 57.108 } 57.109 - 57.110 - ed = d->exec_domain[op->u.getdomaininfo.exec_domain]; 57.111 57.112 - op->u.getdomaininfo.flags = 57.113 + op->u.getdomaininfo.cpu_time = cpu_time; 57.114 + op->u.getdomaininfo.n_vcpu = vcpu_count; 57.115 + 57.116 + op->u.getdomaininfo.flags = flags | 57.117 (test_bit( DF_DYING, &d->flags) ? DOMFLAGS_DYING : 0) | 57.118 (test_bit( DF_CRASHED, &d->flags) ? DOMFLAGS_CRASHED : 0) | 57.119 (test_bit( DF_SHUTDOWN, &d->flags) ? DOMFLAGS_SHUTDOWN : 0) | 57.120 - (test_bit(EDF_CTRLPAUSE, &ed->flags) ? DOMFLAGS_PAUSED : 0) | 57.121 - (test_bit(EDF_BLOCKED, &ed->flags) ? DOMFLAGS_BLOCKED : 0) | 57.122 - (test_bit(EDF_RUNNING, &ed->flags) ? DOMFLAGS_RUNNING : 0); 57.123 - 57.124 - op->u.getdomaininfo.flags |= ed->processor << DOMFLAGS_CPUSHIFT; 57.125 - op->u.getdomaininfo.flags |= 57.126 d->shutdown_code << DOMFLAGS_SHUTDOWNSHIFT; 57.127 57.128 op->u.getdomaininfo.tot_pages = d->tot_pages; 57.129 op->u.getdomaininfo.max_pages = d->max_pages; 57.130 - op->u.getdomaininfo.cpu_time = ed->cpu_time; 57.131 op->u.getdomaininfo.shared_info_frame = 57.132 __pa(d->shared_info) >> PAGE_SHIFT; 57.133 57.134 - if ( op->u.getdomaininfo.ctxt != NULL ) 57.135 + if ( copy_to_user(u_dom0_op, op, sizeof(*op)) ) 57.136 + ret = -EINVAL; 57.137 + 57.138 + put_domain(d); 57.139 + } 57.140 + break; 57.141 + 57.142 + case DOM0_GETVCPUCONTEXT: 57.143 + { 57.144 + struct vcpu_guest_context *c; 57.145 + struct domain *d; 57.146 + struct exec_domain *ed; 57.147 + 57.148 + d = find_domain_by_id(op->u.getvcpucontext.domain); 57.149 + if ( d == NULL ) 57.150 + { 57.151 + ret = -ESRCH; 57.152 + break; 57.153 + } 57.154 + 57.155 + if ( op->u.getvcpucontext.exec_domain >= MAX_VIRT_CPUS ) 57.156 + { 57.157 + ret = -EINVAL; 57.158 + put_domain(d); 57.159 + break; 57.160 + } 57.161 + 57.162 + ed = d->exec_domain[op->u.getvcpucontext.exec_domain]; 57.163 + if ( ed == NULL ) 57.164 + { 57.165 + ret = -ESRCH; 57.166 + put_domain(d); 57.167 + break; 57.168 + } 57.169 + 57.170 + op->u.getvcpucontext.cpu_time = ed->cpu_time; 57.171 + 57.172 + if ( op->u.getvcpucontext.ctxt != NULL ) 57.173 { 57.174 if ( (c = xmalloc(struct vcpu_guest_context)) == NULL ) 57.175 { 57.176 @@ -345,7 +416,7 @@ long do_dom0_op(dom0_op_t *u_dom0_op) 57.177 if ( ed != current ) 57.178 exec_domain_unpause(ed); 57.179 57.180 - if ( copy_to_user(op->u.getdomaininfo.ctxt, c, sizeof(*c)) ) 57.181 + if ( copy_to_user(op->u.getvcpucontext.ctxt, c, sizeof(*c)) ) 57.182 ret = -EINVAL; 57.183 57.184 xfree(c);
58.1 --- a/xen/common/domain.c Tue May 10 13:56:23 2005 +0000 58.2 +++ b/xen/common/domain.c Thu May 12 13:07:32 2005 +0000 58.3 @@ -283,6 +283,7 @@ long do_boot_vcpu(unsigned long vcpu, st 58.4 ed = d->exec_domain[vcpu]; 58.5 58.6 atomic_set(&ed->pausecnt, 0); 58.7 + ed->cpumap = CPUMAP_RUNANYWHERE; 58.8 58.9 memcpy(&ed->arch, &idle0_exec_domain.arch, sizeof(ed->arch)); 58.10
59.1 --- a/xen/common/kernel.c Tue May 10 13:56:23 2005 +0000 59.2 +++ b/xen/common/kernel.c Thu May 12 13:07:32 2005 +0000 59.3 @@ -55,27 +55,13 @@ void cmdline_parse(char *cmdline) 59.4 *(unsigned int *)param->var = 59.5 simple_strtol(opt, (char **)&opt, 0); 59.6 break; 59.7 - case OPT_UINT_UNIT: 59.8 - if ( opt != NULL ) 59.9 - { 59.10 - int base = 1; 59.11 - unsigned int value; 59.12 - 59.13 - value = simple_strtoul(opt, (char **)&opt, 0); 59.14 - if (*opt == 'G' || *opt == 'g') { 59.15 - base = 1024 * 1024; 59.16 - opt++; 59.17 - } if (*opt == 'M' || *opt == 'm') { 59.18 - base = 1024; 59.19 - opt++; 59.20 - } else if (*opt == 'K' || *opt == 'k') 59.21 - opt++; 59.22 - *(unsigned int *) param->var = value * base; 59.23 - } 59.24 - break; 59.25 case OPT_BOOL: 59.26 *(int *)param->var = 1; 59.27 break; 59.28 + case OPT_CUSTOM: 59.29 + if ( opt != NULL ) 59.30 + ((void (*)(char *))param->var)(opt); 59.31 + break; 59.32 } 59.33 } 59.34 cmdline = opt_end;
60.1 --- a/xen/common/lib.c Tue May 10 13:56:23 2005 +0000 60.2 +++ b/xen/common/lib.c Thu May 12 13:07:32 2005 +0000 60.3 @@ -441,6 +441,22 @@ s64 __moddi3(s64 a, s64 b) 60.4 60.5 #endif /* BITS_PER_LONG == 32 */ 60.6 60.7 +unsigned long long memparse(char *s) 60.8 +{ 60.9 + unsigned long long ret = simple_strtoull(s, &s, 0); 60.10 + 60.11 + switch (*s) { 60.12 + case 'G': case 'g': 60.13 + ret <<= 10; 60.14 + case 'M': case 'm': 60.15 + ret <<= 10; 60.16 + case 'K': case 'k': 60.17 + ret <<= 10; 60.18 + } 60.19 + 60.20 + return ret; 60.21 +} 60.22 + 60.23 /* 60.24 * Local variables: 60.25 * mode: C
61.1 --- a/xen/common/page_alloc.c Tue May 10 13:56:23 2005 +0000 61.2 +++ b/xen/common/page_alloc.c Thu May 12 13:07:32 2005 +0000 61.3 @@ -28,6 +28,7 @@ 61.4 #include <xen/sched.h> 61.5 #include <xen/spinlock.h> 61.6 #include <xen/slab.h> 61.7 +#include <xen/mm.h> 61.8 #include <xen/irq.h> 61.9 #include <xen/softirq.h> 61.10 #include <xen/shadow.h>
62.1 --- a/xen/common/resource.c Tue May 10 13:56:23 2005 +0000 62.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 62.3 @@ -1,329 +0,0 @@ 62.4 -/* 62.5 - * linux/kernel/resource.c 62.6 - * 62.7 - * Copyright (C) 1999 Linus Torvalds 62.8 - * Copyright (C) 1999 Martin Mares <mj@ucw.cz> 62.9 - * 62.10 - * Arbitrary resource management. 62.11 - */ 62.12 - 62.13 -#include <xen/config.h> 62.14 -#include <xen/lib.h> 62.15 -#include <xen/sched.h> 62.16 -#include <xen/errno.h> 62.17 -#include <xen/ioport.h> 62.18 -#include <xen/init.h> 62.19 -#include <xen/slab.h> 62.20 -#include <xen/spinlock.h> 62.21 -#include <asm/io.h> 62.22 - 62.23 -struct resource ioport_resource = { "PCI IO", 0x0000, IO_SPACE_LIMIT, IORESOURCE_IO }; 62.24 -struct resource iomem_resource = { "PCI mem", 0x00000000, 0xffffffff, IORESOURCE_MEM }; 62.25 - 62.26 -static rwlock_t resource_lock = RW_LOCK_UNLOCKED; 62.27 - 62.28 -/* 62.29 - * This generates reports for /proc/ioports and /proc/iomem 62.30 - */ 62.31 -static char * do_resource_list(struct resource *entry, const char *fmt, int offset, char *buf, char *end) 62.32 -{ 62.33 - if (offset < 0) 62.34 - offset = 0; 62.35 - 62.36 - while (entry) { 62.37 - const char *name = entry->name; 62.38 - unsigned long from, to; 62.39 - 62.40 - if ((int) (end-buf) < 80) 62.41 - return buf; 62.42 - 62.43 - from = entry->start; 62.44 - to = entry->end; 62.45 - if (!name) 62.46 - name = "<BAD>"; 62.47 - 62.48 - buf += sprintf(buf, fmt + offset, from, to, name); 62.49 - if (entry->child) 62.50 - buf = do_resource_list(entry->child, fmt, offset-2, buf, end); 62.51 - entry = entry->sibling; 62.52 - } 62.53 - 62.54 - return buf; 62.55 -} 62.56 - 62.57 -int get_resource_list(struct resource *root, char *buf, int size) 62.58 -{ 62.59 - char *fmt; 62.60 - int retval; 62.61 - 62.62 - fmt = " %08lx-%08lx : %s\n"; 62.63 - if (root->end < 0x10000) 62.64 - fmt = " %04lx-%04lx : %s\n"; 62.65 - read_lock(&resource_lock); 62.66 - retval = do_resource_list(root->child, fmt, 8, buf, buf + size) - buf; 62.67 - read_unlock(&resource_lock); 62.68 - return retval; 62.69 -} 62.70 - 62.71 -/* Return the conflict entry if you can't request it */ 62.72 -static struct resource * __request_resource(struct resource *root, struct resource *new) 62.73 -{ 62.74 - unsigned long start = new->start; 62.75 - unsigned long end = new->end; 62.76 - struct resource *tmp, **p; 62.77 - 62.78 - if (end < start) 62.79 - return root; 62.80 - if (start < root->start) 62.81 - return root; 62.82 - if (end > root->end) 62.83 - return root; 62.84 - p = &root->child; 62.85 - for (;;) { 62.86 - tmp = *p; 62.87 - if (!tmp || tmp->start > end) { 62.88 - new->sibling = tmp; 62.89 - *p = new; 62.90 - new->parent = root; 62.91 - return NULL; 62.92 - } 62.93 - p = &tmp->sibling; 62.94 - if (tmp->end < start) 62.95 - continue; 62.96 - return tmp; 62.97 - } 62.98 -} 62.99 - 62.100 -static int __release_resource(struct resource *old) 62.101 -{ 62.102 - struct resource *tmp, **p; 62.103 - 62.104 - p = &old->parent->child; 62.105 - for (;;) { 62.106 - tmp = *p; 62.107 - if (!tmp) 62.108 - break; 62.109 - if (tmp == old) { 62.110 - *p = tmp->sibling; 62.111 - old->parent = NULL; 62.112 - return 0; 62.113 - } 62.114 - p = &tmp->sibling; 62.115 - } 62.116 - return -EINVAL; 62.117 -} 62.118 - 62.119 -int request_resource(struct resource *root, struct resource *new) 62.120 -{ 62.121 - struct resource *conflict; 62.122 - 62.123 - write_lock(&resource_lock); 62.124 - conflict = __request_resource(root, new); 62.125 - write_unlock(&resource_lock); 62.126 - return conflict ? -EBUSY : 0; 62.127 -} 62.128 - 62.129 -int release_resource(struct resource *old) 62.130 -{ 62.131 - int retval; 62.132 - 62.133 - write_lock(&resource_lock); 62.134 - retval = __release_resource(old); 62.135 - write_unlock(&resource_lock); 62.136 - return retval; 62.137 -} 62.138 - 62.139 -int check_resource(struct resource *root, unsigned long start, unsigned long len) 62.140 -{ 62.141 - struct resource *conflict, tmp; 62.142 - 62.143 - tmp.start = start; 62.144 - tmp.end = start + len - 1; 62.145 - write_lock(&resource_lock); 62.146 - conflict = __request_resource(root, &tmp); 62.147 - if (!conflict) 62.148 - __release_resource(&tmp); 62.149 - write_unlock(&resource_lock); 62.150 - return conflict ? -EBUSY : 0; 62.151 -} 62.152 - 62.153 -/* 62.154 - * Find empty slot in the resource tree given range and alignment. 62.155 - */ 62.156 -static int find_resource(struct resource *root, struct resource *new, 62.157 - unsigned long size, 62.158 - unsigned long min, unsigned long max, 62.159 - unsigned long align, 62.160 - void (*alignf)(void *, struct resource *, 62.161 - unsigned long, unsigned long), 62.162 - void *alignf_data) 62.163 -{ 62.164 - struct resource *this = root->child; 62.165 - 62.166 - new->start = root->start; 62.167 - for(;;) { 62.168 - if (this) 62.169 - new->end = this->start; 62.170 - else 62.171 - new->end = root->end; 62.172 - if (new->start < min) 62.173 - new->start = min; 62.174 - if (new->end > max) 62.175 - new->end = max; 62.176 - new->start = (new->start + align - 1) & ~(align - 1); 62.177 - if (alignf) 62.178 - alignf(alignf_data, new, size, align); 62.179 - if (new->start < new->end && new->end - new->start + 1 >= size) { 62.180 - new->end = new->start + size - 1; 62.181 - return 0; 62.182 - } 62.183 - if (!this) 62.184 - break; 62.185 - new->start = this->end + 1; 62.186 - this = this->sibling; 62.187 - } 62.188 - return -EBUSY; 62.189 -} 62.190 - 62.191 -/* 62.192 - * Allocate empty slot in the resource tree given range and alignment. 62.193 - */ 62.194 -int allocate_resource(struct resource *root, struct resource *new, 62.195 - unsigned long size, 62.196 - unsigned long min, unsigned long max, 62.197 - unsigned long align, 62.198 - void (*alignf)(void *, struct resource *, 62.199 - unsigned long, unsigned long), 62.200 - void *alignf_data) 62.201 -{ 62.202 - int err; 62.203 - 62.204 - write_lock(&resource_lock); 62.205 - err = find_resource(root, new, size, min, max, align, alignf, alignf_data); 62.206 - if (err >= 0 && __request_resource(root, new)) 62.207 - err = -EBUSY; 62.208 - write_unlock(&resource_lock); 62.209 - return err; 62.210 -} 62.211 - 62.212 -/* 62.213 - * This is compatibility stuff for IO resources. 62.214 - * 62.215 - * Note how this, unlike the above, knows about 62.216 - * the IO flag meanings (busy etc). 62.217 - * 62.218 - * Request-region creates a new busy region. 62.219 - * 62.220 - * Check-region returns non-zero if the area is already busy 62.221 - * 62.222 - * Release-region releases a matching busy region. 62.223 - */ 62.224 -struct resource * __request_region(struct resource *parent, unsigned long start, unsigned long n, const char *name) 62.225 -{ 62.226 - struct resource *res = xmalloc(struct resource); 62.227 - 62.228 - if (res) { 62.229 - memset(res, 0, sizeof(*res)); 62.230 - res->name = name; 62.231 - res->start = start; 62.232 - res->end = start + n - 1; 62.233 - res->flags = IORESOURCE_BUSY; 62.234 - 62.235 - write_lock(&resource_lock); 62.236 - 62.237 - for (;;) { 62.238 - struct resource *conflict; 62.239 - 62.240 - conflict = __request_resource(parent, res); 62.241 - if (!conflict) 62.242 - break; 62.243 - if (conflict != parent) { 62.244 - parent = conflict; 62.245 - if (!(conflict->flags & IORESOURCE_BUSY)) 62.246 - continue; 62.247 - } 62.248 - 62.249 - /* Uhhuh, that didn't work out.. */ 62.250 - xfree(res); 62.251 - res = NULL; 62.252 - break; 62.253 - } 62.254 - write_unlock(&resource_lock); 62.255 - } 62.256 - return res; 62.257 -} 62.258 - 62.259 -void __release_region(struct resource *parent, unsigned long start, unsigned long n) 62.260 -{ 62.261 - struct resource **p; 62.262 - unsigned long end; 62.263 - 62.264 - p = &parent->child; 62.265 - end = start + n - 1; 62.266 - 62.267 - for (;;) { 62.268 - struct resource *res = *p; 62.269 - 62.270 - if (!res) 62.271 - break; 62.272 - if (res->start <= start && res->end >= end) { 62.273 - if (!(res->flags & IORESOURCE_BUSY)) { 62.274 - p = &res->child; 62.275 - continue; 62.276 - } 62.277 - if (res->start != start || res->end != end) 62.278 - break; 62.279 - *p = res->sibling; 62.280 - xfree(res); 62.281 - return; 62.282 - } 62.283 - p = &res->sibling; 62.284 - } 62.285 - printk("Trying to free nonexistent resource <%08lx-%08lx>\n", start, end); 62.286 -} 62.287 - 62.288 - 62.289 -#if 0 62.290 -/* 62.291 - * Called from init/main.c to reserve IO ports. 62.292 - */ 62.293 -#define MAXRESERVE 4 62.294 -static int __init reserve_setup(char *str) 62.295 -{ 62.296 - static int reserved = 0; 62.297 - static struct resource reserve[MAXRESERVE]; 62.298 - 62.299 - for (;;) { 62.300 - int io_start, io_num; 62.301 - int x = reserved; 62.302 - 62.303 - if (get_option (&str, &io_start) != 2) 62.304 - break; 62.305 - if (get_option (&str, &io_num) == 0) 62.306 - break; 62.307 - if (x < MAXRESERVE) { 62.308 - struct resource *res = reserve + x; 62.309 - res->name = "reserved"; 62.310 - res->start = io_start; 62.311 - res->end = io_start + io_num - 1; 62.312 - res->flags = IORESOURCE_BUSY; 62.313 - res->child = NULL; 62.314 - if (request_resource(res->start >= 0x10000 ? &iomem_resource : &ioport_resource, res) == 0) 62.315 - reserved = x+1; 62.316 - } 62.317 - } 62.318 - return 1; 62.319 -} 62.320 - 62.321 -__setup("reserve=", reserve_setup); 62.322 -#endif 62.323 - 62.324 -/* 62.325 - * Local variables: 62.326 - * mode: C 62.327 - * c-set-style: "BSD" 62.328 - * c-basic-offset: 8 62.329 - * tab-width: 8 62.330 - * indent-tabs-mode: t 62.331 - * End: 62.332 - */
63.1 --- a/xen/common/schedule.c Tue May 10 13:56:23 2005 +0000 63.2 +++ b/xen/common/schedule.c Thu May 12 13:07:32 2005 +0000 63.3 @@ -34,6 +34,7 @@ 63.4 #include <xen/sched-if.h> 63.5 #include <xen/softirq.h> 63.6 #include <xen/trace.h> 63.7 +#include <xen/mm.h> 63.8 #include <public/sched_ctl.h> 63.9 63.10 /* opt_sched: scheduler - default to Borrowed Virtual Time */
64.1 --- a/xen/drivers/char/console.c Tue May 10 13:56:23 2005 +0000 64.2 +++ b/xen/drivers/char/console.c Thu May 12 13:07:32 2005 +0000 64.3 @@ -17,8 +17,8 @@ 64.4 #include <xen/console.h> 64.5 #include <xen/serial.h> 64.6 #include <xen/keyhandler.h> 64.7 +#include <xen/mm.h> 64.8 #include <asm/uaccess.h> 64.9 -#include <asm/mm.h> 64.10 #include <asm/debugger.h> 64.11 #include <asm/io.h> 64.12
65.1 --- a/xen/include/asm-ia64/config.h Tue May 10 13:56:23 2005 +0000 65.2 +++ b/xen/include/asm-ia64/config.h Thu May 12 13:07:32 2005 +0000 65.3 @@ -166,12 +166,6 @@ struct device { 65.4 #endif 65.5 }; 65.6 65.7 -// from linux/include/linux/pci.h 65.8 -struct pci_bus_region { 65.9 - unsigned long start; 65.10 - unsigned long end; 65.11 -}; 65.12 - 65.13 // warning: unless search_extable is declared, the return value gets 65.14 // truncated to 32-bits, causing a very strange error in privop handling 65.15 struct exception_table_entry; 65.16 @@ -256,6 +250,14 @@ struct screen_info { }; 65.17 #define seq_printf(a,b...) printf(b) 65.18 #define CONFIG_BLK_DEV_INITRD // needed to reserve memory for domain0 65.19 65.20 +// 65.21 +#define __smp_processor_id() (current->processor) 65.22 + 65.23 +// needed for newer ACPI code 65.24 +#define asmlinkage 65.25 + 65.26 +#define FORCE_CRASH() asm("break 0;;"); 65.27 + 65.28 // these declarations got moved at some point, find a better place for them 65.29 extern int opt_noht; 65.30 extern int ht_per_core;
66.1 --- a/xen/include/asm-ia64/domain.h Tue May 10 13:56:23 2005 +0000 66.2 +++ b/xen/include/asm-ia64/domain.h Thu May 12 13:07:32 2005 +0000 66.3 @@ -37,12 +37,30 @@ struct arch_domain { 66.4 #define shared_info_va arch.shared_info_va 66.5 66.6 struct arch_exec_domain { 66.7 +#if 1 66.8 + TR_ENTRY itrs[NITRS]; 66.9 + TR_ENTRY dtrs[NDTRS]; 66.10 + TR_ENTRY itlb; 66.11 + TR_ENTRY dtlb; 66.12 + unsigned long itlb_pte; 66.13 + unsigned long dtlb_pte; 66.14 + unsigned long irr[4]; 66.15 + unsigned long insvc[4]; 66.16 + unsigned long iva; 66.17 + unsigned long dcr; 66.18 + unsigned long itc; 66.19 + unsigned long domain_itm; 66.20 + unsigned long domain_itm_last; 66.21 + unsigned long xen_itm; 66.22 + unsigned long xen_timer_interval; 66.23 +#endif 66.24 void *regs; /* temporary until find a better way to do privops */ 66.25 - struct thread_struct _thread; 66.26 struct mm_struct *active_mm; 66.27 + struct thread_struct _thread; // this must be last 66.28 }; 66.29 + 66.30 #define active_mm arch.active_mm 66.31 -#define thread arch._thread 66.32 +//#define thread arch._thread 66.33 66.34 // FOLLOWING FROM linux-2.6.7/include/sched.h 66.35
67.1 --- a/xen/include/asm-ia64/vcpu.h Tue May 10 13:56:23 2005 +0000 67.2 +++ b/xen/include/asm-ia64/vcpu.h Thu May 12 13:07:32 2005 +0000 67.3 @@ -21,6 +21,21 @@ typedef struct pt_regs REGS; 67.4 //#define vcpu_regs(vcpu) &((struct spk_thread_t *)vcpu)->thread_regs 67.5 //#define vcpu_thread(vcpu) ((struct spk_thread_t *)vcpu) 67.6 67.7 +#define PRIVOP_ADDR_COUNT 67.8 +#ifdef PRIVOP_ADDR_COUNT 67.9 +#define _RSM 0 67.10 +#define _SSM 1 67.11 +#define PRIVOP_COUNT_NINSTS 2 67.12 +#define PRIVOP_COUNT_NADDRS 30 67.13 + 67.14 +struct privop_addr_count { 67.15 + char *instname; 67.16 + unsigned long addr[PRIVOP_COUNT_NADDRS]; 67.17 + unsigned long count[PRIVOP_COUNT_NADDRS]; 67.18 + unsigned long overflow; 67.19 +}; 67.20 +#endif 67.21 + 67.22 /* general registers */ 67.23 extern UINT64 vcpu_get_gr(VCPU *vcpu, unsigned reg); 67.24 extern IA64FAULT vcpu_set_gr(VCPU *vcpu, unsigned reg, UINT64 value); 67.25 @@ -132,6 +147,8 @@ extern void vcpu_set_next_timer(VCPU *vc 67.26 extern BOOLEAN vcpu_timer_expired(VCPU *vcpu); 67.27 extern UINT64 vcpu_deliverable_interrupts(VCPU *vcpu); 67.28 extern void vcpu_itc_no_srlz(VCPU *vcpu, UINT64, UINT64, UINT64, UINT64, UINT64); 67.29 +extern UINT64 vcpu_get_tmp(VCPU *, UINT64); 67.30 +extern void vcpu_set_tmp(VCPU *, UINT64, UINT64); 67.31 67.32 67.33 #endif
68.1 --- a/xen/include/asm-x86/acpi.h Tue May 10 13:56:23 2005 +0000 68.2 +++ b/xen/include/asm-x86/acpi.h Thu May 12 13:07:32 2005 +0000 68.3 @@ -27,7 +27,7 @@ 68.4 #define _ASM_ACPI_H 68.5 68.6 #include <xen/config.h> 68.7 -#include <asm/system.h> 68.8 +#include <asm/system.h> /* defines cmpxchg */ 68.9 68.10 #define COMPILER_DEPENDENT_INT64 long long 68.11 #define COMPILER_DEPENDENT_UINT64 unsigned long long 68.12 @@ -49,8 +49,8 @@ 68.13 68.14 #define ACPI_ASM_MACROS 68.15 #define BREAKPOINT3 68.16 -#define ACPI_DISABLE_IRQS() __cli() 68.17 -#define ACPI_ENABLE_IRQS() __sti() 68.18 +#define ACPI_DISABLE_IRQS() local_irq_disable() 68.19 +#define ACPI_ENABLE_IRQS() local_irq_enable() 68.20 #define ACPI_FLUSH_CPU_CACHE() wbinvd() 68.21 68.22 68.23 @@ -100,6 +100,11 @@ static inline int 68.24 :"=r"(n_hi), "=r"(n_lo) \ 68.25 :"0"(n_hi), "1"(n_lo)) 68.26 68.27 +/* 68.28 + * Refer Intel ACPI _PDC support document for bit definitions 68.29 + */ 68.30 +#define ACPI_PDC_EST_CAPABILITY_SMP 0xa 68.31 +#define ACPI_PDC_EST_CAPABILITY_MSR 0x1 68.32 68.33 #ifdef CONFIG_ACPI_BOOT 68.34 extern int acpi_lapic; 68.35 @@ -108,47 +113,53 @@ extern int acpi_noirq; 68.36 extern int acpi_strict; 68.37 extern int acpi_disabled; 68.38 extern int acpi_ht; 68.39 -static inline void disable_acpi(void) { acpi_disabled = 1; acpi_ht = 0; } 68.40 +extern int acpi_pci_disabled; 68.41 +static inline void disable_acpi(void) 68.42 +{ 68.43 + acpi_disabled = 1; 68.44 + acpi_ht = 0; 68.45 + acpi_pci_disabled = 1; 68.46 + acpi_noirq = 1; 68.47 +} 68.48 68.49 /* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */ 68.50 #define FIX_ACPI_PAGES 4 68.51 68.52 -#else /* !CONFIG_ACPI_BOOT */ 68.53 +extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); 68.54 + 68.55 +#ifdef CONFIG_X86_IO_APIC 68.56 +extern int skip_ioapic_setup; 68.57 +extern int acpi_skip_timer_override; 68.58 + 68.59 +extern void check_acpi_pci(void); 68.60 + 68.61 +static inline void disable_ioapic_setup(void) 68.62 +{ 68.63 + skip_ioapic_setup = 1; 68.64 +} 68.65 + 68.66 +static inline int ioapic_setup_disabled(void) 68.67 +{ 68.68 + return skip_ioapic_setup; 68.69 +} 68.70 + 68.71 +#else 68.72 +static inline void disable_ioapic_setup(void) { } 68.73 +static inline void check_acpi_pci(void) { } 68.74 + 68.75 +#endif 68.76 + 68.77 +#else /* CONFIG_ACPI_BOOT */ 68.78 # define acpi_lapic 0 68.79 # define acpi_ioapic 0 68.80 68.81 -#endif /* !CONFIG_ACPI_BOOT */ 68.82 +#endif 68.83 68.84 -#ifdef CONFIG_ACPI_PCI 68.85 static inline void acpi_noirq_set(void) { acpi_noirq = 1; } 68.86 -extern int acpi_irq_balance_set(char *str); 68.87 -#else 68.88 -static inline void acpi_noirq_set(void) { } 68.89 static inline int acpi_irq_balance_set(char *str) { return 0; } 68.90 -#endif 68.91 68.92 #ifdef CONFIG_ACPI_SLEEP 68.93 68.94 -extern unsigned long saved_eip; 68.95 -extern unsigned long saved_esp; 68.96 -extern unsigned long saved_ebp; 68.97 -extern unsigned long saved_ebx; 68.98 -extern unsigned long saved_esi; 68.99 -extern unsigned long saved_edi; 68.100 - 68.101 -static inline void acpi_save_register_state(unsigned long return_point) 68.102 -{ 68.103 - saved_eip = return_point; 68.104 - asm volatile ("movl %%esp,(%0)" : "=m" (saved_esp)); 68.105 - asm volatile ("movl %%ebp,(%0)" : "=m" (saved_ebp)); 68.106 - asm volatile ("movl %%ebx,(%0)" : "=m" (saved_ebx)); 68.107 - asm volatile ("movl %%edi,(%0)" : "=m" (saved_edi)); 68.108 - asm volatile ("movl %%esi,(%0)" : "=m" (saved_esi)); 68.109 -} 68.110 - 68.111 -#define acpi_restore_register_state() do {} while (0) 68.112 - 68.113 - 68.114 /* routines for saving/restoring kernel state */ 68.115 extern int acpi_save_state_mem(void); 68.116 extern int acpi_save_state_disk(void); 68.117 @@ -156,11 +167,11 @@ extern void acpi_restore_state_mem(void) 68.118 68.119 extern unsigned long acpi_wakeup_address; 68.120 68.121 -extern void do_suspend_lowlevel_s4bios(int resume); 68.122 - 68.123 /* early initialization routine */ 68.124 extern void acpi_reserve_bootmem(void); 68.125 68.126 #endif /*CONFIG_ACPI_SLEEP*/ 68.127 68.128 +extern u8 x86_acpiid_to_apicid[]; 68.129 + 68.130 #endif /*_ASM_ACPI_H*/
69.1 --- a/xen/include/asm-x86/domain.h Tue May 10 13:56:23 2005 +0000 69.2 +++ b/xen/include/asm-x86/domain.h Thu May 12 13:07:32 2005 +0000 69.3 @@ -30,7 +30,7 @@ struct arch_domain 69.4 69.5 /* Shadow mode status and controls. */ 69.6 unsigned int shadow_mode; /* flags to control shadow table operation */ 69.7 - spinlock_t shadow_lock; 69.8 + unsigned int shadow_nest; /* Recursive depth of shadow_lock() nesting */ 69.9 /* Shadow mode has tainted page reference counts? */ 69.10 unsigned int shadow_tainted_refcnts; 69.11
70.1 --- a/xen/include/asm-x86/i387.h Tue May 10 13:56:23 2005 +0000 70.2 +++ b/xen/include/asm-x86/i387.h Thu May 12 13:07:32 2005 +0000 70.3 @@ -28,4 +28,16 @@ extern void restore_fpu(struct exec_doma 70.4 __asm__ __volatile__ ( "ldmxcsr %0" : : "m" (__mxcsr) ); \ 70.5 } while ( 0 ) 70.6 70.7 +/* Make domain the FPU owner */ 70.8 +static inline void setup_fpu(struct exec_domain *ed) 70.9 +{ 70.10 + if ( !test_and_set_bit(EDF_USEDFPU, &ed->flags) ) 70.11 + { 70.12 + if ( test_bit(EDF_DONEFPUINIT, &ed->flags) ) 70.13 + restore_fpu(ed); 70.14 + else 70.15 + init_fpu(); 70.16 + } 70.17 +} 70.18 + 70.19 #endif /* __ASM_I386_I387_H */
71.1 --- a/xen/include/asm-x86/io_apic.h Tue May 10 13:56:23 2005 +0000 71.2 +++ b/xen/include/asm-x86/io_apic.h Thu May 12 13:07:32 2005 +0000 71.3 @@ -17,7 +17,6 @@ 71.4 #ifdef CONFIG_PCI_MSI 71.5 static inline int use_pci_vector(void) {return 1;} 71.6 static inline void disable_edge_ioapic_vector(unsigned int vector) { } 71.7 -static inline void mask_and_ack_level_ioapic_vector(unsigned int vector) { } 71.8 static inline void end_edge_ioapic_vector (unsigned int vector) { } 71.9 #define startup_level_ioapic startup_level_ioapic_vector 71.10 #define shutdown_level_ioapic mask_IO_APIC_vector 71.11 @@ -36,7 +35,6 @@ static inline void end_edge_ioapic_vecto 71.12 #else 71.13 static inline int use_pci_vector(void) {return 0;} 71.14 static inline void disable_edge_ioapic_irq(unsigned int irq) { } 71.15 -static inline void mask_and_ack_level_ioapic_irq(unsigned int irq) { } 71.16 static inline void end_edge_ioapic_irq (unsigned int irq) { } 71.17 #define startup_level_ioapic startup_level_ioapic_irq 71.18 #define shutdown_level_ioapic mask_IO_APIC_irq
73.1 --- a/xen/include/asm-x86/shadow.h Tue May 10 13:56:23 2005 +0000 73.2 +++ b/xen/include/asm-x86/shadow.h Thu May 12 13:07:32 2005 +0000 73.3 @@ -26,6 +26,7 @@ 73.4 #include <xen/types.h> 73.5 #include <xen/perfc.h> 73.6 #include <xen/sched.h> 73.7 +#include <xen/mm.h> 73.8 #include <asm/processor.h> 73.9 #include <asm/domain_page.h> 73.10 #include <public/dom0_ops.h> 73.11 @@ -59,9 +60,45 @@ 73.12 #define __linear_hl2_table ((l1_pgentry_t *)(LINEAR_PT_VIRT_START + \ 73.13 (PERDOMAIN_VIRT_START >> (L2_PAGETABLE_SHIFT - L1_PAGETABLE_SHIFT)))) 73.14 73.15 -#define shadow_lock_init(_d) spin_lock_init(&(_d)->arch.shadow_lock) 73.16 -#define shadow_lock(_d) do { ASSERT(!spin_is_locked(&(_d)->arch.shadow_lock)); spin_lock(&(_d)->arch.shadow_lock); } while (0) 73.17 -#define shadow_unlock(_d) spin_unlock(&(_d)->arch.shadow_lock) 73.18 +/* 73.19 + * For now we use the per-domain BIGLOCK rather than a shadow-specific lock. 73.20 + * We usually have the BIGLOCK already acquired anyway, so this is unlikely 73.21 + * to cause much unnecessary extra serialisation. Also it's a recursive 73.22 + * lock, and there are some code paths containing nested shadow_lock(). 73.23 + * The #if0'ed code below is therefore broken until such nesting is removed. 73.24 + */ 73.25 +#if 0 73.26 +#define shadow_lock_init(_d) \ 73.27 + spin_lock_init(&(_d)->arch.shadow_lock) 73.28 +#define shadow_lock_is_acquired(_d) \ 73.29 + spin_is_locked(&(_d)->arch.shadow_lock) 73.30 +#define shadow_lock(_d) \ 73.31 +do { \ 73.32 + ASSERT(!shadow_lock_is_acquired(_d)); \ 73.33 + spin_lock(&(_d)->arch.shadow_lock); \ 73.34 +} while (0) 73.35 +#define shadow_unlock(_d) \ 73.36 +do { \ 73.37 + ASSERT(!shadow_lock_is_acquired(_d)); \ 73.38 + spin_unlock(&(_d)->arch.shadow_lock); \ 73.39 +} while (0) 73.40 +#else 73.41 +#define shadow_lock_init(_d) \ 73.42 + ((_d)->arch.shadow_nest = 0) 73.43 +#define shadow_lock_is_acquired(_d) \ 73.44 + (spin_is_locked(&(_d)->big_lock) && ((_d)->arch.shadow_nest != 0)) 73.45 +#define shadow_lock(_d) \ 73.46 +do { \ 73.47 + LOCK_BIGLOCK(_d); \ 73.48 + (_d)->arch.shadow_nest++; \ 73.49 +} while (0) 73.50 +#define shadow_unlock(_d) \ 73.51 +do { \ 73.52 + ASSERT(shadow_lock_is_acquired(_d)); \ 73.53 + (_d)->arch.shadow_nest--; \ 73.54 + UNLOCK_BIGLOCK(_d); \ 73.55 +} while (0) 73.56 +#endif 73.57 73.58 #define SHADOW_ENCODE_MIN_MAX(_min, _max) ((((L1_PAGETABLE_ENTRIES - 1) - (_max)) << 16) | (_min)) 73.59 #define SHADOW_MIN(_encoded) ((_encoded) & ((1u<<16) - 1)) 73.60 @@ -402,7 +439,7 @@ static inline int __mark_dirty(struct do 73.61 unsigned long pfn; 73.62 int rc = 0; 73.63 73.64 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 73.65 + ASSERT(shadow_lock_is_acquired(d)); 73.66 ASSERT(d->arch.shadow_dirty_bitmap != NULL); 73.67 73.68 if ( !VALID_MFN(mfn) ) 73.69 @@ -1136,7 +1173,7 @@ static inline unsigned long __shadow_sta 73.70 ? __gpfn_to_mfn(d, gpfn) 73.71 : INVALID_MFN); 73.72 73.73 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 73.74 + ASSERT(shadow_lock_is_acquired(d)); 73.75 ASSERT(gpfn == (gpfn & PGT_mfn_mask)); 73.76 ASSERT(stype && !(stype & ~PGT_type_mask)); 73.77 73.78 @@ -1185,7 +1222,7 @@ shadow_max_pgtable_type(struct domain *d 73.79 struct shadow_status *x; 73.80 u32 pttype = PGT_none, type; 73.81 73.82 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 73.83 + ASSERT(shadow_lock_is_acquired(d)); 73.84 ASSERT(gpfn == (gpfn & PGT_mfn_mask)); 73.85 73.86 perfc_incrc(shadow_max_type); 73.87 @@ -1279,7 +1316,7 @@ static inline void delete_shadow_status( 73.88 struct shadow_status *p, *x, *n, *head; 73.89 unsigned long key = gpfn | stype; 73.90 73.91 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 73.92 + ASSERT(shadow_lock_is_acquired(d)); 73.93 ASSERT(!(gpfn & ~PGT_mfn_mask)); 73.94 ASSERT(stype && !(stype & ~PGT_type_mask)); 73.95 73.96 @@ -1361,7 +1398,7 @@ static inline void set_shadow_status( 73.97 73.98 SH_VVLOG("set gpfn=%lx gmfn=%lx smfn=%lx t=%lx", gpfn, gmfn, smfn, stype); 73.99 73.100 - ASSERT(spin_is_locked(&d->arch.shadow_lock)); 73.101 + ASSERT(shadow_lock_is_acquired(d)); 73.102 73.103 ASSERT(shadow_mode_translate(d) || gpfn); 73.104 ASSERT(!(gpfn & ~PGT_mfn_mask));
74.1 --- a/xen/include/asm-x86/vmx.h Tue May 10 13:56:23 2005 +0000 74.2 +++ b/xen/include/asm-x86/vmx.h Thu May 12 13:07:32 2005 +0000 74.3 @@ -24,6 +24,7 @@ 74.4 #include <asm/regs.h> 74.5 #include <asm/processor.h> 74.6 #include <asm/vmx_vmcs.h> 74.7 +#include <asm/i387.h> 74.8 74.9 extern void vmx_asm_vmexit_handler(struct cpu_user_regs); 74.10 extern void vmx_asm_do_resume(void); 74.11 @@ -251,4 +252,19 @@ static inline int __vmxon (u64 addr) 74.12 return 0; 74.13 } 74.14 74.15 +/* Make sure that xen intercepts any FP accesses from current */ 74.16 +static inline void vmx_stts() 74.17 +{ 74.18 + unsigned long cr0; 74.19 + 74.20 + __vmread(GUEST_CR0, &cr0); 74.21 + if (!(cr0 & X86_CR0_TS)) 74.22 + __vmwrite(GUEST_CR0, cr0 | X86_CR0_TS); 74.23 + 74.24 + __vmread(CR0_READ_SHADOW, &cr0); 74.25 + if (!(cr0 & X86_CR0_TS)) 74.26 + __vmwrite(EXCEPTION_BITMAP, MONITOR_DEFAULT_EXCEPTION_BITMAP | 74.27 + EXCEPTION_BITMAP_NM); 74.28 +} 74.29 + 74.30 #endif /* __ASM_X86_VMX_H__ */
75.1 --- a/xen/include/public/arch-ia64.h Tue May 10 13:56:23 2005 +0000 75.2 +++ b/xen/include/public/arch-ia64.h Thu May 12 13:07:32 2005 +0000 75.3 @@ -63,24 +63,8 @@ typedef struct { 75.4 unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active 75.5 unsigned long rrs[8]; // region registers 75.6 unsigned long krs[8]; // kernel registers 75.7 - unsigned long pkrs[8]; // protection key registers 75.8 - // FIXME: These shouldn't be here as they can be overwritten by guests 75.9 - // and validation at TLB miss time would be too expensive. 75.10 - TR_ENTRY itrs[NITRS]; 75.11 - TR_ENTRY dtrs[NDTRS]; 75.12 - TR_ENTRY itlb; 75.13 - TR_ENTRY dtlb; 75.14 - unsigned long itlb_pte; 75.15 - unsigned long dtlb_pte; 75.16 - unsigned long irr[4]; 75.17 - unsigned long insvc[4]; 75.18 - unsigned long iva; 75.19 - unsigned long dcr; 75.20 - unsigned long itc; 75.21 - unsigned long domain_itm; 75.22 - unsigned long domain_itm_last; 75.23 - unsigned long xen_itm; 75.24 - unsigned long xen_timer_interval; 75.25 + unsigned long pkrs[8]; // protection key registers 75.26 + unsigned long tmp[8]; // temp registers (e.g. for hyperprivops) 75.27 //} PACKED arch_shared_info_t; 75.28 } arch_vcpu_info_t; // DON'T PACK 75.29
76.1 --- a/xen/include/public/dom0_ops.h Tue May 10 13:56:23 2005 +0000 76.2 +++ b/xen/include/public/dom0_ops.h Thu May 12 13:07:32 2005 +0000 76.3 @@ -19,7 +19,7 @@ 76.4 * This makes sure that old versions of dom0 tools will stop working in a 76.5 * well-defined way (rather than crashing the machine, for instance). 76.6 */ 76.7 -#define DOM0_INTERFACE_VERSION 0xAAAA1004 76.8 +#define DOM0_INTERFACE_VERSION 0xAAAA1005 76.9 76.10 /************************************************************************/ 76.11 76.12 @@ -70,7 +70,6 @@ typedef struct { 76.13 typedef struct { 76.14 /* IN variables. */ 76.15 domid_t domain; /* NB. IN/OUT variable. */ 76.16 - u16 exec_domain; 76.17 /* OUT variables. */ 76.18 #define DOMFLAGS_DYING (1<<0) /* Domain is scheduled to die. */ 76.19 #define DOMFLAGS_CRASHED (1<<1) /* Crashed domain; frozen for postmortem. */ 76.20 @@ -83,11 +82,13 @@ typedef struct { 76.21 #define DOMFLAGS_SHUTDOWNMASK 255 /* DOMFLAGS_SHUTDOWN guest-supplied code. */ 76.22 #define DOMFLAGS_SHUTDOWNSHIFT 16 76.23 u32 flags; 76.24 - vcpu_guest_context_t *ctxt; /* NB. IN/OUT variable. */ 76.25 memory_t tot_pages; 76.26 memory_t max_pages; 76.27 memory_t shared_info_frame; /* MFN of shared_info struct */ 76.28 u64 cpu_time; 76.29 + u32 n_vcpu; 76.30 + s32 vcpu_to_cpu[MAX_VIRT_CPUS]; /* current mapping */ 76.31 + cpumap_t cpumap[MAX_VIRT_CPUS]; /* allowable mapping */ 76.32 } dom0_getdomaininfo_t; 76.33 76.34 #define DOM0_SETDOMAININFO 13 76.35 @@ -170,14 +171,14 @@ typedef struct { 76.36 } dom0_readconsole_t; 76.37 76.38 /* 76.39 - * Pin Domain to a particular CPU (use -1 to unpin) 76.40 + * Set which cpus an exec_domain can use 76.41 */ 76.42 #define DOM0_PINCPUDOMAIN 20 76.43 typedef struct { 76.44 /* IN variables. */ 76.45 domid_t domain; 76.46 u16 exec_domain; 76.47 - s32 cpu; /* -1 implies unpin */ 76.48 + cpumap_t *cpumap; 76.49 } dom0_pincpudomain_t; 76.50 76.51 /* Get trace buffers machine base address */ 76.52 @@ -342,6 +343,14 @@ typedef struct { 76.53 u16 allow_access; /* allow or deny access to range? */ 76.54 } dom0_ioport_permission_t; 76.55 76.56 +#define DOM0_GETVCPUCONTEXT 37 76.57 +typedef struct { 76.58 + domid_t domain; /* domain to be affected */ 76.59 + u16 exec_domain; /* vcpu # */ 76.60 + vcpu_guest_context_t *ctxt; /* NB. IN/OUT variable. */ 76.61 + u64 cpu_time; 76.62 +} dom0_getvcpucontext_t; 76.63 + 76.64 typedef struct { 76.65 u32 cmd; 76.66 u32 interface_version; /* DOM0_INTERFACE_VERSION */ 76.67 @@ -373,6 +382,7 @@ typedef struct { 76.68 dom0_perfccontrol_t perfccontrol; 76.69 dom0_microcode_t microcode; 76.70 dom0_ioport_permission_t ioport_permission; 76.71 + dom0_getvcpucontext_t getvcpucontext; 76.72 } u; 76.73 } dom0_op_t; 76.74
77.1 --- a/xen/include/public/xen.h Tue May 10 13:56:23 2005 +0000 77.2 +++ b/xen/include/public/xen.h Thu May 12 13:07:32 2005 +0000 77.3 @@ -473,6 +473,8 @@ typedef struct { 77.4 /* For use in guest OSes. */ 77.5 extern shared_info_t *HYPERVISOR_shared_info; 77.6 77.7 +typedef u64 cpumap_t; 77.8 + 77.9 #endif /* !__ASSEMBLY__ */ 77.10 77.11 #endif /* __XEN_PUBLIC_XEN_H__ */
78.1 --- a/xen/include/xen/cpumask.h Tue May 10 13:56:23 2005 +0000 78.2 +++ b/xen/include/xen/cpumask.h Thu May 12 13:07:32 2005 +0000 78.3 @@ -9,7 +9,9 @@ 78.4 78.5 typedef u32 cpumask_t; 78.6 78.7 +#ifndef cpu_online_map 78.8 extern cpumask_t cpu_online_map; 78.9 +#endif 78.10 78.11 static inline int cpus_weight(cpumask_t w) 78.12 {
79.1 --- a/xen/include/xen/init.h Tue May 10 13:56:23 2005 +0000 79.2 +++ b/xen/include/xen/init.h Thu May 12 13:07:32 2005 +0000 79.3 @@ -59,13 +59,17 @@ extern initcall_t __initcall_start, __in 79.4 */ 79.5 struct kernel_param { 79.6 const char *name; 79.7 - enum { OPT_STR, OPT_UINT, OPT_UINT_UNIT, OPT_BOOL } type; 79.8 + enum { OPT_STR, OPT_UINT, OPT_BOOL, OPT_CUSTOM } type; 79.9 void *var; 79.10 unsigned int len; 79.11 }; 79.12 79.13 extern struct kernel_param __setup_start, __setup_end; 79.14 79.15 +#define custom_param(_name, _var) \ 79.16 + static char __setup_str_##_var[] __initdata = _name; \ 79.17 + static struct kernel_param __setup_##_var __attribute_used__ \ 79.18 + __initsetup = { __setup_str_##_var, OPT_CUSTOM, &_var, 0 } 79.19 #define boolean_param(_name, _var) \ 79.20 static char __setup_str_##_var[] __initdata = _name; \ 79.21 static struct kernel_param __setup_##_var __attribute_used__ \ 79.22 @@ -74,10 +78,6 @@ extern struct kernel_param __setup_start 79.23 static char __setup_str_##_var[] __initdata = _name; \ 79.24 static struct kernel_param __setup_##_var __attribute_used__ \ 79.25 __initsetup = { __setup_str_##_var, OPT_UINT, &_var, sizeof(_var) } 79.26 -#define integer_unit_param(_name, _var) \ 79.27 - static char __setup_str_##_var[] __initdata = _name; \ 79.28 - static struct kernel_param __setup_##_var __attribute_used__ \ 79.29 - __initsetup = { __setup_str_##_var, OPT_UINT_UNIT, &_var, sizeof(_var) } 79.30 #define string_param(_name, _var) \ 79.31 static char __setup_str_##_var[] __initdata = _name; \ 79.32 static struct kernel_param __setup_##_var __attribute_used__ \
80.1 --- a/xen/include/xen/ioport.h Tue May 10 13:56:23 2005 +0000 80.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 80.3 @@ -1,117 +0,0 @@ 80.4 -/* 80.5 - * ioport.h Definitions of routines for detecting, reserving and 80.6 - * allocating system resources. 80.7 - * 80.8 - * Authors: Linus Torvalds 80.9 - */ 80.10 - 80.11 -#ifndef _LINUX_IOPORT_H 80.12 -#define _LINUX_IOPORT_H 80.13 - 80.14 -/* 80.15 - * Resources are tree-like, allowing 80.16 - * nesting etc.. 80.17 - */ 80.18 -struct resource { 80.19 - const char *name; 80.20 - unsigned long start, end; 80.21 - unsigned long flags; 80.22 - struct resource *parent, *sibling, *child; 80.23 -}; 80.24 - 80.25 -struct resource_list { 80.26 - struct resource_list *next; 80.27 - struct resource *res; 80.28 - struct pci_dev *dev; 80.29 -}; 80.30 - 80.31 -/* 80.32 - * IO resources have these defined flags. 80.33 - */ 80.34 -#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ 80.35 - 80.36 -#define IORESOURCE_IO 0x00000100 /* Resource type */ 80.37 -#define IORESOURCE_MEM 0x00000200 80.38 -#define IORESOURCE_IRQ 0x00000400 80.39 -#define IORESOURCE_DMA 0x00000800 80.40 - 80.41 -#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */ 80.42 -#define IORESOURCE_READONLY 0x00002000 80.43 -#define IORESOURCE_CACHEABLE 0x00004000 80.44 -#define IORESOURCE_RANGELENGTH 0x00008000 80.45 -#define IORESOURCE_SHADOWABLE 0x00010000 80.46 -#define IORESOURCE_BUS_HAS_VGA 0x00080000 80.47 - 80.48 -#define IORESOURCE_UNSET 0x20000000 80.49 -#define IORESOURCE_AUTO 0x40000000 80.50 -#define IORESOURCE_BUSY 0x80000000 /* Driver has marked this resource busy */ 80.51 - 80.52 -/* ISA PnP IRQ specific bits (IORESOURCE_BITS) */ 80.53 -#define IORESOURCE_IRQ_HIGHEDGE (1<<0) 80.54 -#define IORESOURCE_IRQ_LOWEDGE (1<<1) 80.55 -#define IORESOURCE_IRQ_HIGHLEVEL (1<<2) 80.56 -#define IORESOURCE_IRQ_LOWLEVEL (1<<3) 80.57 - 80.58 -/* ISA PnP DMA specific bits (IORESOURCE_BITS) */ 80.59 -#define IORESOURCE_DMA_TYPE_MASK (3<<0) 80.60 -#define IORESOURCE_DMA_8BIT (0<<0) 80.61 -#define IORESOURCE_DMA_8AND16BIT (1<<0) 80.62 -#define IORESOURCE_DMA_16BIT (2<<0) 80.63 - 80.64 -#define IORESOURCE_DMA_MASTER (1<<2) 80.65 -#define IORESOURCE_DMA_BYTE (1<<3) 80.66 -#define IORESOURCE_DMA_WORD (1<<4) 80.67 - 80.68 -#define IORESOURCE_DMA_SPEED_MASK (3<<6) 80.69 -#define IORESOURCE_DMA_COMPATIBLE (0<<6) 80.70 -#define IORESOURCE_DMA_TYPEA (1<<6) 80.71 -#define IORESOURCE_DMA_TYPEB (2<<6) 80.72 -#define IORESOURCE_DMA_TYPEF (3<<6) 80.73 - 80.74 -/* ISA PnP memory I/O specific bits (IORESOURCE_BITS) */ 80.75 -#define IORESOURCE_MEM_WRITEABLE (1<<0) /* dup: IORESOURCE_READONLY */ 80.76 -#define IORESOURCE_MEM_CACHEABLE (1<<1) /* dup: IORESOURCE_CACHEABLE */ 80.77 -#define IORESOURCE_MEM_RANGELENGTH (1<<2) /* dup: IORESOURCE_RANGELENGTH */ 80.78 -#define IORESOURCE_MEM_TYPE_MASK (3<<3) 80.79 -#define IORESOURCE_MEM_8BIT (0<<3) 80.80 -#define IORESOURCE_MEM_16BIT (1<<3) 80.81 -#define IORESOURCE_MEM_8AND16BIT (2<<3) 80.82 -#define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */ 80.83 -#define IORESOURCE_MEM_EXPANSIONROM (1<<6) 80.84 - 80.85 -/* PC/ISA/whatever - the normal PC address spaces: IO and memory */ 80.86 -extern struct resource ioport_resource; 80.87 -extern struct resource iomem_resource; 80.88 - 80.89 -extern int get_resource_list(struct resource *, char *buf, int size); 80.90 - 80.91 -extern int check_resource(struct resource *root, unsigned long, unsigned long); 80.92 -extern int request_resource(struct resource *root, struct resource *new); 80.93 -extern int release_resource(struct resource *new); 80.94 -extern int allocate_resource(struct resource *root, struct resource *new, 80.95 - unsigned long size, 80.96 - unsigned long min, unsigned long max, 80.97 - unsigned long align, 80.98 - void (*alignf)(void *, struct resource *, 80.99 - unsigned long, unsigned long), 80.100 - void *alignf_data); 80.101 - 80.102 -/* Convenience shorthand with allocation */ 80.103 -#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name)) 80.104 -#define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name)) 80.105 - 80.106 -#define release_region(start,n) __release_region(&ioport_resource, (start), (n)) 80.107 -#define release_mem_region(start,n) __release_region(&iomem_resource, (start), (n)) 80.108 - 80.109 -extern void __release_region(struct resource *, unsigned long, unsigned long); 80.110 - 80.111 -extern struct resource * __request_region(struct resource *, unsigned long start, unsigned long n, const char *name); 80.112 - 80.113 -#define get_ioport_list(buf) get_resource_list(&ioport_resource, buf, PAGE_SIZE) 80.114 -#define get_mem_list(buf) get_resource_list(&iomem_resource, buf, PAGE_SIZE) 80.115 - 80.116 -#define HAVE_AUTOIRQ 80.117 -extern void autoirq_setup(int waittime); 80.118 -extern int autoirq_report(int waittime); 80.119 - 80.120 -#endif /* _LINUX_IOPORT_H */
82.1 --- a/xen/include/xen/lib.h Tue May 10 13:56:23 2005 +0000 82.2 +++ b/xen/include/xen/lib.h Thu May 12 13:07:32 2005 +0000 82.3 @@ -57,8 +57,15 @@ extern int snprintf(char * buf, size_t s 82.4 __attribute__ ((format (printf, 3, 4))); 82.5 extern int vsnprintf(char *buf, size_t size, const char *fmt, va_list args); 82.6 82.7 -long simple_strtol(const char *cp,char **endp,unsigned int base); 82.8 -unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base); 82.9 -long long simple_strtoll(const char *cp,char **endp,unsigned int base); 82.10 +long simple_strtol( 82.11 + const char *cp,char **endp, unsigned int base); 82.12 +unsigned long simple_strtoul( 82.13 + const char *cp,char **endp, unsigned int base); 82.14 +long long simple_strtoll( 82.15 + const char *cp,char **endp, unsigned int base); 82.16 +unsigned long long simple_strtoull( 82.17 + const char *cp,char **endp, unsigned int base); 82.18 + 82.19 +unsigned long long memparse(char *s); 82.20 82.21 #endif /* __LIB_H__ */
83.1 --- a/xen/include/xen/pci.h Tue May 10 13:56:23 2005 +0000 83.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 83.3 @@ -1,834 +0,0 @@ 83.4 -/* 83.5 - * $Id: pci.h,v 1.87 1998/10/11 15:13:12 mj Exp $ 83.6 - * 83.7 - * PCI defines and function prototypes 83.8 - * Copyright 1994, Drew Eckhardt 83.9 - * Copyright 1997--1999 Martin Mares <mj@ucw.cz> 83.10 - * 83.11 - * For more information, please consult the following manuals (look at 83.12 - * http://www.pcisig.com/ for how to get them): 83.13 - * 83.14 - * PCI BIOS Specification 83.15 - * PCI Local Bus Specification 83.16 - * PCI to PCI Bridge Specification 83.17 - * PCI System Design Guide 83.18 - */ 83.19 - 83.20 -#ifndef LINUX_PCI_H 83.21 -#define LINUX_PCI_H 83.22 - 83.23 -/* 83.24 - * Under PCI, each device has 256 bytes of configuration address space, 83.25 - * of which the first 64 bytes are standardized as follows: 83.26 - */ 83.27 -#define PCI_VENDOR_ID 0x00 /* 16 bits */ 83.28 -#define PCI_DEVICE_ID 0x02 /* 16 bits */ 83.29 -#define PCI_COMMAND 0x04 /* 16 bits */ 83.30 -#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ 83.31 -#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ 83.32 -#define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */ 83.33 -#define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */ 83.34 -#define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */ 83.35 -#define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */ 83.36 -#define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */ 83.37 -#define PCI_COMMAND_WAIT 0x80 /* Enable address/data stepping */ 83.38 -#define PCI_COMMAND_SERR 0x100 /* Enable SERR */ 83.39 -#define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ 83.40 - 83.41 -#define PCI_STATUS 0x06 /* 16 bits */ 83.42 -#define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */ 83.43 -#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */ 83.44 -#define PCI_STATUS_UDF 0x40 /* Support User Definable Features [obsolete] */ 83.45 -#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ 83.46 -#define PCI_STATUS_PARITY 0x100 /* Detected parity error */ 83.47 -#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ 83.48 -#define PCI_STATUS_DEVSEL_FAST 0x000 83.49 -#define PCI_STATUS_DEVSEL_MEDIUM 0x200 83.50 -#define PCI_STATUS_DEVSEL_SLOW 0x400 83.51 -#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ 83.52 -#define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */ 83.53 -#define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */ 83.54 -#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */ 83.55 -#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */ 83.56 - 83.57 -#define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 83.58 - revision */ 83.59 -#define PCI_REVISION_ID 0x08 /* Revision ID */ 83.60 -#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ 83.61 -#define PCI_CLASS_DEVICE 0x0a /* Device class */ 83.62 - 83.63 -#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ 83.64 -#define PCI_LATENCY_TIMER 0x0d /* 8 bits */ 83.65 -#define PCI_HEADER_TYPE 0x0e /* 8 bits */ 83.66 -#define PCI_HEADER_TYPE_NORMAL 0 83.67 -#define PCI_HEADER_TYPE_BRIDGE 1 83.68 -#define PCI_HEADER_TYPE_CARDBUS 2 83.69 - 83.70 -#define PCI_BIST 0x0f /* 8 bits */ 83.71 -#define PCI_BIST_CODE_MASK 0x0f /* Return result */ 83.72 -#define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */ 83.73 -#define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */ 83.74 - 83.75 -/* 83.76 - * Base addresses specify locations in memory or I/O space. 83.77 - * Decoded size can be determined by writing a value of 83.78 - * 0xffffffff to the register, and reading it back. Only 83.79 - * 1 bits are decoded. 83.80 - */ 83.81 -#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ 83.82 -#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ 83.83 -#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */ 83.84 -#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ 83.85 -#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */ 83.86 -#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ 83.87 -#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */ 83.88 -#define PCI_BASE_ADDRESS_SPACE_IO 0x01 83.89 -#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00 83.90 -#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 83.91 -#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */ 83.92 -#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */ 83.93 -#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */ 83.94 -#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */ 83.95 -#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL) 83.96 -#define PCI_BASE_ADDRESS_IO_MASK (~0x03UL) 83.97 -/* bit 1 is reserved if address_space = 1 */ 83.98 - 83.99 -/* Header type 0 (normal devices) */ 83.100 -#define PCI_CARDBUS_CIS 0x28 83.101 -#define PCI_SUBSYSTEM_VENDOR_ID 0x2c 83.102 -#define PCI_SUBSYSTEM_ID 0x2e 83.103 -#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ 83.104 -#define PCI_ROM_ADDRESS_ENABLE 0x01 83.105 -#define PCI_ROM_ADDRESS_MASK (~0x7ffUL) 83.106 - 83.107 -#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ 83.108 - 83.109 -/* 0x35-0x3b are reserved */ 83.110 -#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ 83.111 -#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ 83.112 -#define PCI_MIN_GNT 0x3e /* 8 bits */ 83.113 -#define PCI_MAX_LAT 0x3f /* 8 bits */ 83.114 - 83.115 -/* Header type 1 (PCI-to-PCI bridges) */ 83.116 -#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ 83.117 -#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ 83.118 -#define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ 83.119 -#define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */ 83.120 -#define PCI_IO_BASE 0x1c /* I/O range behind the bridge */ 83.121 -#define PCI_IO_LIMIT 0x1d 83.122 -#define PCI_IO_RANGE_TYPE_MASK 0x0fUL /* I/O bridging type */ 83.123 -#define PCI_IO_RANGE_TYPE_16 0x00 83.124 -#define PCI_IO_RANGE_TYPE_32 0x01 83.125 -#define PCI_IO_RANGE_MASK (~0x0fUL) 83.126 -#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */ 83.127 -#define PCI_MEMORY_BASE 0x20 /* Memory range behind */ 83.128 -#define PCI_MEMORY_LIMIT 0x22 83.129 -#define PCI_MEMORY_RANGE_TYPE_MASK 0x0fUL 83.130 -#define PCI_MEMORY_RANGE_MASK (~0x0fUL) 83.131 -#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */ 83.132 -#define PCI_PREF_MEMORY_LIMIT 0x26 83.133 -#define PCI_PREF_RANGE_TYPE_MASK 0x0fUL 83.134 -#define PCI_PREF_RANGE_TYPE_32 0x00 83.135 -#define PCI_PREF_RANGE_TYPE_64 0x01 83.136 -#define PCI_PREF_RANGE_MASK (~0x0fUL) 83.137 -#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ 83.138 -#define PCI_PREF_LIMIT_UPPER32 0x2c 83.139 -#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */ 83.140 -#define PCI_IO_LIMIT_UPPER16 0x32 83.141 -/* 0x34 same as for htype 0 */ 83.142 -/* 0x35-0x3b is reserved */ 83.143 -#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */ 83.144 -/* 0x3c-0x3d are same as for htype 0 */ 83.145 -#define PCI_BRIDGE_CONTROL 0x3e 83.146 -#define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ 83.147 -#define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ 83.148 -#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ 83.149 -#define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ 83.150 -#define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ 83.151 -#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ 83.152 -#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */ 83.153 - 83.154 -/* Header type 2 (CardBus bridges) */ 83.155 -#define PCI_CB_CAPABILITY_LIST 0x14 83.156 -/* 0x15 reserved */ 83.157 -#define PCI_CB_SEC_STATUS 0x16 /* Secondary status */ 83.158 -#define PCI_CB_PRIMARY_BUS 0x18 /* PCI bus number */ 83.159 -#define PCI_CB_CARD_BUS 0x19 /* CardBus bus number */ 83.160 -#define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */ 83.161 -#define PCI_CB_LATENCY_TIMER 0x1b /* CardBus latency timer */ 83.162 -#define PCI_CB_MEMORY_BASE_0 0x1c 83.163 -#define PCI_CB_MEMORY_LIMIT_0 0x20 83.164 -#define PCI_CB_MEMORY_BASE_1 0x24 83.165 -#define PCI_CB_MEMORY_LIMIT_1 0x28 83.166 -#define PCI_CB_IO_BASE_0 0x2c 83.167 -#define PCI_CB_IO_BASE_0_HI 0x2e 83.168 -#define PCI_CB_IO_LIMIT_0 0x30 83.169 -#define PCI_CB_IO_LIMIT_0_HI 0x32 83.170 -#define PCI_CB_IO_BASE_1 0x34 83.171 -#define PCI_CB_IO_BASE_1_HI 0x36 83.172 -#define PCI_CB_IO_LIMIT_1 0x38 83.173 -#define PCI_CB_IO_LIMIT_1_HI 0x3a 83.174 -#define PCI_CB_IO_RANGE_MASK (~0x03UL) 83.175 -/* 0x3c-0x3d are same as for htype 0 */ 83.176 -#define PCI_CB_BRIDGE_CONTROL 0x3e 83.177 -#define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge control register */ 83.178 -#define PCI_CB_BRIDGE_CTL_SERR 0x02 83.179 -#define PCI_CB_BRIDGE_CTL_ISA 0x04 83.180 -#define PCI_CB_BRIDGE_CTL_VGA 0x08 83.181 -#define PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20 83.182 -#define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */ 83.183 -#define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for 16-bit cards */ 83.184 -#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 /* Prefetch enable for both memory regions */ 83.185 -#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200 83.186 -#define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400 83.187 -#define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40 83.188 -#define PCI_CB_SUBSYSTEM_ID 0x42 83.189 -#define PCI_CB_LEGACY_MODE_BASE 0x44 /* 16-bit PC Card legacy mode base address (ExCa) */ 83.190 -/* 0x48-0x7f reserved */ 83.191 - 83.192 -/* Capability lists */ 83.193 - 83.194 -#define PCI_CAP_LIST_ID 0 /* Capability ID */ 83.195 -#define PCI_CAP_ID_PM 0x01 /* Power Management */ 83.196 -#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ 83.197 -#define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */ 83.198 -#define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */ 83.199 -#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */ 83.200 -#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ 83.201 -#define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ 83.202 -#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ 83.203 -#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ 83.204 -#define PCI_CAP_SIZEOF 4 83.205 - 83.206 -/* Power Management Registers */ 83.207 - 83.208 -#define PCI_PM_PMC 2 /* PM Capabilities Register */ 83.209 -#define PCI_PM_CAP_VER_MASK 0x0007 /* Version */ 83.210 -#define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */ 83.211 -#define PCI_PM_CAP_RESERVED 0x0010 /* Reserved field */ 83.212 -#define PCI_PM_CAP_DSI 0x0020 /* Device specific initialization */ 83.213 -#define PCI_PM_CAP_AUX_POWER 0x01C0 /* Auxilliary power support mask */ 83.214 -#define PCI_PM_CAP_D1 0x0200 /* D1 power state support */ 83.215 -#define PCI_PM_CAP_D2 0x0400 /* D2 power state support */ 83.216 -#define PCI_PM_CAP_PME 0x0800 /* PME pin supported */ 83.217 -#define PCI_PM_CAP_PME_MASK 0xF800 /* PME Mask of all supported states */ 83.218 -#define PCI_PM_CAP_PME_D0 0x0800 /* PME# from D0 */ 83.219 -#define PCI_PM_CAP_PME_D1 0x1000 /* PME# from D1 */ 83.220 -#define PCI_PM_CAP_PME_D2 0x2000 /* PME# from D2 */ 83.221 -#define PCI_PM_CAP_PME_D3 0x4000 /* PME# from D3 (hot) */ 83.222 -#define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */ 83.223 -#define PCI_PM_CTRL 4 /* PM control and status register */ 83.224 -#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ 83.225 -#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */ 83.226 -#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */ 83.227 -#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */ 83.228 -#define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */ 83.229 -#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (??) */ 83.230 -#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (??) */ 83.231 -#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */ 83.232 -#define PCI_PM_DATA_REGISTER 7 /* (??) */ 83.233 -#define PCI_PM_SIZEOF 8 83.234 - 83.235 -/* AGP registers */ 83.236 - 83.237 -#define PCI_AGP_VERSION 2 /* BCD version number */ 83.238 -#define PCI_AGP_RFU 3 /* Rest of capability flags */ 83.239 -#define PCI_AGP_STATUS 4 /* Status register */ 83.240 -#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */ 83.241 -#define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */ 83.242 -#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */ 83.243 -#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */ 83.244 -#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */ 83.245 -#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */ 83.246 -#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */ 83.247 -#define PCI_AGP_COMMAND 8 /* Control register */ 83.248 -#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */ 83.249 -#define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */ 83.250 -#define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */ 83.251 -#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */ 83.252 -#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */ 83.253 -#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */ 83.254 -#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 2x rate */ 83.255 -#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 1x rate */ 83.256 -#define PCI_AGP_SIZEOF 12 83.257 - 83.258 -/* Slot Identification */ 83.259 - 83.260 -#define PCI_SID_ESR 2 /* Expansion Slot Register */ 83.261 -#define PCI_SID_ESR_NSLOTS 0x1f /* Number of expansion slots available */ 83.262 -#define PCI_SID_ESR_FIC 0x20 /* First In Chassis Flag */ 83.263 -#define PCI_SID_CHASSIS_NR 3 /* Chassis Number */ 83.264 - 83.265 -/* Message Signalled Interrupts registers */ 83.266 - 83.267 -#define PCI_MSI_FLAGS 2 /* Various flags */ 83.268 -#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */ 83.269 -#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */ 83.270 -#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */ 83.271 -#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */ 83.272 -#define PCI_MSI_RFU 3 /* Rest of capability flags */ 83.273 -#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */ 83.274 -#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */ 83.275 -#define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */ 83.276 -#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ 83.277 - 83.278 -/* CompactPCI Hotswap Register */ 83.279 - 83.280 -#define PCI_CHSWP_CSR 2 /* Control and Status Register */ 83.281 -#define PCI_CHSWP_DHA 0x01 /* Device Hiding Arm */ 83.282 -#define PCI_CHSWP_EIM 0x02 /* ENUM# Signal Mask */ 83.283 -#define PCI_CHSWP_PIE 0x04 /* Pending Insert or Extract */ 83.284 -#define PCI_CHSWP_LOO 0x08 /* LED On / Off */ 83.285 -#define PCI_CHSWP_PI 0x30 /* Programming Interface */ 83.286 -#define PCI_CHSWP_EXT 0x40 /* ENUM# status - extraction */ 83.287 -#define PCI_CHSWP_INS 0x80 /* ENUM# status - insertion */ 83.288 - 83.289 -/* PCI-X registers */ 83.290 - 83.291 -#define PCI_X_CMD 2 /* Modes & Features */ 83.292 -#define PCI_X_CMD_DPERR_E 0x0001 /* Data Parity Error Recovery Enable */ 83.293 -#define PCI_X_CMD_ERO 0x0002 /* Enable Relaxed Ordering */ 83.294 -#define PCI_X_CMD_MAX_READ 0x000c /* Max Memory Read Byte Count */ 83.295 -#define PCI_X_CMD_MAX_SPLIT 0x0070 /* Max Outstanding Split Transactions */ 83.296 -#define PCI_X_DEVFN 4 /* A copy of devfn. */ 83.297 -#define PCI_X_BUSNR 5 /* Bus segment number */ 83.298 -#define PCI_X_STATUS 6 /* PCI-X capabilities */ 83.299 -#define PCI_X_STATUS_64BIT 0x0001 /* 64-bit device */ 83.300 -#define PCI_X_STATUS_133MHZ 0x0002 /* 133 MHz capable */ 83.301 -#define PCI_X_STATUS_SPL_DISC 0x0004 /* Split Completion Discarded */ 83.302 -#define PCI_X_STATUS_UNX_SPL 0x0008 /* Unexpected Split Completion */ 83.303 -#define PCI_X_STATUS_COMPLEX 0x0010 /* Device Complexity */ 83.304 -#define PCI_X_STATUS_MAX_READ 0x0060 /* Designed Maximum Memory Read Count */ 83.305 -#define PCI_X_STATUS_MAX_SPLIT 0x0380 /* Design Max Outstanding Split Trans */ 83.306 -#define PCI_X_STATUS_MAX_CUM 0x1c00 /* Designed Max Cumulative Read Size */ 83.307 -#define PCI_X_STATUS_SPL_ERR 0x2000 /* Rcvd Split Completion Error Msg */ 83.308 - 83.309 -/* Include the ID list */ 83.310 - 83.311 -#include <xen/pci_ids.h> 83.312 - 83.313 -/* 83.314 - * The PCI interface treats multi-function devices as independent 83.315 - * devices. The slot/function address of each device is encoded 83.316 - * in a single byte as follows: 83.317 - * 83.318 - * 7:3 = slot 83.319 - * 2:0 = function 83.320 - */ 83.321 -#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 83.322 -#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 83.323 -#define PCI_FUNC(devfn) ((devfn) & 0x07) 83.324 - 83.325 -/* Ioctls for /proc/bus/pci/X/Y nodes. */ 83.326 -#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) 83.327 -#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ 83.328 -#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ 83.329 -#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ 83.330 -#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ 83.331 - 83.332 -#include <xen/types.h> 83.333 -#include <xen/config.h> 83.334 -#include <xen/ioport.h> 83.335 -#include <xen/list.h> 83.336 -#include <xen/errno.h> 83.337 - 83.338 -/* File state for mmap()s on /proc/bus/pci/X/Y */ 83.339 -enum pci_mmap_state { 83.340 - pci_mmap_io, 83.341 - pci_mmap_mem 83.342 -}; 83.343 - 83.344 -/* This defines the direction arg to the DMA mapping routines. */ 83.345 -#define PCI_DMA_BIDIRECTIONAL 0 83.346 -#define PCI_DMA_TODEVICE 1 83.347 -#define PCI_DMA_FROMDEVICE 2 83.348 -#define PCI_DMA_NONE 3 83.349 - 83.350 -#define DEVICE_COUNT_COMPATIBLE 4 83.351 -#define DEVICE_COUNT_IRQ 2 83.352 -#define DEVICE_COUNT_DMA 2 83.353 -#define DEVICE_COUNT_RESOURCE 12 83.354 - 83.355 -#define PCI_ANY_ID (~0) 83.356 - 83.357 -#define pci_present pcibios_present 83.358 - 83.359 - 83.360 -#define pci_for_each_dev_reverse(dev) \ 83.361 - for(dev = pci_dev_g(pci_devices.prev); dev != pci_dev_g(&pci_devices); dev = pci_dev_g(dev->global_list.prev)) 83.362 - 83.363 -#define pci_for_each_bus(bus) \ 83.364 - list_for_each_entry(bus, &pci_root_buses, node) 83.365 - 83.366 -/* 83.367 - * The pci_dev structure is used to describe both PCI and ISAPnP devices. 83.368 - */ 83.369 -struct pci_dev { 83.370 - struct list_head global_list; /* node in list of all PCI devices */ 83.371 - struct list_head bus_list; /* node in per-bus list */ 83.372 - struct pci_bus *bus; /* bus this device is on */ 83.373 - struct pci_bus *subordinate; /* bus this device bridges to */ 83.374 - 83.375 - void *sysdata; /* hook for sys-specific extension */ 83.376 - struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ 83.377 - 83.378 - unsigned int devfn; /* encoded device & function index */ 83.379 - unsigned short vendor; 83.380 - unsigned short device; 83.381 - unsigned short subsystem_vendor; 83.382 - unsigned short subsystem_device; 83.383 - unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 83.384 - u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 83.385 - u8 rom_base_reg; /* which config register controls the ROM */ 83.386 - 83.387 - struct pci_driver *driver; /* which driver has allocated this device */ 83.388 - void *driver_data; /* data private to the driver */ 83.389 - u64 dma_mask; /* Mask of the bits of bus address this 83.390 - device implements. Normally this is 83.391 - 0xffffffff. You only need to change 83.392 - this if your device has broken DMA 83.393 - or supports 64-bit transfers. */ 83.394 - 83.395 - u32 current_state; /* Current operating state. In ACPI-speak, 83.396 - this is D0-D3, D0 being fully functional, 83.397 - and D3 being off. */ 83.398 - 83.399 -#ifdef LINUX_2_6 83.400 - struct device dev; /* Generic device interface */ 83.401 -#endif 83.402 - 83.403 - /* device is compatible with these IDs */ 83.404 - unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE]; 83.405 - unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE]; 83.406 - 83.407 - /* 83.408 - * Instead of touching interrupt line and base address registers 83.409 - * directly, use the values stored here. They might be different! 83.410 - */ 83.411 - unsigned int irq; 83.412 - struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ 83.413 - struct resource dma_resource[DEVICE_COUNT_DMA]; 83.414 - struct resource irq_resource[DEVICE_COUNT_IRQ]; 83.415 - 83.416 - char name[90]; /* device name */ 83.417 - char slot_name[8]; /* slot name */ 83.418 - int active; /* ISAPnP: device is active */ 83.419 - int ro; /* ISAPnP: read only */ 83.420 - unsigned short regs; /* ISAPnP: supported registers */ 83.421 - 83.422 - /* These fields are used by common fixups */ 83.423 - unsigned short transparent:1; /* Transparent PCI bridge */ 83.424 - 83.425 - int (*prepare)(struct pci_dev *dev); /* ISAPnP hooks */ 83.426 - int (*activate)(struct pci_dev *dev); 83.427 - int (*deactivate)(struct pci_dev *dev); 83.428 -}; 83.429 - 83.430 -#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list) 83.431 -#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) 83.432 - 83.433 -/* 83.434 - * For PCI devices, the region numbers are assigned this way: 83.435 - * 83.436 - * 0-5 standard PCI regions 83.437 - * 6 expansion ROM 83.438 - * 7-10 bridges: address space assigned to buses behind the bridge 83.439 - */ 83.440 - 83.441 -#define PCI_ROM_RESOURCE 6 83.442 -#define PCI_BRIDGE_RESOURCES 7 83.443 -#define PCI_NUM_RESOURCES 11 83.444 - 83.445 -#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ 83.446 - 83.447 -struct pci_bus { 83.448 - struct list_head node; /* node in list of buses */ 83.449 - struct pci_bus *parent; /* parent bus this bridge is on */ 83.450 - struct list_head children; /* list of child buses */ 83.451 - struct list_head devices; /* list of devices on this bus */ 83.452 - struct pci_dev *self; /* bridge device as seen by parent */ 83.453 - struct resource *resource[4]; /* address space routed to this bus */ 83.454 - 83.455 - struct pci_ops *ops; /* configuration access functions */ 83.456 - void *sysdata; /* hook for sys-specific extension */ 83.457 - struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ 83.458 - 83.459 - unsigned char number; /* bus number */ 83.460 - unsigned char primary; /* number of primary bridge */ 83.461 - unsigned char secondary; /* number of secondary bridge */ 83.462 - unsigned char subordinate; /* max number of subordinate buses */ 83.463 - 83.464 - char name[48]; 83.465 - unsigned short vendor; 83.466 - unsigned short device; 83.467 - unsigned int serial; /* serial number */ 83.468 - unsigned char pnpver; /* Plug & Play version */ 83.469 - unsigned char productver; /* product version */ 83.470 - unsigned char checksum; /* if zero - checksum passed */ 83.471 - unsigned char pad1; 83.472 -}; 83.473 - 83.474 -#define pci_bus_b(n) list_entry(n, struct pci_bus, node) 83.475 - 83.476 -extern struct list_head pci_root_buses; /* list of all known PCI buses */ 83.477 -extern struct list_head pci_devices; /* list of all devices */ 83.478 - 83.479 -extern struct proc_dir_entry *proc_bus_pci_dir; 83.480 -/* 83.481 - * Error values that may be returned by PCI functions. 83.482 - */ 83.483 -#define PCIBIOS_SUCCESSFUL 0x00 83.484 -#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 83.485 -#define PCIBIOS_BAD_VENDOR_ID 0x83 83.486 -#define PCIBIOS_DEVICE_NOT_FOUND 0x86 83.487 -#define PCIBIOS_BAD_REGISTER_NUMBER 0x87 83.488 -#define PCIBIOS_SET_FAILED 0x88 83.489 -#define PCIBIOS_BUFFER_TOO_SMALL 0x89 83.490 - 83.491 -/* Low-level architecture-dependent routines */ 83.492 - 83.493 -struct pci_ops { 83.494 - int (*read_byte)(struct pci_dev *, int where, u8 *val); 83.495 - int (*read_word)(struct pci_dev *, int where, u16 *val); 83.496 - int (*read_dword)(struct pci_dev *, int where, u32 *val); 83.497 - int (*write_byte)(struct pci_dev *, int where, u8 val); 83.498 - int (*write_word)(struct pci_dev *, int where, u16 val); 83.499 - int (*write_dword)(struct pci_dev *, int where, u32 val); 83.500 -}; 83.501 - 83.502 -struct pbus_set_ranges_data 83.503 -{ 83.504 - unsigned long io_start, io_end; 83.505 - unsigned long mem_start, mem_end; 83.506 - unsigned long prefetch_start, prefetch_end; 83.507 -}; 83.508 - 83.509 -struct pci_device_id { 83.510 - unsigned int vendor, device; /* Vendor and device ID or PCI_ANY_ID */ 83.511 - unsigned int subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */ 83.512 - unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */ 83.513 - unsigned long driver_data; /* Data private to the driver */ 83.514 -}; 83.515 - 83.516 -struct pci_driver { 83.517 - struct list_head node; 83.518 - char *name; 83.519 - const struct pci_device_id *id_table; /* NULL if wants all devices */ 83.520 - int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ 83.521 - void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ 83.522 - int (*save_state) (struct pci_dev *dev, u32 state); /* Save Device Context */ 83.523 - int (*suspend) (struct pci_dev *dev, u32 state); /* Device suspended */ 83.524 - int (*resume) (struct pci_dev *dev); /* Device woken up */ 83.525 - int (*enable_wake) (struct pci_dev *dev, u32 state, int enable); /* Enable wake event */ 83.526 -}; 83.527 - 83.528 -/** 83.529 - * PCI_DEVICE - macro used to describe a specific pci device 83.530 - * @vend: the 16 bit PCI Vendor ID 83.531 - * @dev: the 16 bit PCI Device ID 83.532 - * 83.533 - * This macro is used to create a struct pci_device_id that matches a 83.534 - * specific device. The subvendor and subdevice fields will be set to 83.535 - * PCI_ANY_ID. 83.536 - */ 83.537 -#define PCI_DEVICE(vend,dev) \ 83.538 - .vendor = (vend), .device = (dev), \ 83.539 - .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 83.540 - 83.541 -/** 83.542 - * PCI_DEVICE_CLASS - macro used to describe a specific pci device class 83.543 - * @dev_class: the class, subclass, prog-if triple for this device 83.544 - * @dev_class_mask: the class mask for this device 83.545 - * 83.546 - * This macro is used to create a struct pci_device_id that matches a 83.547 - * specific PCI class. The vendor, device, subvendor, and subdevice 83.548 - * fields will be set to PCI_ANY_ID. 83.549 - */ 83.550 -#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ 83.551 - .class = (dev_class), .class_mask = (dev_class_mask), \ 83.552 - .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ 83.553 - .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 83.554 - 83.555 -/* these external functions are only available when PCI support is enabled */ 83.556 -#ifdef CONFIG_PCI 83.557 - 83.558 -#define pci_for_each_dev(dev) \ 83.559 - for(dev = pci_dev_g(pci_devices.next); dev != pci_dev_g(&pci_devices); dev = pci_dev_g(dev->global_list.next)) 83.560 - 83.561 -void pcibios_init(void); 83.562 -void pcibios_fixup_bus(struct pci_bus *); 83.563 -int pcibios_enable_device(struct pci_dev *, int mask); 83.564 -char *pcibios_setup (char *str); 83.565 - 83.566 -/* Used only when drivers/pci/setup.c is used */ 83.567 -void pcibios_align_resource(void *, struct resource *, 83.568 - unsigned long, unsigned long); 83.569 -void pcibios_update_resource(struct pci_dev *, struct resource *, 83.570 - struct resource *, int); 83.571 -void pcibios_update_irq(struct pci_dev *, int irq); 83.572 -void pcibios_fixup_pbus_ranges(struct pci_bus *, struct pbus_set_ranges_data *); 83.573 - 83.574 -/* Backward compatibility, don't use in new code! */ 83.575 - 83.576 -int pcibios_present(void); 83.577 -int pcibios_read_config_byte (unsigned char bus, unsigned char dev_fn, 83.578 - unsigned char where, unsigned char *val); 83.579 -int pcibios_read_config_word (unsigned char bus, unsigned char dev_fn, 83.580 - unsigned char where, unsigned short *val); 83.581 -int pcibios_read_config_dword (unsigned char bus, unsigned char dev_fn, 83.582 - unsigned char where, unsigned int *val); 83.583 -int pcibios_write_config_byte (unsigned char bus, unsigned char dev_fn, 83.584 - unsigned char where, unsigned char val); 83.585 -int pcibios_write_config_word (unsigned char bus, unsigned char dev_fn, 83.586 - unsigned char where, unsigned short val); 83.587 -int pcibios_write_config_dword (unsigned char bus, unsigned char dev_fn, 83.588 - unsigned char where, unsigned int val); 83.589 -int pcibios_find_class (unsigned int class_code, unsigned short index, unsigned char *bus, unsigned char *dev_fn); 83.590 -int pcibios_find_device (unsigned short vendor, unsigned short dev_id, 83.591 - unsigned short index, unsigned char *bus, 83.592 - unsigned char *dev_fn); 83.593 - 83.594 -/* Generic PCI functions used internally */ 83.595 - 83.596 -void pci_init(void); 83.597 -int pci_bus_exists(const struct list_head *list, int nr); 83.598 -struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata); 83.599 -struct pci_bus *pci_alloc_primary_bus(int bus); 83.600 -struct pci_dev *pci_scan_slot(struct pci_dev *temp); 83.601 -int pci_proc_attach_device(struct pci_dev *dev); 83.602 -int pci_proc_detach_device(struct pci_dev *dev); 83.603 -int pci_proc_attach_bus(struct pci_bus *bus); 83.604 -int pci_proc_detach_bus(struct pci_bus *bus); 83.605 -void pci_name_device(struct pci_dev *dev); 83.606 -char *pci_class_name(u32 class); 83.607 -void pci_read_bridge_bases(struct pci_bus *child); 83.608 -struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res); 83.609 -int pci_setup_device(struct pci_dev *dev); 83.610 -int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); 83.611 - 83.612 -/* Generic PCI functions exported to card drivers */ 83.613 - 83.614 -struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from); 83.615 -struct pci_dev *pci_find_subsys (unsigned int vendor, unsigned int device, 83.616 - unsigned int ss_vendor, unsigned int ss_device, 83.617 - const struct pci_dev *from); 83.618 -struct pci_dev *pci_find_class (unsigned int class, const struct pci_dev *from); 83.619 -struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn); 83.620 -int pci_find_capability (struct pci_dev *dev, int cap); 83.621 - 83.622 -int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val); 83.623 -int pci_read_config_word(struct pci_dev *dev, int where, u16 *val); 83.624 -int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val); 83.625 -int pci_write_config_byte(struct pci_dev *dev, int where, u8 val); 83.626 -int pci_write_config_word(struct pci_dev *dev, int where, u16 val); 83.627 -int pci_write_config_dword(struct pci_dev *dev, int where, u32 val); 83.628 - 83.629 -int pci_enable_device(struct pci_dev *dev); 83.630 -int pci_enable_device_bars(struct pci_dev *dev, int mask); 83.631 -void pci_disable_device(struct pci_dev *dev); 83.632 -void pci_set_master(struct pci_dev *dev); 83.633 -#define HAVE_PCI_SET_MWI 83.634 -int pci_set_mwi(struct pci_dev *dev); 83.635 -void pci_clear_mwi(struct pci_dev *dev); 83.636 -int pci_set_dma_mask(struct pci_dev *dev, u64 mask); 83.637 -int pci_dac_set_dma_mask(struct pci_dev *dev, u64 mask); 83.638 -int pci_assign_resource(struct pci_dev *dev, int i); 83.639 - 83.640 -/* Power management related routines */ 83.641 -int pci_save_state(struct pci_dev *dev, u32 *buffer); 83.642 -int pci_restore_state(struct pci_dev *dev, u32 *buffer); 83.643 -int pci_set_power_state(struct pci_dev *dev, int state); 83.644 -int pci_enable_wake(struct pci_dev *dev, u32 state, int enable); 83.645 - 83.646 -/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ 83.647 - 83.648 -int pci_claim_resource(struct pci_dev *, int); 83.649 -void pci_assign_unassigned_resources(void); 83.650 -void pdev_enable_device(struct pci_dev *); 83.651 -void pdev_sort_resources(struct pci_dev *, struct resource_list *); 83.652 -unsigned long pci_bridge_check_io(struct pci_dev *); 83.653 -void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), 83.654 - int (*)(struct pci_dev *, u8, u8)); 83.655 -#define HAVE_PCI_REQ_REGIONS 2 83.656 -int pci_request_regions(struct pci_dev *, char *); 83.657 -void pci_release_regions(struct pci_dev *); 83.658 -int pci_request_region(struct pci_dev *, int, char *); 83.659 -void pci_release_region(struct pci_dev *, int); 83.660 - 83.661 -/* New-style probing supporting hot-pluggable devices */ 83.662 -int pci_register_driver(struct pci_driver *); 83.663 -void pci_unregister_driver(struct pci_driver *); 83.664 -void pci_insert_device(struct pci_dev *, struct pci_bus *); 83.665 -void pci_remove_device(struct pci_dev *); 83.666 -struct pci_driver *pci_dev_driver(const struct pci_dev *); 83.667 -const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev); 83.668 -void pci_announce_device_to_drivers(struct pci_dev *); 83.669 -unsigned int pci_do_scan_bus(struct pci_bus *bus); 83.670 -struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr); 83.671 - 83.672 -#if 0 83.673 -/* xmem_cache style wrapper around pci_alloc_consistent() */ 83.674 -struct pci_pool *pci_pool_create (const char *name, struct pci_dev *dev, 83.675 - size_t size, size_t align, size_t allocation, int flags); 83.676 -void pci_pool_destroy (struct pci_pool *pool); 83.677 - 83.678 -void *pci_pool_alloc (struct pci_pool *pool, int flags, dma_addr_t *handle); 83.679 -void pci_pool_free (struct pci_pool *pool, void *vaddr, dma_addr_t addr); 83.680 -#endif 83.681 - 83.682 -#endif /* CONFIG_PCI */ 83.683 - 83.684 -/* 83.685 - * If the system does not have PCI, clearly these return errors. Define 83.686 - * these as simple inline functions to avoid hair in drivers. 83.687 - */ 83.688 - 83.689 -#ifndef CONFIG_PCI 83.690 -static inline int pcibios_present(void) { return 0; } 83.691 -static inline int pcibios_find_class (unsigned int class_code, unsigned short index, unsigned char *bus, unsigned char *dev_fn) 83.692 -{ return PCIBIOS_DEVICE_NOT_FOUND; } 83.693 - 83.694 -#define _PCI_NOP(o,s,t) \ 83.695 - static inline int pcibios_##o##_config_##s (u8 bus, u8 dfn, u8 where, t val) \ 83.696 - { return PCIBIOS_FUNC_NOT_SUPPORTED; } \ 83.697 - static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \ 83.698 - { return PCIBIOS_FUNC_NOT_SUPPORTED; } 83.699 -#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \ 83.700 - _PCI_NOP(o,word,u16 x) \ 83.701 - _PCI_NOP(o,dword,u32 x) 83.702 -_PCI_NOP_ALL(read, *) 83.703 -_PCI_NOP_ALL(write,) 83.704 - 83.705 -static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from) 83.706 -{ return NULL; } 83.707 - 83.708 -static inline struct pci_dev *pci_find_class(unsigned int class, const struct pci_dev *from) 83.709 -{ return NULL; } 83.710 - 83.711 -static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn) 83.712 -{ return NULL; } 83.713 - 83.714 -static inline struct pci_dev *pci_find_subsys(unsigned int vendor, unsigned int device, 83.715 -unsigned int ss_vendor, unsigned int ss_device, const struct pci_dev *from) 83.716 -{ return NULL; } 83.717 - 83.718 -static inline void pci_set_master(struct pci_dev *dev) { } 83.719 -static inline int pci_enable_device_bars(struct pci_dev *dev, int mask) { return -EBUSY; } 83.720 -static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; } 83.721 -static inline void pci_disable_device(struct pci_dev *dev) { } 83.722 -static inline int pci_module_init(struct pci_driver *drv) { return -ENODEV; } 83.723 -static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; } 83.724 -static inline int pci_dac_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; } 83.725 -static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;} 83.726 -static inline int pci_register_driver(struct pci_driver *drv) { return 0;} 83.727 -static inline void pci_unregister_driver(struct pci_driver *drv) { } 83.728 -static inline int scsi_to_pci_dma_dir(unsigned char scsi_dir) { return scsi_dir; } 83.729 -static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; } 83.730 -static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; } 83.731 - 83.732 -/* Power management related routines */ 83.733 -static inline int pci_save_state(struct pci_dev *dev, u32 *buffer) { return 0; } 83.734 -static inline int pci_restore_state(struct pci_dev *dev, u32 *buffer) { return 0; } 83.735 -static inline int pci_set_power_state(struct pci_dev *dev, int state) { return 0; } 83.736 -static inline int pci_enable_wake(struct pci_dev *dev, u32 state, int enable) { return 0; } 83.737 - 83.738 -#define pci_for_each_dev(dev) \ 83.739 - for(dev = NULL; 0; ) 83.740 - 83.741 -#else 83.742 - 83.743 -/* 83.744 - * a helper function which helps ensure correct pci_driver 83.745 - * setup and cleanup for commonly-encountered hotplug/modular cases 83.746 - * 83.747 - * This MUST stay in a header, as it checks for -DMODULE 83.748 - */ 83.749 -static inline int pci_module_init(struct pci_driver *drv) 83.750 -{ 83.751 - int rc = pci_register_driver (drv); 83.752 - 83.753 - if (rc > 0) 83.754 - return 0; 83.755 - 83.756 - /* iff CONFIG_HOTPLUG and built into kernel, we should 83.757 - * leave the driver around for future hotplug events. 83.758 - * For the module case, a hotplug daemon of some sort 83.759 - * should load a module in response to an insert event. */ 83.760 -#if defined(CONFIG_HOTPLUG) && !defined(MODULE) 83.761 - if (rc == 0) 83.762 - return 0; 83.763 -#else 83.764 - if (rc == 0) 83.765 - rc = -ENODEV; 83.766 -#endif 83.767 - 83.768 - /* if we get here, we need to clean up pci driver instance 83.769 - * and return some sort of error */ 83.770 - pci_unregister_driver (drv); 83.771 - 83.772 - return rc; 83.773 -} 83.774 - 83.775 -#endif /* !CONFIG_PCI */ 83.776 - 83.777 -/* these helpers provide future and backwards compatibility 83.778 - * for accessing popular PCI BAR info */ 83.779 -#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start) 83.780 -#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end) 83.781 -#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags) 83.782 -#define pci_resource_len(dev,bar) \ 83.783 - ((pci_resource_start((dev),(bar)) == 0 && \ 83.784 - pci_resource_end((dev),(bar)) == \ 83.785 - pci_resource_start((dev),(bar))) ? 0 : \ 83.786 - \ 83.787 - (pci_resource_end((dev),(bar)) - \ 83.788 - pci_resource_start((dev),(bar)) + 1)) 83.789 - 83.790 -/* Similar to the helpers above, these manipulate per-pci_dev 83.791 - * driver-specific data. Currently stored as pci_dev::driver_data, 83.792 - * a void pointer, but it is not present on older kernels. 83.793 - */ 83.794 -static inline void *pci_get_drvdata (struct pci_dev *pdev) 83.795 -{ 83.796 - return pdev->driver_data; 83.797 -} 83.798 - 83.799 -static inline void pci_set_drvdata (struct pci_dev *pdev, void *data) 83.800 -{ 83.801 - pdev->driver_data = data; 83.802 -} 83.803 - 83.804 -static inline char *pci_name(struct pci_dev *pdev) 83.805 -{ 83.806 - return pdev->slot_name; 83.807 -} 83.808 - 83.809 -/* 83.810 - * The world is not perfect and supplies us with broken PCI devices. 83.811 - * For at least a part of these bugs we need a work-around, so both 83.812 - * generic (drivers/pci/quirks.c) and per-architecture code can define 83.813 - * fixup hooks to be called for particular buggy devices. 83.814 - */ 83.815 - 83.816 -struct pci_fixup { 83.817 - int pass; 83.818 - u16 vendor, device; /* You can use PCI_ANY_ID here of course */ 83.819 - void (*hook)(struct pci_dev *dev); 83.820 -}; 83.821 - 83.822 -extern struct pci_fixup pcibios_fixups[]; 83.823 - 83.824 -#define PCI_FIXUP_HEADER 1 /* Called immediately after reading configuration header */ 83.825 -#define PCI_FIXUP_FINAL 2 /* Final phase of device fixups */ 83.826 - 83.827 -void pci_fixup_device(int pass, struct pci_dev *dev); 83.828 - 83.829 -extern int pci_pci_problems; 83.830 -#define PCIPCI_FAIL 1 83.831 -#define PCIPCI_TRITON 2 83.832 -#define PCIPCI_NATOMA 4 83.833 -#define PCIPCI_VIAETBF 8 83.834 -#define PCIPCI_VSFX 16 83.835 -#define PCIPCI_ALIMAGIK 32 83.836 - 83.837 -#endif /* LINUX_PCI_H */
84.1 --- a/xen/include/xen/sched.h Tue May 10 13:56:23 2005 +0000 84.2 +++ b/xen/include/xen/sched.h Thu May 12 13:07:32 2005 +0000 84.3 @@ -58,6 +58,8 @@ int init_event_channels(struct domain * 84.4 void destroy_event_channels(struct domain *d); 84.5 int init_exec_domain_event_channels(struct exec_domain *ed); 84.6 84.7 +#define CPUMAP_RUNANYWHERE 0xFFFFFFFF 84.8 + 84.9 struct exec_domain 84.10 { 84.11 int id; 84.12 @@ -84,6 +86,8 @@ struct exec_domain 84.13 84.14 atomic_t pausecnt; 84.15 84.16 + cpumap_t cpumap; /* which cpus this domain can run on */ 84.17 + 84.18 struct arch_exec_domain arch; 84.19 }; 84.20
85.1 --- a/xen/include/xen/slab.h Tue May 10 13:56:23 2005 +0000 85.2 +++ b/xen/include/xen/slab.h Thu May 12 13:07:32 2005 +0000 85.3 @@ -3,12 +3,7 @@ 85.4 #define __SLAB_H__ 85.5 85.6 #include <xen/config.h> 85.7 - 85.8 -#ifdef __ARCH_HAS_SLAB_ALLOCATOR 85.9 - 85.10 -#include <asm/slab.h> 85.11 - 85.12 -#else 85.13 +#include <xen/mm.h> 85.14 85.15 /* Allocate space for typed object. */ 85.16 #define xmalloc(_type) ((_type *)_xmalloc(sizeof(_type), __alignof__(_type))) 85.17 @@ -32,6 +27,4 @@ static inline void *_xmalloc_array(size_ 85.18 return _xmalloc(size * num, align); 85.19 } 85.20 85.21 -#endif /* __ARCH_HAS_SLAB_ALLOCATOR */ 85.22 - 85.23 #endif /* __SLAB_H__ */