From 2e69f13af14b9df89bec7bd99fc32b9547ece72d Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Mon, 7 May 2018 14:06:16 +0100 Subject: [PATCH] x86/spec_ctrl: Elide MSR_SPEC_CTRL handling in idle context when possible If Xen is virtualising MSR_SPEC_CTRL handling for guests, but using 0 as its own MSR_SPEC_CTRL value, spec_ctrl_{enter,exit}_idle() need not write to the MSR. Requested-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Wei Liu Reviewed-by: Jan Beulich Release-acked-by: Juergen Gross (cherry picked from commit 94df6e8588e35cc2028ccb3fd2921c6e6360605e) --- xen/arch/x86/cpu/common.c | 3 +++ xen/arch/x86/spec_ctrl.c | 4 ++++ xen/include/asm-x86/cpufeature.h | 1 + xen/include/asm-x86/spec_ctrl.h | 4 ++-- 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index d6dff4c..e1c479a 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -429,6 +429,9 @@ void identify_cpu(struct cpuinfo_x86 *c) if (test_bit(X86_FEATURE_NO_XPTI, boot_cpu_data.x86_capability)) __set_bit(X86_FEATURE_NO_XPTI, c->x86_capability); + if (test_bit(X86_FEATURE_SC_MSR_IDLE, + boot_cpu_data.x86_capability)) + __set_bit(X86_FEATURE_SC_MSR_IDLE, c->x86_capability); /* AND the already accumulated flags with these */ for ( i = 0 ; i < NCAPINTS ; i++ ) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index a67daa2..f5dd14e 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -327,6 +327,10 @@ void __init init_speculation_mitigations(void) /* (Re)init BSP state now that default_spec_ctrl_flags has been calculated. */ init_shadow_spec_ctrl_state(); + /* If Xen is using any MSR_SPEC_CTRL settings, adjust the idle path. */ + if ( default_xen_spec_ctrl ) + __set_bit(X86_FEATURE_SC_MSR_IDLE, boot_cpu_data.x86_capability); + print_details(thunk, caps); } diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index e472176..2466f5b 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -34,6 +34,7 @@ #define X86_FEATURE_SC_RSB_PV ((FSCAPINTS+0)*32+ 16) /* RSB overwrite needed for PV */ #define X86_FEATURE_SC_RSB_HVM ((FSCAPINTS+0)*32+ 17) /* RSB overwrite needed for HVM */ #define X86_FEATURE_NO_XPTI ((FSCAPINTS+0)*32+ 18) /* XPTI mitigation not in use */ +#define X86_FEATURE_SC_MSR_IDLE ((FSCAPINTS+0)*32+ 19) /* SC_MSR && default_xen_spec_ctrl */ #define cpufeat_word(idx) ((idx) / 32) #define cpufeat_bit(idx) ((idx) % 32) diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h index 6c11562..ec943e1 100644 --- a/xen/include/asm-x86/spec_ctrl.h +++ b/xen/include/asm-x86/spec_ctrl.h @@ -54,7 +54,7 @@ static always_inline void spec_ctrl_enter_idle(struct cpu_info *info) barrier(); asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", %c3) :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0), - "i" (X86_FEATURE_SC_MSR) + "i" (X86_FEATURE_SC_MSR_IDLE) : "memory" ); } @@ -71,7 +71,7 @@ static always_inline void spec_ctrl_exit_idle(struct cpu_info *info) barrier(); asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", %c3) :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0), - "i" (X86_FEATURE_SC_MSR) + "i" (X86_FEATURE_SC_MSR_IDLE) : "memory" ); } -- 2.1.4