From: Andrew Cooper Date: Tue, 10 Sep 2024 20:59:37 +0100 Subject: x86/cpufeature: Reposition cpu_has_{lfence_dispatch,nscb} LFENCE_DISPATCH used to be a synthetic feature, but was given a real CPUID bit by AMD. The define wasn't moved when this was changed. NSCB has always been a real CPUID bit, and was misplaced when introduced in the synthetic block alongside LFENCE_DISPATCH. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich (cherry picked from commit 6a039b050071eba644ab414d76ac5d5fc9e067a5) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 515f3f64d55b..919a9e31f04e 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -190,6 +190,10 @@ static inline bool boot_cpu_has(unsigned int feat) #define cpu_has_avx512_bf16 boot_cpu_has(X86_FEATURE_AVX512_BF16) #define cpu_has_avx_ifma boot_cpu_has(X86_FEATURE_AVX_IFMA) +/* CPUID level 0x80000021.eax */ +#define cpu_has_lfence_dispatch boot_cpu_has(X86_FEATURE_LFENCE_DISPATCH) +#define cpu_has_nscb boot_cpu_has(X86_FEATURE_NSCB) + /* CPUID level 0x00000007:1.edx */ #define cpu_has_avx_vnni_int8 boot_cpu_has(X86_FEATURE_AVX_VNNI_INT8) #define cpu_has_avx_ne_convert boot_cpu_has(X86_FEATURE_AVX_NE_CONVERT) @@ -218,8 +222,6 @@ static inline bool boot_cpu_has(unsigned int feat) #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) #define cpu_has_aperfmperf boot_cpu_has(X86_FEATURE_APERFMPERF) -#define cpu_has_lfence_dispatch boot_cpu_has(X86_FEATURE_LFENCE_DISPATCH) -#define cpu_has_nscb boot_cpu_has(X86_FEATURE_NSCB) #define cpu_has_xen_lbr boot_cpu_has(X86_FEATURE_XEN_LBR) #define cpu_has_xen_shstk boot_cpu_has(X86_FEATURE_XEN_SHSTK) #define cpu_has_xen_ibt boot_cpu_has(X86_FEATURE_XEN_IBT)